[PEDA] Need Help Implementing State Machine in PLD

2001-10-21 Thread CER67
Hello, I've been tasked to implement to state machine using a PLD (written in CUPL language) that will replace a "Phase Comparator 2" PLL. I have the State equations (from a PLL data sheet) and I know how to use an analog integration scheme to mimic a tristate output of the PLL chip using tw

[PEDA] Creating/implementing IC socket PCB decals

2001-09-04 Thread CER67
Hello Group, I'm new to protel, trying to figure out how to create and implement IC sockets decals/footprints on a PCB layout. Is it as simple as placing an IC and its socket on top of each other -or will that create a design rule violation? In pads, we created a dummy part (without a footpr