Re: [PEDA] Starting out with Protel99, Questions
Howdy, > > 1) Is there a standard or rule of thub that can be applied to the > seperation for a split plane ? > I use a 50mil separation everywhere I can unless there are rails over +/-12. If the difference in voltage of the split planes next to each other is over 25V I try to use a separation of 100mils. This is an imperical method and may not be practical in all applications. > > 2) For plated pads and vias, is hole size in layout before or > after > plating. ie if i set hole size to be 50mil, will it compensate for > > fact hole will be plated and compensate drill size so hole is > 50mil > after plating? > It can. I specify "Finished Hole Size" in the drill chart on the fab drawing, and I have never had any problems from doing so. If memory serves, the Copper Connection advises against against what I just wrote. > > 3) Is there a standard or rule of thumb for dimensions of pad in > relation to hole size ? From most of the library components I > looked > at, it seems hole is about 2/3 pad size. > I use a pad 20mil over drill (10mil annular) for pins unless otherwise specified or impractical. > > 4) Is there a standard via size/sizes ? > I use an 11mil drill and a 25mil pad due to the board houses my customers use. When I need to get a 5mil trace between the pads of a fine pitch BGA, I use a 24mil pad. > > 5) For a given size diameter component lead is there a guidline > for > hole size ? > For round leads, I like to use 10mil hole over the lead size. > > 6) for a component with square pins, .025mil (+- .005) mil on a > side, > I was going to use pads of diameter 80, hole 52. This sound > reasonable. For square leads, I like to use 5 over diagonal. Pythagorean's theorum is a^2 + b^2 = c^2. |\ a| \ | \c | \ - b To find the diagonal of a right triangle, c = square root of (a^2 + b^2). > > 7) For a thick track, say 30mil to 50mil, is it normal to use > multple > small vias ? > Absolutely. I prefer to use multiple small vias rather than one large via for most designs. > > Any other pointers welcome. > > Any help greatly appreciated. > To save my customer money in the fabrication of the board, I will combine hole sizes within 2mils of each other, except for press-fit or other critical applications. The aspect ratio of drill hole to board thickness is a very important issue and can greatly affect the cost of the design. A hole size that is ten times smaller than the thickness of the board may affect the cost of the board more than any benefits gained. Try to stay at or under 8:1. Cheers! Drew * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Starting out with Protel99, Questions
Paul Cooper - Myrica wrote: > Am trying to layout my 1st board since college and have a few > general > PCB layout questions. Board will be about 2x3", and max Frequency > is > about 100Mhz, althoug most much slower. > > This is a test board, which will be made in the 10's, not a > production > board (which is why a chip designer is doing it) > > 1) Is there a standard or rule of thub that can be applied to the > seperation for a split plane ? Your board fabricator usually has a spec for this. I generally use a 20 mil track around each split plane region (this becomes a 20-mil gap in the actual copper), and with 2 of them next to each other, it causes about a 40-mil gap between the two voltage areas. > 2) For plated pads and vias, is hole size in layout before or > after > plating. ie if i set hole size to be 50mil, will it compensate for > > fact hole will be plated and compensate drill size so hole is > 50mil > after plating? Again, your board house has specs for how much oversize they drill the holes, so the plating brings them back to your desired dimension. Some outfits will drill the hole as you specify, and plating will reduce it 3 or more mils. So, you need to work out with your fabricator what you intend your hole size spec to mean. > 3) Is there a standard or rule of thumb for dimensions of pad in > relation to hole size ? From most of the library components I > looked > at, it seems hole is about 2/3 pad size. In the most general sense, the accuracy of drill position and layer stackup in the laminating process set a minimum "annular ring" that you need to maintain to prevent the drill from going through the edge of the pad. This varies with process, number of layers, and total panel size (as well as the quality of their equipment and procedures). They should tell you what annular ring they need (both for outer and inner layers) to make your board manufacturable. > 4) Is there a standard via size/sizes ? > > 5) For a given size diameter component lead is there a guidline > for > hole size ? Umm, I usually want about .003" plus the worst case variation in hole size. Advanced Circuits has really large hole size tolerances of +/- .005" so I try to spec the hole at .013" over the lead size so I won't have to ram the leads in with pliers. Some outfits have much tighter controls. > 6) for a component with square pins, .025mil (+- .005) mil on a > side, > I was going to use pads of diameter 80, hole 52. This sound > reasonable. I usually use .038" for these. If you use 80 mil pads for things that are on .1" centers, that doesn't leave much room between pads. I use .060" pads with .038" holes and it comes out fine. > > 7) For a thick track, say 30mil to 50mil, is it normal to use > multple > small vias ? If you really need the lowest possible impedance or DC resistance, then thisa schem can be used. Remember that the conductive cross section of a via goes way down as the diameter goes down. Very roughly, it approximates the circumference of the hole. Jon * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Starting out with Protel99, Questions
Oops. Let me restate 5 & 6. 5 - 8 mils minimum over the max lead dimension to 30 mils maximum over he minimum dimension of the lead. 6 - Yes, 52 mils is good. See Above. .042 max. across corners +.008 = .050 .028 min. across corners +.030 = .058 so hole size should be between 50 & 58 mils. See what happens when you hurry. Regards, Steve Smith Product Engineer Staco Energy Products Co. Web Site: www.stacoenergy.com > -Original Message- > From: Steve Smith > Sent: Friday, December 07, 2001 5:18 PM > To: 'Protel EDA Forum' > Subject: Re: [PEDA] Starting out with Protel99, Questions > > > I'll give it a try. > > 1 - 20 to 30 mils. > 2 - After plating. > 3 - It's more a factor of your minimum > annular ring. I usually try for > 10 to 15 mils depending on the > density of the board and the current > going thru the hole. > 4 - Again it depends on density & current. > I usually go with 20/40 & 25/50 (hole/pad) > but most of my boards are not that dense. > Many go as small as 12 & 15 mil holes. > 5 - 8 mils minimum to 30 mils maximum over > the max dimension of the lead. > 6 - Yes, 52 mils is good. See Above. > .042 across corners +.008 = .050 > .042 + .030 = .072 so hole size > should be between 50 & 72 mils. > 7 - Again it depends upon the amount of > current. > > I suggest you get a copy of IPC-2221 & IPC- from www.ipc.org. > It will give you answers to many of your questions. > > Also do not forget to put a 50 mil or so trace around the boarder > of the board on internal power & ground plane layers so that the > planes do not extend to the edge of the board. > > Good luck, > Steve Smith > Product Engineer > Staco Energy Products Co. > Web Site: www.stacoenergy.com > > > > -Original Message- > > From: Paul Cooper - Myrica [mailto:[EMAIL PROTECTED]] > > Sent: Friday, December 07, 2001 4:18 PM > > To: Protel EDA Forum > > Subject: [PEDA] Starting out with Protel99, Questions > > > > > > > >Am trying to layout my 1st board since college and have a few general > >PCB layout questions. Board will be about 2x3", and max Frequency is > >about 100Mhz, althoug most much slower. > > > >This is a test board, which will be made in the 10's, not a > production > >board (which is why a chip designer is doing it) > > > > 1) Is there a standard or rule of thub that can be applied to the > >seperation for a split plane ? > > > > 2) For plated pads and vias, is hole size in layout before or after > >plating. ie if i set hole size to be 50mil, will it > compensate for > >fact hole will be plated and compensate drill size so > hole is 50mil > >after plating? > > > > 3) Is there a standard or rule of thumb for dimensions of pad in > >relation to hole size ? From most of the library components I > >looked at, it seems hole is about 2/3 pad size. > > > > 4) Is there a standard via size/sizes ? > > > > 5) For a given size diameter component lead is there a guidline for > >hole size ? > > > > 6) for a component with square pins, .025mil (+- .005) mil > on a side, > >I was going to use pads of diameter 80, hole 52. This > sound reasonable. > > > > 7) For a thick track, say 30mil to 50mil, is it normal to > use multple > >small vias ? > > > > Any other pointers welcome. > > Any help greatly appreciated. > > > > Regards > > Paul > > > > -- > > Myrica Networks, Inc.Paul Cooper > > 4350 Executive Drive, Suite 200 [EMAIL PROTECTED] > > San Diego, CA 92121(858) 362-0850 (Fax 0855) > > > > > > > > > * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
Re: [PEDA] Starting out with Protel99, Questions
Re: [PEDA] Starting out with Protel99, Questions
I'll give it a try. 1 - 20 to 30 mils. 2 - After plating. 3 - It's more a factor of your minimum annular ring. I usually try for 10 to 15 mils depending on the density of the board and the current going thru the hole. 4 - Again it depends on density & current. I usually go with 20/40 & 25/50 (hole/pad) but most of my boards are not that dense. Many go as small as 12 & 15 mil holes. 5 - 8 mils minimum to 30 mils maximum over the max dimension of the lead. 6 - Yes, 52 mils is good. See Above. .042 across corners +.008 = .050 .042 + .030 = .072 so hole size should be between 50 & 72 mils. 7 - Again it depends upon the amount of current. I suggest you get a copy of IPC-2221 & IPC- from www.ipc.org. It will give you answers to many of your questions. Also do not forget to put a 50 mil or so trace around the boarder of the board on internal power & ground plane layers so that the planes do not extend to the edge of the board. Good luck, Steve Smith Product Engineer Staco Energy Products Co. Web Site: www.stacoenergy.com > -Original Message- > From: Paul Cooper - Myrica [mailto:[EMAIL PROTECTED]] > Sent: Friday, December 07, 2001 4:18 PM > To: Protel EDA Forum > Subject: [PEDA] Starting out with Protel99, Questions > > > >Am trying to layout my 1st board since college and have a few general >PCB layout questions. Board will be about 2x3", and max Frequency is >about 100Mhz, althoug most much slower. > >This is a test board, which will be made in the 10's, not a production >board (which is why a chip designer is doing it) > > 1) Is there a standard or rule of thub that can be applied to the >seperation for a split plane ? > > 2) For plated pads and vias, is hole size in layout before or after >plating. ie if i set hole size to be 50mil, will it compensate for >fact hole will be plated and compensate drill size so hole is 50mil >after plating? > > 3) Is there a standard or rule of thumb for dimensions of pad in >relation to hole size ? From most of the library components I >looked at, it seems hole is about 2/3 pad size. > > 4) Is there a standard via size/sizes ? > > 5) For a given size diameter component lead is there a guidline for >hole size ? > > 6) for a component with square pins, .025mil (+- .005) mil on a side, >I was going to use pads of diameter 80, hole 52. This sound reasonable. > > 7) For a thick track, say 30mil to 50mil, is it normal to use multple >small vias ? > > Any other pointers welcome. > Any help greatly appreciated. > > Regards > Paul > > -- > Myrica Networks, Inc.Paul Cooper > 4350 Executive Drive, Suite 200 [EMAIL PROTECTED] > San Diego, CA 92121(858) 362-0850 (Fax 0855) > > > > * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
