Il 12/07/2012 07:34, Zhi Yong Wu ha scritto:
HI,
Do we need to maintain one QEMU branch to collect all useful latest
patches for tcm_vhost support? You know, those patches will not get
merged into qemu.git/master.
Never say never, but the answer to your question is yes: please apply
this
Il 12/07/2012 02:19, Ronnie Sahlberg ha scritto:
The QEMU SCSI emulation does not support protection information,
so any READ/WRITE/VERIFY commands that has the protect bits set to
non-zero should fail with ILLEGAL_REQUEST/INVALID_FIELD_IN_CDB
From SCSI SBC :
If the logical unit does not
On Tue, Jul 10, 2012 at 03:15:51PM +0200, Igor Mammedov wrote:
/* pc.c */
-int cpu_is_bsp(CPUX86State *env);
Why remove it instead of modifying it to check BSP bit in apic base?
I think it will make the patch smaller and open code the check does not
look nice.
--
Gleb.
Paolo, List
Please find a small patch to the scsi emulation.
This patch improves the checkign that the requested lbas are all available.
We check both that lba+len is not going past the end of the device
but also iflba+len lba
This second condition could occur for deviously crafted scsi
Improve the tests for the LBA to cover more cases, the new test looks like this
if (r-req.cmd.lba r-req.cmd.lba + len
|| r-req.cmd.lba + len s-qdev.max_lba) {
For the 16 byte opcodes, the lba is a uint64, so the first check is to make
sure that we do not wrap.
For example if
thanks, it is applied to my vhost_scsi git tree
git://github.com/mdroth/qemu.git vhost-scsi
On Thu, Jul 12, 2012 at 4:55 AM, Nicholas A. Bellinger
n...@linux-iscsi.org wrote:
From: Nicholas Bellinger n...@linux-iscsi.org
This QEMU patch sets VirtIOSCSIConfig-max_target=0 for vhost-scsi
thanks, it is applied to my vhost_scsi git tree
git://github.com/wuzhy/qemu.git vhost-scsi
On Thu, Jul 12, 2012 at 4:55 AM, Nicholas A. Bellinger
n...@linux-iscsi.org wrote:
From: Nicholas Bellinger n...@linux-iscsi.org
This QEMU patch sets VirtIOSCSIConfig-max_target=0 for vhost-scsi
Il 12/07/2012 08:52, Ronnie Sahlberg ha scritto:
Improve the tests for the LBA to cover more cases, the new test looks like
this
if (r-req.cmd.lba r-req.cmd.lba + len
|| r-req.cmd.lba + len s-qdev.max_lba) {
For the 16 byte opcodes, the lba is a uint64, so the first
Paolo,
Sorry but the previous patch was bad.
Use this patch instead it uses the correct check of
if (r-req.cmd.lba r-req.cmd.lba + len
|| r-req.cmd.lba + len s-qdev.max_lba + 1) {
Improve the tests for the LBA to cover more cases, the new test looks like this
if (r-req.cmd.lba r-req.cmd.lba + len
|| r-req.cmd.lba + len s-qdev.max_lba + 1) {
For the 16 byte opcodes, the lba is a uint64, so the first check is to make
sure that we do not wrap.
For example
Sorry, there is a bug in it.
Can you change it to :
|| r-req.cmd.lba + len s-qdev.max_lba + 1) {
or else the last lba of the device will be flagged as out of range.
On Thu, Jul 12, 2012 at 5:04 PM, Paolo Bonzini pbonz...@redhat.com wrote:
Il 12/07/2012 08:52, Ronnie Sahlberg ha
Il 12/07/2012 09:06, ronnie sahlberg ha scritto:
Sorry, there is a bug in it.
Can you change it to :
|| r-req.cmd.lba + len s-qdev.max_lba + 1) {
or else the last lba of the device will be flagged as out of range.
Yes, done that already. Can you add a test for the last LBA to
On 07/11/12 18:45, Vasilis Liaskovitis wrote:
Hi,
On Wed, Jul 11, 2012 at 01:56:19PM +0200, Gerd Hoffmann wrote:
On 07/11/12 12:31, Vasilis Liaskovitis wrote:
In order to hotplug memory between RamSize and BUILD_PCIMEM_START, the pci
window needs to start at BUILD_PCIMEM_START (0xe000).
Am 11.07.2012 18:00, schrieb Paolo Bonzini:
Il 15/06/2012 18:45, Eric Blake ha scritto:
Pre-existing, but do we have any policy on US (canceled) vs. UK
(cancelled) spelling? Obviously, our API spelling is locked into UK
spelling, but if the docs generally prefer US spelling, do we need to
On 12 July 2012 01:45, Peter Crosthwaite
peter.crosthwa...@petalogix.com wrote:
On Tue, Jul 10, 2012 at 11:32 PM, Peter Maydell wrote:
I still think that having this new function is misguided:
* nobody's using it
I wasn't thinking a new dead function. I was suggesting that the one
function
[Alex's illegibly long lines wrapped]
Alexander Graf ag...@suse.de writes:
On 09.07.2012, at 10:50, Markus Armbruster wrote:
Alexander Graf ag...@suse.de writes:
We've had support for creating AHCI devices using -device for a while now,
but it's cumbersome to users. We really should
On 12.07.2012, at 10:17, Markus Armbruster wrote:
[Alex's illegibly long lines wrapped]
Alexander Graf ag...@suse.de writes:
On 09.07.2012, at 10:50, Markus Armbruster wrote:
Alexander Graf ag...@suse.de writes:
We've had support for creating AHCI devices using -device for a while
Hi,
What I'd like to avoid is casual users setting up new guests with our
shiny new q35 board getting their IDE drives connected to some slow, old
controller just because they haven't discovered that if=ide doesn't cut
it anymore, and they need to use if=ahci now.
That will not work. ahci
On 12/07/12 13:11, Alex Williamson wrote:
On Wed, 2012-07-11 at 12:54 +1000, Alexey Kardashevskiy wrote:
On 11/07/12 02:55, Alex Williamson wrote:
On Tue, 2012-07-10 at 15:51 +1000, Alexey Kardashevskiy wrote:
The patch enables VFIO on POWER.
It literally does the following:
1. POWERPC
It literally does the following:
1. POWERPC IOMMU support (the kernel counterpart is required)
2. The patch assumes that IOAPIC calls are going to be replaced
with something generic. I have something in my local git but it's
too early, we need to extend PCIINTxRoute first.
3. vfio_get_group()
Am 11.07.2012 15:08, schrieb Markus Armbruster:
Applies on top of [PATCH v3 00/29] Disk geometry cleanup.
Markus Armbruster (4):
hw/block-common: Move BlockConf friends from block.h
hw/block-common: Factor out fall back to legacy -drive serial=...
blockdev: Don't limit DriveInfo
On Thu, Jul 12, 2012 at 09:22:14AM +0200, Gerd Hoffmann wrote:
On 07/11/12 18:45, Vasilis Liaskovitis wrote:
Hi,
On Wed, Jul 11, 2012 at 01:56:19PM +0200, Gerd Hoffmann wrote:
On 07/11/12 12:31, Vasilis Liaskovitis wrote:
In order to hotplug memory between RamSize and
On 07/05/2012 06:16 PM, Paolo Bonzini wrote:
This is broken; since the eventfd is used in nonblocking mode there
is a race between reading and writing.
diff --git a/event_notifier.c b/event_notifier.c
index 2b210f4..c339bfe 100644
--- a/event_notifier.c
+++ b/event_notifier.c
@@ -51,18
On 07/05/2012 06:16 PM, Paolo Bonzini wrote:
struct EventNotifier {
- int fd;
+int fd;
};
If you're fixing whitespace, might as well fix it correctly.
--
error compiling committee.c: too many arguments to function
Am 12.07.2012 05:28, schrieb Dong Xu Wang:
qemu-img not only suports k/K/M/G/T/b, but also supports m/g/t/B. So correct
it in help message.
Signed-off-by: Dong Xu Wang wdon...@linux.vnet.ibm.com
CC: riegama...@gmail.com
---
v1-v2: also correct error reporting.
This is only true for some
On 07/05/2012 06:16 PM, Paolo Bonzini wrote:
This is part 1 of a three-part series that expands usage of EventNotifier
in QEMU (including AIO and the main loop). I started working on this when
playing with the threaded block layer; the part of that work that I hope
will be in 1.2 is
Il 12/07/2012 11:10, Avi Kivity ha scritto:
On 07/05/2012 06:16 PM, Paolo Bonzini wrote:
This is broken; since the eventfd is used in nonblocking mode there
is a race between reading and writing.
diff --git a/event_notifier.c b/event_notifier.c
index 2b210f4..c339bfe 100644
---
On Wed, Jul 04, 2012 at 12:02:07PM +0200, Hannes Reinecke wrote:
Suggested by blue swirl. Patch is on top of Paolo's
scsi-next tree.
Signed-off-by: Hannes Reinecke h...@suse.de
Cc: Paolo Bonzini pbonz...@redhat.com
Cc: Blue Swirl blauwir...@gmail.com
---
hw/megasas.c |2 +-
1 files
On Wed, Jul 04, 2012 at 12:02:25PM +0200, Hannes Reinecke wrote:
Add maintainers entry for megasas.
Patch is on top of Paolo's scsi-next tree.
Signed-off-by: Hannes Reinecke h...@suse.de
Cc: Paolo Bonzini pbonz...@redhat.com
---
MAINTAINERS |6 ++
1 files changed, 6
Gerd Hoffmann kra...@redhat.com writes:
Hi,
What I'd like to avoid is casual users setting up new guests with our
shiny new q35 board getting their IDE drives connected to some slow, old
controller just because they haven't discovered that if=ide doesn't cut
it anymore, and they need to
On 07/12/2012 01:30 PM, Paolo Bonzini wrote:
Il 12/07/2012 11:10, Avi Kivity ha scritto:
On 07/05/2012 06:16 PM, Paolo Bonzini wrote:
This is broken; since the eventfd is used in nonblocking mode there
is a race between reading and writing.
diff --git a/event_notifier.c b/event_notifier.c
Alexander Graf ag...@suse.de writes:
On 12.07.2012, at 10:17, Markus Armbruster wrote:
[Alex's illegibly long lines wrapped]
Alexander Graf ag...@suse.de writes:
On 09.07.2012, at 10:50, Markus Armbruster wrote:
Alexander Graf ag...@suse.de writes:
We've had support for creating
Il 12/07/2012 13:04, Avi Kivity ha scritto:
Right, it's useless. I'll adjust the comment (and the whitespace fix)
and apply.
Ok, thanks very much!
Paolo
On 12.07.2012, at 13:09, Markus Armbruster wrote:
Alexander Graf ag...@suse.de writes:
On 12.07.2012, at 10:17, Markus Armbruster wrote:
[Alex's illegibly long lines wrapped]
Alexander Graf ag...@suse.de writes:
On 09.07.2012, at 10:50, Markus Armbruster wrote:
Alexander Graf
Il 12/07/2012 13:09, Markus Armbruster ha scritto:
It isn't. AHCI is on the same level as IDE. They both speak ATA, but
the guest os interface is completely different. You can write a
generic IDE driver, but that won't be able to talk to an AHCI
controller in AHCI mode. You can write a
Alexander Graf ag...@suse.de writes:
On 12.07.2012, at 13:09, Markus Armbruster wrote:
Alexander Graf ag...@suse.de writes:
On 12.07.2012, at 10:17, Markus Armbruster wrote:
[Alex's illegibly long lines wrapped]
Alexander Graf ag...@suse.de writes:
On 09.07.2012, at 10:50, Markus
On 12.07.2012, at 10:17, Markus Armbruster wrote:
[Alex's illegibly long lines wrapped]
Alexander Graf ag...@suse.de writes:
On 09.07.2012, at 10:50, Markus Armbruster wrote:
Alexander Graf ag...@suse.de writes:
We've had support for creating AHCI devices using -device for a while
Almost all callers of create_iovec() forgot to destroy the qiov when the
request has completed.
Signed-off-by: Kevin Wolf kw...@redhat.com
---
qemu-io.c |4
1 files changed, 4 insertions(+), 0 deletions(-)
diff --git a/qemu-io.c b/qemu-io.c
index 5882067..8f3b94b 100644
--- a/qemu-io.c
$subject says all: when loading old (v1) vmstate which doesn't contain
expire_time initialize it with a reasonable default (current time).
Signed-off-by: Gerd Hoffmann kra...@redhat.com
---
hw/usb/hcd-uhci.c | 12
1 files changed, 12 insertions(+), 0 deletions(-)
diff --git
From: Paolo Bonzini pbonz...@redhat.com
Most device models have a simple lifecycle for the hba_private field
and they can free it when a request is completed or cancelled.
However, in some cases it may be simpler to tie the lifetime
of hba_private to that of the included SCSIRequest. This patch
With the async schedule being kicked from other places than the frame
timer (commit 0f588df8b3688b00e77aabaa32e26ece5f19bd39) it may happen
that we call ehci_commit_interrupt() more than once per frame.
Move the call from the async schedule handler to the frame timer to
restore old irq behavior,
Also reorganize and comment the irq functions while being at it.
Signed-off-by: Gerd Hoffmann kra...@redhat.com
---
hw/usb/hcd-ehci.c | 83 ++--
trace-events |2 +-
2 files changed, 55 insertions(+), 30 deletions(-)
diff --git
$subject says all. First cut.
It's a pure UAS (usb attached scsi) emulation, without BOT (bulk-only
transport) compatibility. If your guest can't handle it use usb-storage
instead.
The emulation works like any other scsi hba emulation (eps, lsi, virtio,
megasas, ...). It provides just the HBA
Move down the expire time calculation down in the frame timer, to the
point where the timer is actually reloaded. This way we'll notice any
async_stepdown changes (especially resetting to 0 due to usb activity).
Signed-off-by: Gerd Hoffmann kra...@redhat.com
---
hw/usb/hcd-ehci.c |8
On 12.07.2012 17:08, Gerd Hoffmann wrote:
$subject says all: when loading old (v1) vmstate which doesn't contain
expire_time initialize it with a reasonable default (current time).
-stable (1.1) material?
Thanks,
/mjt
Hi,
Brings UAS (usb attached scsi) support, fixes and improvements for the
ehci interrupt handling and a little uhci loadvm compatibility bugfix.
please pull,
Gerd
The following changes since commit 92336855975805d88c7979f53bc05c2d47abab04:
megasas: disable due to build breakage
This patch:
- moves decision to designate BSP from board into cpu, making cpu
self-sufficient in this regard. Later it will allow to cleanup hw/pc.c
and remove cpu_reset and wrappers from there.
- stores flag that CPU is BSP in IA32_APIC_BASE to model behavior
described in Inted SDM vol 3a part
On 07/12/2012 08:38 AM, Gleb Natapov wrote:
On Tue, Jul 10, 2012 at 03:15:51PM +0200, Igor Mammedov wrote:
/* pc.c */
-int cpu_is_bsp(CPUX86State *env);
Why remove it instead of modifying it to check BSP bit in apic base?
I think it will make the patch smaller and open code the check does
The bridge helper uses the SIOCBRADDIF ioctl to add an inteface to
a bridge. SIOCBRADDIF is not available on old Linux versions. This
patch adds support to use the SIOCDEVPRIVATE ioctl with BRCTL_ADD_IF
if SIOCBRADDIF is not available.
Reported-by: Fabien Chouteau chout...@adacore.com
Hi,
This patch adds some glue to roms/Makefile to build vgabios binaries for
qemu. It covers both the lgpl'ed vgabios implementation used by qemu
traditionally and the new seabios implementation.
The purpose of this patch is to (a) document the vgabios build process
and (b) simplify
This patch adds some glue to roms/Makefile to build vgabios binaries for
qemu. It covers both the lgpl'ed vgabios implementation used by qemu
traditionally and the new seabios implementation.
The purpose of this patch is to (a) document the vgabios build process
and (b) simplify seavgabios
On 12 July 2012 14:22, Igor Mammedov imamm...@redhat.com wrote:
This patch:
- moves decision to designate BSP from board into cpu, making cpu
self-sufficient in this regard. Later it will allow to cleanup hw/pc.c
and remove cpu_reset and wrappers from there.
- stores flag that CPU is BSP in
Kevin Wolf kw...@redhat.com writes:
Am 02.07.2012 11:42, schrieb Peter Crosthwaite:
On Mon, Jul 2, 2012 at 7:04 PM, Kevin Wolf kw...@redhat.com wrote:
Am 02.07.2012 10:57, schrieb Peter Crosthwaite:
No conditional on the qemu_coroutine_create. So it will always create
a new coroutine for its
Il 15/06/2012 20:20, Eric Blake ha scritto:
The second phase is indicated by the progress in info block-jobs
reporting the current offset to be equal to the length of the file.
When the job is cancelled in the second phase, QEMU will run the
job until the source is clean and quiescent,
Implement the different format of the PAR when long descriptor
translation tables are in use. Note that we assume that
get_phys_addr() returns a long-descriptor format DFSR value on
failure if long descriptors are in use; this added subtlety tips
the balance and makes it worth adding a comment
On 07/10/2012 10:22 PM, Eduardo Habkost wrote:
The hotplug case is a bit more complex: we need to either:
- have a mechanism to let the ACPI SSDT code know what's the APIC ID of
hotplugged CPUs; or
- make Seabios run some code in the hotplugged CPU (I am assuming that this is
simply
On Thu, Jul 12, 2012 at 03:51:48PM +0200, Igor Mammedov wrote:
On 07/10/2012 10:22 PM, Eduardo Habkost wrote:
The hotplug case is a bit more complex: we need to either:
- have a mechanism to let the ACPI SSDT code know what's the APIC ID of
hotplugged CPUs; or
- make Seabios run some
Make target_phys_addr_t 64 bits for ARM targets, and set
TARGET_PHYS_ADDR_SPACE_BITS to 40. This should have no effect for ARM
boards where physical addresses really are 32 bits (except perhaps a
slight performance hit on 32 bit hosts for system emulation) but allows
us to implement the Large
Extend feature flags to 64 bits, as we've just run out of space
in the 32 bit integer we were using for them.
Signed-off-by: Peter Maydell peter.mayd...@linaro.org
---
target-arm/cpu.c |2 +-
target-arm/cpu.h |6 +++---
target-arm/machine.c |4 ++--
3 files changed, 6
From: Paul Brook p...@codesourcery.com
The coprocessor register rework broke cp15 based WFI instructions.
We incorrectly fall through the normal register write case, which
incorrectly adds a forced block termination. We've already done
a special version of this (DISAS_WFI), so return
LPAE extends the DBGDRAR and DBGDSAR debug registers to 64 bits; we
only implement these as dummy RAZ versions; provide dummies for
the 64 bit accesses as well.
Signed-off-by: Peter Maydell peter.mayd...@linaro.org
---
target-arm/helper.c |5 +
1 files changed, 5 insertions(+), 0
check -valgrind wraps all qemu-io calls with valgrind. This makes it a
bit easier to debug problems that occur somewhere deep in a test case.
Signed-off-by: Kevin Wolf kw...@redhat.com
---
tests/qemu-iotests/common| 11 +++
tests/qemu-iotests/common.rc | 10 ++
2 files
Add a missing cast to avoid gcc complaining about format string
errors when printing an expression based on a target_phys_addr_t.
Signed-off-by: Peter Maydell peter.mayd...@linaro.org
Reviewed-by: Peter Chubb peter.ch...@nicta.com.au
---
hw/imx_avic.c |2 +-
1 files changed, 1 insertions(+),
Kevin Wolf (2):
coroutine-ucontext: Help valgrind understand coroutines
qemu-iotests: Valgrind support
configure| 18 ++
coroutine-ucontext.c | 21 +
tests/qemu-iotests/common| 11 +++
Fix errors in the TCG temp handling in the 64 bit coprocessor
write path: we were reusing a 32 bit temp after it had been
freed by store_reg(), and failing to free a 64 bit temp.
This bug has no visible effect at this point because there
aren't any non-NOP 64 bit registers yet; it needs to be
Under LPAE, the cp15 registers PAR, TTBR0 and TTBR1 are extended
to 64 bits, with a 64 bit (MRRC/MCRR) access path to read the
full width of the register. Add the state fields for the top
half and the 64 bit access path. Actual use of the top half of
the register will come with the addition of the
Alexander Graf ag...@suse.de writes:
On 12.07.2012, at 10:17, Markus Armbruster wrote:
[Alex's illegibly long lines wrapped]
Alexander Graf ag...@suse.de writes:
On 09.07.2012, at 10:50, Markus Armbruster wrote:
Alexander Graf ag...@suse.de writes:
We've had support for creating
Implement the privileged-execute-never (PXN) translation table bit.
It is implementation-defined whether this is implemented, so we give
it its own ARM_FEATURE_ flag. LPAE requires PXN, so add also an
LPAE feature flag and the implication logic, as a placeholder
for actually implementing LPAE at a
Fix a copy-and-paste error in the register description for TTBR1
that meant it was a duplicate of TTBR0 rather than affecting the
correct bit of CPU state.
Signed-off-by: Peter Maydell peter.mayd...@linaro.org
---
target-arm/helper.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
Implement the changes to the TTBCR register required for LPAE:
* many fewer bits should be RAZ/WI
* since TTBCR changes can result in a change of ASID, we must
flush the TLB on writes to it
Signed-off-by: Peter Maydell peter.mayd...@linaro.org
---
target-arm/helper.c | 15 ++-
In the implementation of get_phys_addr(), consistently use
target_phys_addr_t to hold the physical address rather than
uint32_t.
Signed-off-by: Peter Maydell peter.mayd...@linaro.org
---
target-arm/helper.c | 29 +++--
1 files changed, 15 insertions(+), 14 deletions(-)
Fix a couple of cases where cp register names were copy-and-pasted.
These are harmless since we don't use the name for anything (except
debugging convenience) but could be confusing.
Signed-off-by: Peter Maydell peter.mayd...@linaro.org
Reviewed-by: Igor Mitsyanko i.mitsya...@samsung.com
---
Implement the actual table walk code for LPAE's long format
translation tables.
Signed-off-by: Peter Maydell peter.mayd...@linaro.org
---
target-arm/helper.c | 182 +++
1 files changed, 182 insertions(+), 0 deletions(-)
diff --git
Usual target-arm pullreq. This one has a couple of bugfixes for
issues in the cp15 rework, and the LPAE patch series (including
switching to 64 bit physaddrs for ARM, and a trivial imx_avic
patch which is needed as a prerequisite for that).
thanks
-- PMM
The following changes since commit
Add implementations of the AMAIR0 and AMAIR1 LPAE
Auxiliary Memory Attribute Indirection Registers.
These are implementation defined and we choose to
implement them as RAZ/WI, matching the Cortex-A7
and Cortex-A15.
Signed-off-by: Peter Maydell peter.mayd...@linaro.org
---
target-arm/helper.c |
This patch adds a use64 property which will make the ivshmem driver
register a 64bit memory bar when set, so you have something to play with
when testing 64bit pci bits. It also allows to have quite big shared
memory regions, like this:
[root@fedora ~]# lspci -vs1:1
01:01.0 RAM memory: Red Hat,
On Thu, 5 Jul 2012 20:48:44 +0800
Amos Kong ak...@redhat.com wrote:
Convert 'sendkey' to use QAPI. do_sendkey() depends on some
variables/functions in monitor.c, so reserve qmp_sendkey()
to monitor.c
key_defs[] in console.h is the mapping of key name to keycode,
Keys' index in the enmu
I didn't delete comment in this file. This comment become irrelevant
after apply this patch. I'll send new patch set.
06.07.2012 19:49, Maksim Kozlov пишет:
Signed-off-by: Maksim Kozlovm.koz...@samsung.com
---
hw/exynos4210_pmu.c | 34 +-
1 files changed,
Il 12/07/2012 16:27, Kevin Wolf ha scritto:
Kevin Wolf (2):
coroutine-ucontext: Help valgrind understand coroutines
qemu-iotests: Valgrind support
configure| 18 ++
coroutine-ucontext.c | 21 +
Legacy -drive cyls=... are now ignored completely when the drive
doesn't back a hard disk device. Before, they were first checked
against a hard disk's limits, then ignored.
Signed-off-by: Markus Armbruster arm...@redhat.com
---
hw/ide/qdev.c |3 ++-
hw/scsi-disk.c |3 ++-
2 files
This patchset created mainly to add software reset support, but includes some
other things.
1. fix formatting of the exynos4210_pmu_regs structure
2. fix PRINT_DEBUG macro set to be able to enable extend and non-extend output
independently of each other
3. introduce new function to get
Mainly to make 'exynos4210_pmu_regs' array more readable.
Signed-off-by: Maksim Kozlov m.koz...@samsung.com
---
hw/exynos4210_pmu.c | 324 ++-
1 files changed, 164 insertions(+), 160 deletions(-)
diff --git a/hw/exynos4210_pmu.c
It make possible to set DEBUG_PMU and DEBUG_PMU_EXTEND
independently of each other
Signed-off-by: Maksim Kozlov m.koz...@samsung.com
---
hw/exynos4210_pmu.c | 23 +--
1 files changed, 17 insertions(+), 6 deletions(-)
diff --git a/hw/exynos4210_pmu.c b/hw/exynos4210_pmu.c
Signed-off-by: Pavel Hrdina phrd...@redhat.com
---
hmp-commands.hx |2 +-
hmp.c| 10 ++
hmp.h|1 +
qapi-schema.json | 22 ++
qerror.c | 24
qerror.h | 18 ++
Signed-off-by: Pavel Hrdina phrd...@redhat.com
---
hmp-commands.hx |2 +-
hmp.c| 10 ++
hmp.h|1 +
monitor.c| 12
qapi-schema.json | 24 +++-
qerror.c | 16
qerror.h | 12
This patch just introduces exynos4210_pmu_get_register_index function
to get index of the register's value in the array on its offset. And
functions _read and _write were modified accordingly.
Signed-off-by: Maksim Kozlov m.koz...@samsung.com
---
hw/exynos4210_pmu.c | 56
This patch-series converts savevm, loadvm, delvm and info snapshots from HMP
into QMP as savevm, loadvm, delvm and query-snapshots.
All comments are welcome.
Pavel
Pavel Hrdina (4):
qapi: Convert savevm
qapi: Convert loadvm
qapi: Convert delvm
qapi: Convert info snapshots
Signed-off-by: Pavel Hrdina phrd...@redhat.com
---
hmp.c| 34 ++
hmp.h|1 +
monitor.c|2 +-
qapi-schema.json | 35 +++
qerror.c |4
qerror.h |3 +++
Great that you address this issue!
I have two annotations, please see below.
Am 12.07.2012 16:27, schrieb Kevin Wolf:
valgrind tends to get confused and report false positives when you
switch stacks and don't tell it about it.
Signed-off-by: Kevin Wolf kw...@redhat.com
---
configure
Am 12.07.2012 18:51, schrieb Paolo Bonzini:
Il 12/07/2012 16:27, Kevin Wolf ha scritto:
Kevin Wolf (2):
coroutine-ucontext: Help valgrind understand coroutines
qemu-iotests: Valgrind support
configure| 18 ++
coroutine-ucontext.c | 21
On 12 July 2012 15:27, Kevin Wolf kw...@redhat.com wrote:
valgrind tends to get confused and report false positives when you
switch stacks and don't tell it about it.
Does the sigaltstack backend need anything similar?
-- PMM
Signed-off-by: Maksim Kozlov m.koz...@samsung.com
---
hw/exynos4210_pmu.c | 40 +---
1 files changed, 33 insertions(+), 7 deletions(-)
diff --git a/hw/exynos4210_pmu.c b/hw/exynos4210_pmu.c
index 7f09c79..96588d9 100644
--- a/hw/exynos4210_pmu.c
+++
Signed-off-by: Pavel Hrdina phrd...@redhat.com
---
hmp-commands.hx |2 +-
hmp.c| 10 ++
hmp.h|1 +
qapi-schema.json | 17 +
qmp-commands.hx | 24
savevm.c | 21 +++--
sysemu.h
On 07/12/2012 10:55 AM, Pavel Hrdina wrote:
Signed-off-by: Pavel Hrdina phrd...@redhat.com
---
+++ b/qapi-schema.json
@@ -1868,3 +1868,25 @@
# Since: 0.14.0
##
{ 'command': 'netdev_del', 'data': {'id': 'str'} }
+
+##
+# @savevm:
+#
+# Create a snapshot of the whole virtual machine.
On 07/12/2012 10:55 AM, Pavel Hrdina wrote:
Signed-off-by: Pavel Hrdina phrd...@redhat.com
---
+++ b/qapi-schema.json
@@ -1889,4 +1889,26 @@
#
# Since: 1.2
##
-{ 'command': 'savevm', 'data': {'*name': 'str'} }
\ No newline at end of file
+{ 'command': 'savevm', 'data': {'*name':
On 07/12/2012 10:55 AM, Pavel Hrdina wrote:
Signed-off-by: Pavel Hrdina phrd...@redhat.com
---
hmp-commands.hx |2 +-
hmp.c| 10 ++
hmp.h|1 +
qapi-schema.json | 17 +
qmp-commands.hx | 24
savevm.c
On 07/12/2012 10:55 AM, Pavel Hrdina wrote:
Signed-off-by: Pavel Hrdina phrd...@redhat.com
---
+++ b/qapi-schema.json
@@ -934,6 +934,41 @@
{ 'command': 'query-block-jobs', 'returns': ['BlockJobInfo'] }
##
+# @SnapshotInfo:
+#
+# Snapshot list. This structure contains list of
The changelog for 1.1.0-1 states Pseries handles PCI, allowing for
virtio devices with -M pseries while this bug report here still stands
as an issue I'm having where SLOF detects my virtio-block device but
QEMU does not create a virtio-pci device that the Linux kernel can
recognize. I would at
Hi
I am working on a virtualization project for which I am using
Qemu(0.13) + KVM.I am trying to get an automated switch to live
migration based on certain condition.
According to [1], it is possible to start migration via Qemu Monitor.
Since I am trying to invoke this via C code, is it possible
On Tue, Jul 10, 2012 at 8:22 PM, Eduardo Habkost ehabk...@redhat.com wrote:
Signed-off-by: Eduardo Habkost ehabk...@redhat.com
Maybe the bitops functions should be renamed instead, for example
prefixed by 'qemu_'. That may be safer if one day the kernel find
their way to system headers too.
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