[Expired for QEMU because there has been no activity for 60 days.]
** Changed in: qemu
Status: Incomplete => Expired
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https://bugs.launchpad.net/bugs/1077514
Title:
*** buffer
[Expired for QEMU because there has been no activity for 60 days.]
** Changed in: qemu
Status: Incomplete => Expired
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https://bugs.launchpad.net/bugs/1270397
Title:
Systemd
[Expired for QEMU because there has been no activity for 60 days.]
** Changed in: qemu
Status: Incomplete => Expired
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https://bugs.launchpad.net/bugs/1047999
Title:
error
* Drop the old SysBus init function and use instance_init
* Change mpc8xxx_gpio_reset to a DeviceClass::reset function
Signed-off-by: xiaoqiang zhao
---
hw/gpio/mpc8xxx.c | 20 +++-
1 file changed, 11 insertions(+), 9 deletions(-)
diff --git
Drop the old SysBus init function and use instance_init
Signed-off-by: xiaoqiang zhao
---
hw/ppc/ppce500_spin.c | 18 --
1 file changed, 8 insertions(+), 10 deletions(-)
diff --git a/hw/ppc/ppce500_spin.c b/hw/ppc/ppce500_spin.c
index cf958a9e00..958536f6c6
This is some QOM'ify work relate with ppc.
See each commit message for details.
xiaoqiang zhao (4):
hw/gpio: QOM'ify mpc8xxx.c
hw/ppc: QOM'ify e500.c
hw/ppc: QOM'ify ppce500_spin.c
hw/ppc: QOM'ify spapr_vio.c
hw/gpio/mpc8xxx.c | 20 +++-
hw/ppc/e500.c | 17
Drop the old and empty SysBus init
Signed-off-by: xiaoqiang zhao
---
hw/ppc/spapr_vio.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/hw/ppc/spapr_vio.c b/hw/ppc/spapr_vio.c
index cc1e09c568..1739b73a13 100644
--- a/hw/ppc/spapr_vio.c
+++ b/hw/ppc/spapr_vio.c
@@
Drop the old SysBus init function and use instance_init
Signed-off-by: xiaoqiang zhao
---
hw/misc/milkymist-hpdmc.c | 12 +---
1 file changed, 5 insertions(+), 7 deletions(-)
diff --git a/hw/misc/milkymist-hpdmc.c b/hw/misc/milkymist-hpdmc.c
index
Drop the old SysBus init function and use instance_init
Signed-off-by: xiaoqiang zhao
---
hw/ppc/e500.c | 17 -
1 file changed, 4 insertions(+), 13 deletions(-)
diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c
index cf8b122afe..792bd79d39 100644
---
This patch set finish QOM'ify work of char devices.
See each commit message for details.
xiaoqiang zhao (2):
hw/char: QOM'ify exynos4210_uart.c
hw/char: QOM'ify grlib_apbuart.c
hw/char/exynos4210_uart.c | 16 ++--
hw/char/grlib_apbuart.c | 26 +++---
2
split the old SysBus init function into an instance_init
and Device realize function
Signed-off-by: xiaoqiang zhao
---
hw/sd/milkymist-memcard.c | 25 +++--
1 file changed, 15 insertions(+), 10 deletions(-)
diff --git a/hw/sd/milkymist-memcard.c
split the old SysBus init function into an instance_init
and Device realize function
Signed-off-by: xiaoqiang zhao
---
hw/audio/pl041.c | 25 ++---
1 file changed, 14 insertions(+), 11 deletions(-)
diff --git a/hw/audio/pl041.c b/hw/audio/pl041.c
index
Drop the old SysBus init function and use instance_init
Signed-off-by: xiaoqiang zhao
---
hw/misc/milkymist-pfpu.c | 12 +---
1 file changed, 5 insertions(+), 7 deletions(-)
diff --git a/hw/misc/milkymist-pfpu.c b/hw/misc/milkymist-pfpu.c
index
split the old SysBus init function into an instance_init
and Device realize function
Signed-off-by: xiaoqiang zhao
---
hw/input/milkymist-softusb.c | 21 +
1 file changed, 13 insertions(+), 8 deletions(-)
diff --git a/hw/input/milkymist-softusb.c
Drop the old Sysbus init and use instance_init and
DeviceClass::realize instead
Signed-off-by: xiaoqiang zhao
---
hw/char/grlib_apbuart.c | 26 +++---
1 file changed, 15 insertions(+), 11 deletions(-)
diff --git a/hw/char/grlib_apbuart.c
This patch set QOM'ify code about audio devices.
See each commit message for deatils.
xiaoqiang zhao (2):
hw/audio: QOM'ify marvell_88w8618.c
hw/audio: QOM'ify pl041.c
hw/audio/marvell_88w8618.c | 18 +++---
hw/audio/pl041.c | 25 ++---
2 files
* Split the old SysBus init into an instance_init and a
DeviceClass::realize function
* Drop the old SysBus init function and use instance_init
Signed-off-by: xiaoqiang zhao
---
hw/net/milkymist-minimac2.c | 21 -
1 file changed, 12 insertions(+), 9
This patch series continues QOM'ify work for milkymist.
See each commit message for details.
xiaoqiang zhao (5):
hw/misc: QOM'ify milkymist-hpdmc.c
hw/misc: QOM'ify milkymist-pfpu.c
hw/sd: QOM'ify milkymist-memcard.c
hw/net: QOM'ify milkymist-minimac2.c
hw/input: QOM'ify
Drop the old Sysbus init and use instance_init and
DeviceClass::realize instead
Signed-off-by: xiaoqiang zhao
---
hw/char/exynos4210_uart.c | 16 ++--
1 file changed, 10 insertions(+), 6 deletions(-)
diff --git a/hw/char/exynos4210_uart.c
split the old SysBus init function into an instance_init
and Device realize function
Signed-off-by: xiaoqiang zhao
---
hw/audio/marvell_88w8618.c | 18 +++---
1 file changed, 11 insertions(+), 7 deletions(-)
diff --git a/hw/audio/marvell_88w8618.c
Gerd Hoffmann's talk on secure boot at 33c3 is now available:
https://media.ccc.de/v/33c3-8142-virtual_secure_boot
Useful for anyone who wants to understand the OVMF secure boot feature
that is supported by QEMU/KVM.
Thanks Gerd!
Stefan
Write-through is another way to keep the cache up-to-date. Even if this
case will be rare, write to the cache is more optimal than drop-cache.
Signed-off-by: Pavel Butsykin
---
block/pcache.c | 26 ++
1 file changed, 22 insertions(+), 4
Add the ability for the user to use .toast files with QEMU. This format works
just like ISO files.
Signed-off-by: John Arbuckle
---
ui/cocoa.m | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/ui/cocoa.m b/ui/cocoa.m
index 26d4a1c..c81f7b6 100644
---
Typically, data for unallocated clusters is filled with zeros, so it makes no
sense to store it in the cache.
Signed-off-by: Pavel Butsykin
---
block/pcache.c | 26 ++
1 file changed, 26 insertions(+)
diff --git a/block/pcache.c b/block/pcache.c
On 12/30/2016 10:18 AM, Mark Cave-Ayland wrote:
On 25/11/16 18:11, Guenter Roeck wrote:
Hi,
I am using virtio on sparc64 for my Linux kernel runtime tests.
Starting with qemu v2.7, I noticed that the kernel either gets stuck or
crashes.
After adding some debug information to the kernel, I
On Fri, Dec 30, 2016 at 03:33:11PM +0100, Igor Mammedov wrote:
> 'hotplugged' propperty is meant to be used on migration side when migrating
> source with hotplugged devices.
> However though it not exacly correct usage of 'hotplugged' property
> it's possible to set generic hotplugged property
On 25/12/16 04:02, 赵小强 wrote:
> ping
>
> At 2016-10-23 14:31:26, "xiaoqiang zhao" wrote:
>> This patch set aims for QOM'ifying code relate with sparc.
>> It is part of my QOM'ify work of qemu code base.
>>
>> xiaoqiang zhao (9):
>> hw/misc: QOM'ify eccmemctl.c
>>
Hi Andreas,
Does the new 2.8 release pass your tests? If so, I will close this bug
report.
ATB,
Mark.
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https://bugs.launchpad.net/bugs/1399943
Title:
qemu-system-sparc loses
On 24/12/16 04:00, Richard Henderson wrote:
> Cc: Mark Cave-Ayland
> Signed-off-by: Richard Henderson
> ---
> target/sparc/helper.c| 5 -
> target/sparc/helper.h| 1 -
> target/sparc/translate.c | 2 +-
> 3 files changed, 1
On Fri, Dec 30, 2016 at 03:28:34PM +0100, Igor Mammedov wrote:
> On Thu, 29 Dec 2016 20:38:15 -0200
> Eduardo Habkost wrote:
>
> > The "hotplugged" property is user visible, but it was never meant
> > to be set by the user. There are probably multiple ways to break
> > or
On 25/11/16 18:11, Guenter Roeck wrote:
> Hi,
>
> I am using virtio on sparc64 for my Linux kernel runtime tests.
>
> Starting with qemu v2.7, I noticed that the kernel either gets stuck or
> crashes.
> After adding some debug information to the kernel, I found that the
> problem happens
> in
W dniu 30.12.2016 o 18:14, Jean-Christophe DUBOIS pisze:
Le 30/12/2016 à 16:39, mar.krzeminski a écrit :
I got some time, and reproduced the problem. Here are some logs with
m25p80 debugs:
: decode_new_cmd: decoded new command:9f
: decode_new_cmd: populated jedec code
: decode_new_cmd:
On 15/12/16 17:04, Artyom Tarasenko wrote:
> Ping?
> Richard & Mark, can you please review the patches
> 04, 05, 08, 10, 11,12, 14, 15, 16, 18-23 and 25-28?
>
> Hope I haven't missed anything from the v0 review.
>
> It would be nice to get it into the 2.9 release.
No objections from me on the
Le 30/12/2016 à 16:39, mar.krzeminski a écrit :
I got some time, and reproduced the problem. Here are some logs with
m25p80 debugs:
: decode_new_cmd: decoded new command:9f
: decode_new_cmd: populated jedec code
: decode_new_cmd: decoded new command:0
: decode_new_cmd: decoded new command:0
The prefetch cache aims to improve the performance of sequential read data.
Of most interest here are the requests of a small size of data for sequential
read, such requests can be optimized by extending them and moving into
the prefetch cache. However, there are 2 issues:
- In aggregate only a
Signed-off-by: Pavel Butsykin
---
tests/Makefile.include | 3 +
tests/test-rbcache.c | 431 +
2 files changed, 434 insertions(+)
create mode 100644 tests/test-rbcache.c
diff --git a/tests/Makefile.include
The basic version of pcache driver for easy preparation of a patch set.
Signed-off-by: Pavel Butsykin
---
block/Makefile.objs | 1 +
block/pcache.c | 102
2 files changed, 103 insertions(+)
create mode 100644
This change will allow more efficient use of cache memory and filter the case
for which the pcache isn't efficient. We skip requests that are not required in
the optimization and thereby reducing the number of unnecessary readaheads.
Signed-off-by: Pavel Butsykin
---
In AIO write request completion we just drop all the intersecting nodes in the
cache, it's a simple way to keep the cache up-to-date.
Signed-off-by: Pavel Butsykin
---
block/pcache.c | 32 +++-
1 file changed, 31 insertions(+), 1 deletion(-)
Here the rbcache is used as a repository statistics requests, in fact, data
requests are not cached, so we have the ability to store a large number of
requests. We need statistics requests to determine the sequential requests.
Signed-off-by: Pavel Butsykin
---
Signed-off-by: Pavel Butsykin
---
qapi/block-core.json | 30 --
1 file changed, 28 insertions(+), 2 deletions(-)
diff --git a/qapi/block-core.json b/qapi/block-core.json
index 6b42216960..00a6e15db3 100644
--- a/qapi/block-core.json
+++
From: Corey Minyard
This allows IRQs to be created that can be found by other devices
so they can be used without having a direct tie to the irq.
Signed-off-by: Corey Minyard
---
hw/core/Makefile.objs | 1 +
hw/core/irqif.c | 39
W dniu 27.12.2016 o 18:08, Jean-Christophe DUBOIS pisze:
You can have a more detailed procedure on how to run Xvisor on Qemu
Sabrelite (with Linux guests if you wish) at the following URL.
https://github.com/avpatel/xvisor-next/blob/master/docs/arm/imx6-sabrelite.txt
You don't need to
From: Corey Minyard
This is so I2C devices can be found in the ACPI namespace. Currently
that's only IPMI, but devices can be easily added now.
Adding the devices required some PCI information, and the bus itself
to be added to the PCMachineState structure.
Note that this
From: Corey Minyard
Transfer the state information for the SMBus registers and
internal data so it will work on a VM transfer.
Signed-off-by: Corey Minyard
---
hw/acpi/piix4.c | 1 +
hw/i2c/pm_smbus.c | 19 +++
From: Corey Minyard
This adds a device that conforms to the SMBus alert extension. This
allows other I2C devices to register with this device so that when
they have data ready, it will interrupt the processor and allow the
processor to read from the alert device to see
From: Corey Minyard
This makes the function of the variable more clear and avoids
some conflicts in later patches.
Signed-off-by: Corey Minyard
---
hw/i386/pc.c | 37 +++--
hw/i386/pc_piix.c| 3 ++-
From: Corey Minyard
There was no block transfer code in pm_smbus.c, and it is needed
for some devices. So add it.
This adds both byte-by-byte block transfers and buffered block
transfers.
Signed-off-by: Corey Minyard
---
hw/i2c/pm_smbus.c |
From: Corey Minyard
Signed-off-by: Corey Minyard
---
default-configs/i386-softmmu.mak | 1 +
default-configs/x86_64-softmmu.mak | 1 +
hw/ipmi/Makefile.objs | 1 +
hw/ipmi/smbus_ipmi.c | 230
From: Corey Minyard
Signed-off-by: Corey Minyard
---
hw/acpi/aml-build.c | 40
include/hw/acpi/aml-build.h | 18 ++
2 files changed, 58 insertions(+)
diff --git a/hw/acpi/aml-build.c
From: Corey Minyard
This lets you add "alertname=" to specify an alert device
to use for letting the host know that the IPMI device has data
ready.
Signed-off-by: Corey Minyard
---
hw/ipmi/smbus_ipmi.c | 45
From: Corey Minyard
This uses the new irq interface to allow an ISA irq to be specified
by name. This will let other things (like the upcoming smbus alert
device) to specify ISA irqs by name.
To create an name ISA irq, add:
-device isa-irq,irq=,irq=
where you will use
From: Corey Minyard
The I2C block transfer commands was not implemented correctly, it
read a length byte and such like it was an smbus transfer.
So fix the smbus_read_block() and smbus_write_block() functions
so they can properly handle I2C transfers, and normal SMBus
From: Corey Minyard
Signed-off-by: Corey Minyard
---
hw/acpi/ipmi.c | 13 +++--
hw/i386/acpi-build.c | 2 +-
include/hw/acpi/ipmi.h | 2 +-
stubs/ipmi.c | 2 +-
4 files changed, 10 insertions(+), 9 deletions(-)
diff
From: Corey Minyard
Fix some spacing issues, remove extraneous comments, add some
defines instead of hard-coding numbers.
Signed-off-by: Corey Minyard
---
hw/i2c/pm_smbus.c | 58 ---
1 file changed,
From: Corey Minyard
Add a return value to the event handler. Some I2C devices will
NAK if they have no data, so allow them to do this. This required
the following changes:
Go through all the event handlers and change them to return int
and return 0.
Modify
From: Corey Minyard
Add the necessary code so that interrupts actually work from
the pm_smbus device.
Signed-off-by: Corey Minyard
---
hw/i2c/pm_smbus.c | 14 +-
hw/i2c/smbus_ich9.c | 17 +
From: Corey Minyard
The PIIX4 hardware has block transfer buffer always enabled in
the hardware, but the i801 does not. Add a parameter to pm_smbus_init
to force on the block transfer so the PIIX4 handler can enable this
by default, as it was disabled by default before.
From: Corey Minyard
The return value from getting the data may be an error, so
use an integer to hold it.
Signed-off-by: Corey Minyard
---
hw/i2c/smbus.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/i2c/smbus.c
From: Corey Minyard
It did have write capability, but the manual says the behavior
with write enabled is undefined. So just set an error in this
case.
Signed-off-by: Corey Minyard
---
hw/i2c/pm_smbus.c | 9 -
1 file changed, 4 insertions(+),
From: Corey Minyard
The I2C code has been modified to allow devices to NAK start
events, the SMBus code should, too.
Signed-off-by: Corey Minyard
---
hw/i2c/smbus.c | 11 +++
include/hw/i2c/smbus.h | 2 ++
2 files changed, 13
I've had this working for a while, primarily for my own testing
capability, but I guess I should put it out there for other people
as this interface is starting to show up in ARM64 devices and maybe
it's useful to others.
It's actually a few sets of patches that each accomplish a different
This patch adds readahead data to the cache. Here the readahead is a separate
asynchronous request, which doesn't depend on completion of filtered read
requests. The readahead is done only by the condition, if before the current
request there's sequential read data enough size. This information
We must be able to keep the actual data even for the removed nodes. This is
necessary when we need to defer the reading of node. Because there may come
an overlapping write to removed node in the interval between node completion
and reading of the node.
For this we move the removed nodes to
When updating the statistics sometimes i/O requests can overlap each other,
in this case the requests are not stored in the statistics. It's not very good,
especially when the requests have a small range of intersection.
We can cut the requests in the intersection and add the pieces of requests
Signed-off-by: Pavel Butsykin
---
block/pcache.c | 20
block/trace-events | 10 ++
2 files changed, 30 insertions(+)
diff --git a/block/pcache.c b/block/pcache.c
index 6d2b54cf78..2bce3efc59 100644
--- a/block/pcache.c
+++
RBCache provides functionality to cache the data from block devices
(basically). The range here is used as the main key for searching and storing
data. The cache is based on red-black trees, so basic operations search,
insert, delete are performed for O(log n).
It is important to note that QEMU
If there was a cache hit, but the status of the node is NODE_STATUS_INFLIGHT,
then this means that a readahead request for this node is in flight. In this
case,
we can wait for the completion of the readahead request, and then copy the
data. It allows us even more to optimize aio read requests.
Provided that the request size is less than the readahead size, a partial cache
hit can occur in the following three cases:
1. The request covers the bottom part of the node
2. The request covers the upper part of the node
3. The request is between two nodes and partially covers both of them
The
Why don't we use rbtree from glib? We need pointer to the parent node.
For optimal implementation storing of cached chunks in the rbtree need to
get next and previous nodes and content of parent node is very useful for
effective implementation of these functions. In this implementation of
rbtree
The pcache is directed to certain situations to sequential reads. This concept
allows to drop parts of the cache that were already used, which will reduce
the size of cache and the number of displaced nodes.
Signed-off-by: Pavel Butsykin
---
block/pcache.c | 26
Added read_cache_data_direct() allowing to read data from node to qiov.
And the simplest use case - read data from node provided that the node is
not in flight and fully covers read request.
Signed-off-by: Pavel Butsykin
---
block/pcache.c | 56
'hotplugged' propperty is meant to be used on migration side when migrating
source with hotplugged devices.
However though it not exacly correct usage of 'hotplugged' property
it's possible to set generic hotplugged property for CPU using
-cpu foo,hotplugged=on
or
-global foo.hotplugged=on
in
On Thu, 29 Dec 2016 20:38:15 -0200
Eduardo Habkost wrote:
> The "hotplugged" property is user visible, but it was never meant
> to be set by the user. There are probably multiple ways to break
> or crash device code by overriding the property. One example:
>
> $
On Tue, 27 Dec 2016 17:21:19 -0200
Eduardo Habkost wrote:
> Cc: "Michael S. Tsirkin"
> Cc: Laszlo Ersek
> Cc: Igor Mammedov
> Signed-off-by: Eduardo Habkost
Reviewed-by: Igor Mammedov
Hi,
While I was testing vhost-user using OVS 2.5 and DPDK 2.2.0 in the
host and testpmd dpdk 2.2.0 in the guest, I found that the commit
below breaks the environment and no packets gets into the guest.
dpdk port --> OVS --> vhost-user --> guest --> testpmd
^--- drops
Hi Peter,
sorry for late response - I missed your email.
> On 16 December 2016 at 13:22, wrote:
>> From: Marcin Krzeminski
>>
>> In case of MultiCPU SoC M3 is not always CPU0.
>> This commit add cpu_id property to allow set CPU
>>
On 29 December 2016 at 17:24, Programmingkid wrote:
> Programs running inside of QEMU can sometimes use more CPU time than is really
> needed. To solve this problem, we just need to throttle the virtual CPU. This
> feature will stop laptops from burning up.
>
> This
On 29 December 2016 at 13:48, Eric Blake wrote:
> On 12/28/2016 11:07 AM, Peter Maydell wrote:
>> Also this seems straightforwardly like a bug in glibc: it shouldn't
>> be making this kind of breaking change. makedev(3) on my Linux box
>> says nothing about needing sysmacros.h
This patch introduces a helper to query the iotlb entry for a
possible iova. This will be used by later device IOTLB API to enable
the capability for a dataplane (e.g vhost) to query the IOTLB.
Cc: Paolo Bonzini
Cc: Peter Crosthwaite
Cc: Richard
Cc: Paolo Bonzini
Acked-by: Paolo Bonzini
Signed-off-by: Jason Wang
---
memory.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/memory.c b/memory.c
index 33110e9..2bfc37f 100644
--- a/memory.c
+++ b/memory.c
@@
This patches implements Device IOTLB support for vhost kernel. This is
done through:
1) switch to use dma helpers when map/unmap vrings from vhost codes
2) introduce a set of VhostOps to:
- setting up device IOTLB request callback
- processing device IOTLB request
- processing device
Cc: Paolo Bonzini
Acked-by: Paolo Bonzini
Signed-off-by: Jason Wang
---
include/exec/memory.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/include/exec/memory.h b/include/exec/memory.h
index 358edfb..bec9756 100644
---
This patches enable the Address Translation Service support for virtio
pci devices. This is needed for a guest visible Device IOTLB
implementation and will be required by vhost device IOTLB API
implementation for intel IOMMU.
Cc: Michael S. Tsirkin
Signed-off-by: Jason Wang
We use the pointer to stack for key for new address space, this will break hash
table searching, fixing by g_malloc() a new key instead.
Cc: Michael S. Tsirkin
Cc: Paolo Bonzini
Cc: Richard Henderson
Cc: Eduardo Habkost
This patch enables device IOTLB support for intel iommu. The major
work is to implement QI device IOTLB descriptor processing and notify
the device through iommu notifier.
Cc: Paolo Bonzini
Cc: Richard Henderson
Cc: Eduardo Habkost
This patch provides ATSR which was a requirement for software that
wants to enable ATS on endpoint devices behind a Root Port. This is
done simply by setting ALL_PORTS which indicates all PCI-Express Root
Ports support ATS transactions.
Signed-off-by: Jason Wang
---
Hi all:
As the userspace vitio driver became popular, more and more request
were received for secure DMA environemt (DMAR). So this series tries
to make DMAR works for virtio/vhost. The idea is let virtio/vhost
co-work with userspace iommu implememtation. This is done through:
- for virtio, when
Currently, all virtio devices bypass IOMMU completely. This is because
address_space_memory is assumed and used during DMA emulation. This
patch converts the virtio core API to use DMA API. This idea is
- introducing a new transport specific helper to query the dma address
space. (only pci
To avoid duplicated name and ease debugging.
Cc: Michael S. Tsirkin
Cc: Paolo Bonzini
Cc: Richard Henderson
Cc: Eduardo Habkost
Acked-by: Peter Xu
Signed-off-by: Jason Wang
On 2016年12月30日 17:22, Peter Xu wrote:
On Fri, Dec 30, 2016 at 04:19:31PM +0800, Jason Wang wrote:
On 2016年12月16日 11:53, Jason Wang wrote:
On 2016年12月16日 10:53, Peter Xu wrote:
On Mon, Nov 07, 2016 at 03:09:47PM +0800, Jason Wang wrote:
To avoid duplicated name and ease debugging.
Cc:
On Fri, Dec 30, 2016 at 04:19:31PM +0800, Jason Wang wrote:
>
>
> On 2016年12月16日 11:53, Jason Wang wrote:
> >
> >
> >On 2016年12月16日 10:53, Peter Xu wrote:
> >>On Mon, Nov 07, 2016 at 03:09:47PM +0800, Jason Wang wrote:
> >>>To avoid duplicated name and ease debugging.
> >>>
> >>>Cc: Michael S.
On Fri, Dec 30, 2016 at 04:39:49AM +, Liu, Yi L wrote:
> > -Original Message-
> > From: Peter Xu [mailto:pet...@redhat.com]
> > Sent: Friday, December 30, 2016 11:44 AM
> > To: Liu, Yi L
> > Cc: Tian, Kevin ; Lan, Tianyu
IOAPIC interrupts need this. Let's be prepared.
Signed-off-by: Peter Xu
---
lib/x86/intel-iommu.c | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/lib/x86/intel-iommu.c b/lib/x86/intel-iommu.c
index a3ce678..0585248 100644
---
To allow concurrent allocation of irte index. Meanwhile, move the IRTE
setup debug line into the alloc since vtd_setup_msi() might not be the
only one to dump this info in the future.
Signed-off-by: Peter Xu
---
lib/x86/intel-iommu.c | 10 +++---
1 file changed, 7
Move it out of x86/ioapic.c since it can be further re-used. Also,
renaming into TRIGGER_*.
Signed-off-by: Peter Xu
---
lib/x86/apic.h | 6 ++
x86/ioapic.c | 34 --
2 files changed, 22 insertions(+), 18 deletions(-)
diff --git
Signed-off-by: Peter Xu
---
x86/intel-iommu.c | 12
1 file changed, 12 insertions(+)
diff --git a/x86/intel-iommu.c b/x86/intel-iommu.c
index 753f90e..59171a1 100644
--- a/x86/intel-iommu.c
+++ b/x86/intel-iommu.c
@@ -21,6 +21,8 @@ void vtd_test_dmar(struct
To fetch INTx irq line number.
Signed-off-by: Peter Xu
---
lib/pci.c | 5 +
lib/pci.h | 1 +
2 files changed, 6 insertions(+)
diff --git a/lib/pci.c b/lib/pci.c
index 6416191..a7cfacb 100644
--- a/lib/pci.c
+++ b/lib/pci.c
@@ -327,6 +327,11 @@ void pci_scan_bars(struct
Provide some gcc-builtin atomic ops.
Signed-off-by: Peter Xu
---
lib/asm-generic/atomic.h | 21 +
lib/x86/atomic.h | 2 ++
2 files changed, 23 insertions(+)
create mode 100644 lib/asm-generic/atomic.h
diff --git a/lib/asm-generic/atomic.h
IOAPIC irqs are line-based irqs comparing to MSI ones (which are
memory-based). To make it complete, let's also test IOAPIC interrupts
in the IR testcase.
Signed-off-by: Peter Xu
---
lib/x86/intel-iommu.c | 40
lib/x86/intel-iommu.h |
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