Re: [Qemu-devel] [PATCH v3 08/10] target/i386: optimize cross-page direct jumps in softmmu

On 04/26/2017 08:23 AM, Emilio G. Cota wrote: Instead of unconditionally exiting to the exec loop, use the gen_jr helper to jump to the target if it is valid. Reviewed-by: Richard Henderson r~

Re: [Qemu-devel] [PATCH v3 09/10] target/i386: optimize indirect branches

On 04/26/2017 08:23 AM, Emilio G. Cota wrote: Speed up indirect branches by jumping to the target if it is valid. Reviewed-by: Richard Henderson r~

Re: [Qemu-devel] [PATCH] monitor: Check whether TCG is enabled before running the "info jit" code

* Thomas Huth (th...@redhat.com) wrote: > The "info jit" command currently aborts on Mac OS X with the message > "qemu_mutex_lock: Invalid argument" when running with "-M accel=qtest". > We should only call into the TCG code here if TCG has really been > enabled and initialized. > >

Re: [Qemu-devel] [PATCH RESEND v2 01/18] net/colo: Add notifier/callback related helpers for filter

On 2017/4/25 19:40, Jason Wang wrote: On 2017年04月22日 16:35, zhanghailiang wrote: We will use this notifier to help COLO to notify filter object to do something, like do checkpoint, or process failover event. Cc: Jason Wang Signed-off-by:

[Qemu-devel] [PATCH v2 3/4] net/socket: Convert error report message to Error

Currently, net_socket_mcast_create(), net_socket_fd_init_dgram() and net_socket_fd_init() use the function such as fprintf(), perror() to report an error message. Now, convert these functions to Error. CC: jasow...@redhat.com, arm...@redhat.com Signed-off-by: Mao Zhongyi

Re: [Qemu-devel] [PATCH RFC 1/1] vfio/pci: Fix incorrect error message

Hi Dong, On 25/04/2017 06:56, Dong Jia Shi wrote: > * Dong Jia Shi [2017-04-25 06:52:01 +0200]: > > Hey Alex, > > Please ignore the "RFC" tag in the subject. Sorry for the mistake. > >> When the "No host device provided" error occurs, the hint message >> that

[Qemu-devel] [PATCH v2 4/4] net/net: Convert parse_host_port() to Error

CC: berra...@redhat.com, kra...@redhat.com, pbonz...@redhat.com, jasow...@redhat.com, arm...@redhat.com Signed-off-by: Mao Zhongyi --- include/qemu/sockets.h | 2 +- net/net.c | 21 - net/socket.c | 10 +++--- 3 files

[Qemu-devel] [PATCH v2 2/4] net/socket: Improve -net socket error reporting

When -net socket fails, it first reports a specific error, then a generic one, like this: $ qemu-system-x86_64 -net socket, qemu-system-x86_64: -net socket: exactly one of fd=, listen=, connect=, mcast= or udp= is required qemu-system-x86_64: -net socket: Device 'socket' could not be

[Qemu-devel] [PATCH v2 1/4] net/socket: Convert the non-blocking connection mechanism to QIOchannel

Currently, socket connection in net is realized by an old mechanism which is non-blocking. That old mechanism may cause net blocks on DNS lookups and QEmu has already replaced it with QIOchannel in many features, such as migration. Convert it to QIOchannel for net as well. CC:

[Qemu-devel] [PATCH v2 0/4] Convert non-blocking connect and fix its error reporting

v2: * PATCH 02 reworking of patch 2 following Markus's suggestion that convert error_report() in the function called by net_socket_*_init() to Error. Also add many error handling information. * PATCH 03 net_socket_mcast_create(), net_socket_fd_init_dgram() and net_socket_fd_init() use

Re: [Qemu-devel] [PATCH 2/2] qemu-img: fix some spelling errors

On Wed, Apr 26, 2017 at 3:11 AM, Max Reitz wrote: > On 24.04.2017 17:53, Eric Blake wrote: >> On 04/24/2017 10:47 AM, Eric Blake wrote: >>> On 04/24/2017 10:37 AM, Philippe Mathieu-Daudé wrote: >>> >> /* >> - * Returns true iff the first sector pointed to by 'buf'

Re: [Qemu-devel] [PATCH v3 06/10] target/arm: optimize indirect branches

On 04/26/2017 08:23 AM, Emilio G. Cota wrote: +static bool gen_jr;... case DISAS_JUMP: +if (gen_jr) { Why the variable? Why not just try the goto_ptr for any DISAS_JUMP? r~

[Qemu-devel] [PATCH 2/2] ramblock: add new hmp command "info ramblock"

To dump information about ramblocks. It looks like: (qemu) info ramblock Block NamePSize Offset Used Total /objects/mem 2M 0x 0x8000 0x8000 vga.vram 4K

[Qemu-devel] [PATCH 6/7] sockets: Limit SocketAddressLegacy except to external interfaces

SocketAddressLegacy is a simple union, and simple unions are awkward: they have their variant members wrapped in a "data" object on the wire, and require additional indirections in C. SocketAddress is the equivalent flat union. Convert all users of SocketAddressLegacy to SocketAddress, except

[Qemu-devel] [PATCH 0/2] ramblock: add hmp command "info ramblock"

Sometimes I would like to know ramblock info for a VM. This command would help. It provides a way to dump ramblock info. Currently the list is by default sorted by size, though I think it's good enough. Please review, thanks. Peter Xu (2): ramblock: add RAMBLOCK_FOREACH() ramblock: add new

[Qemu-devel] [PATCH 4/7] sockets: Rename SocketAddress to SocketAddressLegacy

The next commit will rename SocketAddressFlat to SocketAddress, and the commit after that will replace most uses of SocketAddressLegacy by SocketAddress, replacing most of this commit's renames right back. Note that checkpatch emits a few "line over 80 characters" warnings. The long lines are all

Re: [Qemu-devel] [PATCH v2 05/18] COLO: Handle shutdown command for VM in COLO state

On 2017/4/24 22:51, Eric Blake wrote: On 04/22/2017 03:25 AM, zhanghailiang wrote: If VM is in COLO FT state, we need to do some extra works before starting normal shutdown process. Secondary VM will ignore the shutdown command if users issue it directly to Secondary VM. COLO will capture

Re: [Qemu-devel] [PATCH 1/3] colo-compare: serialize compare thread's initialization with main thread

On 2017/4/25 19:33, Jason Wang wrote: On 2017年04月25日 17:59, Hailiang Zhang wrote: On 2017/4/25 16:41, Jason Wang wrote: On 2017年04月24日 14:03, Hailiang Zhang wrote: On 2017/4/24 12:10, Jason Wang wrote: On 2017年04月20日 15:46, zhanghailiang wrote: We call qemu_chr_fe_set_handlers() in

[Qemu-devel] [PATCH 3/7] qapi: New QAPI_CLONE_MEMBERS()

QAPI_CLONE() returns a newly allocated QAPI object. Inconvenient when we want to clone into an existing object. QAPI_CLONE_MEMBERS() does exactly that. Signed-off-by: Markus Armbruster --- include/qapi/clone-visitor.h | 14 ++ qapi/qapi-clone-visitor.c| 13

Re: [Qemu-devel] [PATCH v3 01/10] tcg-runtime: add lookup_tb_ptr helper

On 26/04/2017 08:23, Emilio G. Cota wrote: > This paves the way for upcoming work. > > Reviewed-by: Richard Henderson > Signed-off-by: Emilio G. Cota > --- > tcg-runtime.c | 21 + > tcg/tcg-runtime.h | 2 ++ > tcg/tcg.h | 1

[Qemu-devel] [PATCH 2/7] sockets: Prepare inet_parse() for flattened SocketAddress

I'm going to flatten SocketAddress: rename SocketAddress to SocketAddressLegacy, SocketAddressFlat to SocketAddress, eliminate SocketAddressLegacy except in external interfaces. inet_parse() returns a newly allocated InetSocketAddress. Lift the allocation from inet_parse() into its caller

[Qemu-devel] [PATCH 0/7] sockets: Flatten SocketAddress except in external interfaces

SocketAddress is a simple union, and simple unions are awkward: they have their variant members wrapped in a "data" object on the wire, and require additional indirections in C. Flatten it as follows: rename SocketAddress to SocketAddressLegacy, rename its flat sibling SocketAddressFlat to

[Qemu-devel] [PATCH 7/7] socket: Delete unused helper socket_address_crumple()

Signed-off-by: Markus Armbruster --- include/qemu/sockets.h | 11 --- util/qemu-sockets.c| 31 --- 2 files changed, 42 deletions(-) diff --git a/include/qemu/sockets.h b/include/qemu/sockets.h index a7da674..5b12252 100644 ---

[Qemu-devel] [PATCH 1/7] sockets: Prepare vsock_parse() for flattened SocketAddress

I'm going to flatten SocketAddress: rename SocketAddress to SocketAddressLegacy, SocketAddressFlat to SocketAddress, eliminate SocketAddressLegacy except in external interfaces. vsock_parse() returns a newly allocated VsockSocketAddress. Lift the allocation from vsock_parse() into its caller

[Qemu-devel] [PATCH] ram: Split dirty bitmap by RAMBlock

Both the ram bitmap and the unsent bitmap are split by RAMBlock. Signed-off-by: Juan Quintela -- Fix compilation when DEBUG_POSTCOPY is enabled (thanks Hailiang) Signed-off-by: Juan Quintela --- include/exec/ram_addr.h | 13 +-

Re: [Qemu-devel] [PATCH 10/26] audio: Remove INT32

Philippe Mathieu-Daudé wrote: > Hi Juan, is there a benefit in not squashing the previous stdint commits? Easier to commit/review/rebase. I can do if you preffer. Later, Juan.

[Qemu-devel] [PATCH v2] Issue a deprecation warning if the user specifies the "-hdachs" option.

If the user needs to specify the disk geometry, the corresponding parameters of the "-drive" option should be used instead. "-hdachs" is considered as deprecated and might be removed soon. Reviewed-by: Eric Blake Signed-off-by: Thomas Huth --- v2: Removed

[Qemu-devel] [PATCH 1/2] ramblock: add RAMBLOCK_FOREACH()

So that it can simplifies the iterators. Signed-off-by: Peter Xu --- exec.c | 22 +++--- include/exec/ramlist.h | 5 + migration/ram.c| 15 --- 3 files changed, 24 insertions(+), 18 deletions(-) diff --git a/exec.c

Re: [Qemu-devel] [PATCH 05/26] audio: Remove UINT8

Philippe Mathieu-Daudé wrote: > Hi Juan, > > On 04/25/2017 07:37 PM, Juan Quintela wrote: >> uint8_t has existed since . all this century? >> >> Signed-off-by: Juan Quintela >> --- >> hw/audio/fmopl.c | 8 >> hw/audio/fmopl.h | 39

[Qemu-devel] [PULL 46/48] e500, book3s: mfspr 259: Register mapped/aliased SPRG3 user read

From: Bernhard Kaindl This patch registers mfspr 259 for Book3S and e500 family cores following this research: mfspr 259 provides read-only mapped user access to SPRG3(SPR 275) according to: - PowerISA 2.02, Book III (documents implementation starting with

Re: [Qemu-devel] [PATCH for-2.10] net/tap: Replace tap-haiku.c and tap-aix.c by a generic tap-stub.c

On 03.04.2017 14:22, Philippe Mathieu-Daudé wrote: > On 04/03/2017 09:05 AM, Thomas Huth wrote: >> The files tap-haiku.c and tap-aix.c are identical (except one line >> of error message). We should avoid such code duplication, so replace >> these by a generic tap-stub.c file instead. >> >>

Re: [Qemu-devel] [PATCH] tcg: Initialize return value after exit_atomic

Richard Henderson writes: > On 04/25/2017 01:21 PM, Nikunj A Dadhania wrote: >> Richard Henderson writes: >> >>> Users of tcg_gen_atomic_cmpxchg and do_atomic_op rightfully utilize >>> the output. Even though this code is dead, it gets translated, and >>>

[Qemu-devel] [PULL 48/48] MAINTAINERS: Remove myself from e500

From: Scott Wood I recently left Freescale/NXP, and even before that it'd been a few years since I was actively involved in KVM/QEMU work. Signed-off-by: Scott Wood Signed-off-by: David Gibson --- MAINTAINERS | 3 --- 1 file

[Qemu-devel] [PATCH 5/7] sockets: Rename SocketAddressFlat to SocketAddress

Signed-off-by: Markus Armbruster --- block/gluster.c| 48 block/nbd.c| 26 +- block/sheepdog.c | 6 +++--- include/qemu/sockets.h | 4 ++-- qapi-schema.json | 14

[Qemu-devel] [PATCH v5] Split migration bitmaps by ramblock

Hi I make it compile with DEBUG_POSTCOPY enabled. Please review. Later, Juan. [v4] Make postcopy_chunk_hostpages work at ramblock level, so we don't do the double look over ramblocks. Tested that postcopy still works as expected. Later, Juan. [v3] I messed up previous submission and sent

[Qemu-devel] [PULL 47/48] target/ppc: Style fixes

This makes a small step fixing one of many style problems that exist in the older ppc code. This removes spaces between function (or macro) name and the following '('. Signed-off-by: David Gibson --- target/ppc/translate_init.c | 372

[Qemu-devel] [PULL 40/48] ppc/pnv: populate device tree for serial devices

From: Cédric Le Goater Signed-off-by: Cédric Le Goater Reviewed-by: David Gibson Signed-off-by: David Gibson --- hw/ppc/pnv.c | 33 + 1 file changed, 33 insertions(+) diff

[Qemu-devel] [PULL 43/48] ppc/pnv: generate an OEM SEL event on shutdown

From: Cédric Le Goater OpenPOWER systems expect to be notified with such an event before a shutdown or a reboot. An OEM SEL message is sent with specific identifiers and a user data containing the request : OFF or REBOOT. Signed-off-by: Cédric Le Goater

Re: [Qemu-devel] [PATCH 00/26] Audio Cleanup

Juan Quintela wrote: > Hi Hi Gerd I forgot to CC'd you, sorry. Later, Juan. > This are an old series that were hidden on my harddisk. To give you > one idea, I had a patch to remove this: > > commit 8307c294a355bbf3c5352e00877365b0cda66d52 > Author: Nutan Shinde

[Qemu-devel] [PULL 34/48] target/ppc: Fix size of struct PPCElfPrstatus

From: Anton Blanchard gdb refuses to parse QEMU memory dumps because struct PPCElfPrstatus is the wrong size. Fix it. Signed-off-by: Anton Blanchard Fixes: e62fbc54d459 ("target-ppc: dump-guest-memory support") Signed-off-by: David Gibson

[Qemu-devel] [PULL 37/48] ppc/pnv: enable only one LPC bus

From: Cédric Le Goater The default LPC bus of a multichip system is on chip 0. It's recognized by the firmware (skiboot) using a "primary" property in the device tree. We introduce a pnv_chip_lpc_offset() routine to locate the LPC node of a chip and set the property directly from

[Qemu-devel] [PULL 45/48] target/ppc: Flush TLB on write to PIDR

From: Suraj Jitindar Singh The PIDR (process id register) is used to store the id of the currently running process, which is used to select the process table entry used to perform address translation. This means that when we write to this register all the translations

[Qemu-devel] [PULL 27/48] ppc/pnv: Add cut down PSI bridge model and hookup external interrupt

From: Cédric Le Goater The Processor Service Interface (PSI) Controller is one of the engines of the "Bridge" unit which connects the different interfaces to the Power Processor. This adds just enough of the PSI bridge to handle various on-chip and the one external interrupt. The

[Qemu-devel] [PULL 32/48] ipmi: introduce an ipmi_bmc_sdr_find() API

From: Cédric Le Goater This patch exposes a new IPMI routine to query a sdr entry from the sdr table maintained by the IPMI BMC simulator. The API is very similar to the internal sdr_find_entry() routine and should be used the same way to query one or all sdrs. A typical use

[Qemu-devel] [PULL 29/48] ppc: add IPMI support

From: Cédric Le Goater OpenPOWER systems use a BT device to communicate with the BMC. Provide support for it. Signed-off-by: Cédric Le Goater Signed-off-by: David Gibson --- default-configs/ppc64-softmmu.mak | 4 1 file changed,

[Qemu-devel] [PULL 44/48] spapr-cpu-core: Release ICPState object during CPU unrealization

From: Bharata B Rao Recent commits that re-organized ICPState object missed to destroy the object when CPU is unrealized. Fix this so that CPU unplug doesn't abort QEMU. Signed-off-by: Bharata B Rao Reviewed-by: Cédric Le Goater

[Qemu-devel] [PULL 36/48] ppc/pnv: Add support for POWER8+ LPC Controller

From: Benjamin Herrenschmidt It adds the Naples chip which supports proper LPC interrupts via the LPC controller rather than via an external CPLD. Signed-off-by: Benjamin Herrenschmidt [clg: - updated for qemu-2.9 - ported on latest

[Qemu-devel] [PULL 30/48] ipmi: use a file to load SDRs

From: Cédric Le Goater The IPMI BMC simulator populates the sdr/sensor tables with a minimal set of entries (Watchdog). But some qemu platforms might want to use extra entries for their custom needs. This patch modifies slighty the initializing routine to take into account a

[Qemu-devel] [PULL 41/48] ppc/pnv: populate device tree for IPMI BT devices

From: Cédric Le Goater When an ipmi-bt device [1] is defined on the ISA bus, we need to populate the device tree with the object properties. Such devices are created with the command line options : -device ipmi-bmc-sim,id=bmc0 -device isa-ipmi-bt,bmc=bmc0,irq=10 [1]

[Qemu-devel] [PULL 42/48] ppc/pnv: add initial IPMI sensors for the BMC simulator

From: Cédric Le Goater Skiboot, the firmware for the PowerNV platform, expects the BMC to provide some specific IPMI sensors. These sensors are exposed in the device tree and their values are updated by the firmware at boot time. Sensors of interest are : "FW Boot

[Qemu-devel] [PULL 39/48] ppc/pnv: populate device tree for RTC devices

From: Cédric Le Goater The code could be common to any ISA device but we are missing the IO length. Signed-off-by: Cédric Le Goater Reviewed-by: David Gibson Signed-off-by: David Gibson --- hw/ppc/pnv.c

[Qemu-devel] [PULL 25/48] ppc/pnv: add a helper to calculate MMIO addresses registers

From: Cédric Le Goater Some controllers (ICP, PSI) have a base register address which is calculated using the chip id. Signed-off-by: Cédric Le Goater Reviewed-by: David Gibson Signed-off-by: David Gibson

[Qemu-devel] [PULL 38/48] ppc/pnv: scan ISA bus to populate device tree

From: Cédric Le Goater This is an empty shell that we will use to include nodes in the device tree for ISA devices. We expect RTC, UART and IPMI BT devices. Signed-off-by: Cédric Le Goater Reviewed-by: David Gibson Signed-off-by:

[Qemu-devel] [PULL 33/48] ipmi: introduce an ipmi_bmc_gen_event() API

From: Cédric Le Goater It will be used to fill the message buffer with custom events expected by some systems. Typically, an Open PowerNV platform guest is notified with an OEM SEL message before a shutdown or a reboot. Signed-off-by: Cédric Le Goater Acked-by:

[Qemu-devel] [PULL 35/48] spapr: remove the 'nr_servers' field from the machine

From: Cédric Le Goater xics_system_init() does not need 'nr_servers' anymore as it is only used to define the 'interrupt-controller' node in the device tree. So let's just compute the value when calling spapr_dt_xics(). This also gives us an opportunity to simplify the

[Qemu-devel] [PULL 28/48] ppc/pnv: Add OCC model stub with interrupt support

From: Benjamin Herrenschmidt The OCC is an on-chip microcontroller based on a ppc405 core used for various power management tasks. It comes with a pile of additional hardware sitting on the PIB (aka XSCOM bus). At this point we don't emulate it (nor plan to do so).

[Qemu-devel] [PULL 23/48] ppc/pnv: extend the machine with a InterruptStatsProvider interface

From: Cédric Le Goater Signed-off-by: Cédric Le Goater Signed-off-by: David Gibson --- hw/ppc/pnv.c | 17 + 1 file changed, 17 insertions(+) diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index 0a0cfe3..f3623ee 100644 ---

[Qemu-devel] [PULL 26/48] ppc/pnv: add memory regions for the ICP registers

From: Cédric Le Goater This provides to a PowerNV chip (POWER8) access to the Interrupt Management area, which contains the registers of the Interrupt Control Presenters of each thread. These are used to accept, return, forward interrupts in the system. This area is modeled with

[Qemu-devel] [PULL 21/48] ppc/pnv: add a PnvICPState object

From: Cédric Le Goater This provides a new ICPState object for the PowerNV machine (POWER8). Access to the Interrupt Management area is done though a memory region. It contains the registers of the Interrupt Control Presenters of each thread which are used to accept, return,

[Qemu-devel] [PULL 20/48] ppc/xics: add a realize() handler to ICPStateClass

From: Cédric Le Goater It will be used by derived classes in PowerNV for customization. Signed-off-by: Cédric Le Goater Reviewed-by: David Gibson Signed-off-by: David Gibson --- hw/intc/xics.c| 5

[Qemu-devel] [PULL 31/48] ipmi: provide support for FRUs

From: Cédric Le Goater This patch provides a simple FRU support for the BMC simulator. FRUs are loaded from a file which name is specified in the object properties, each entry having a fixed size, also specified in the properties. If the file is unknown or not accessible for some

[Qemu-devel] [PULL 24/48] ppc/pnv: create the ICP object under PnvCore

From: Cédric Le Goater Each thread of a core is linked to an ICP. This allocates a PnvICPState object before the PowerPCCPU object is realized and lets the XICSFabric do the store under the 'intc' backlink when xics_cpu_setup() is called. This modeling removes the need of

[Qemu-devel] [PULL 13/48] target-ppc/kvm: Enable in-kernel TCE acceleration for multi-tce

From: Alexey Kardashevskiy This enables in-kernel handling of H_PUT_TCE_INDIRECT and H_STUFF_TCE hypercalls. The host kernel support is there since v4.6, in particular d3695aa4f452 ("KVM: PPC: Add support for multiple-TCE hcalls"). H_PUT_TCE is already accelerated and does not

[Qemu-devel] [PULL 12/48] spapr: Workaround for broken radix guests

From: Sam Bobroff For a little while around 4.9, Linux kernels that saw the radix bit in ibm,pa-features would attempt to set up the MMU as if they were a hypervisor, even if they were a guest, which would cause them to crash. Work around this by detecting pre-ISA 3.0

[Qemu-devel] [PULL 22/48] ppc/pnv: extend the machine with a XICSFabric interface

From: Cédric Le Goater A XICSFabric QOM interface is used by the XICS layer to manipulate the ICP and ICS objects. Let's define the associated handlers for the PowerNV machine. All handlers should be defined even if there is no ICS under the PowerNV machine yet. Signed-off-by:

[Qemu-devel] [PULL 15/48] spapr_pci: Removed unused include

From: Alexey Kardashevskiy Signed-off-by: Alexey Kardashevskiy Signed-off-by: David Gibson --- hw/ppc/spapr_pci.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c index 097ebdd..e7567e2

[Qemu-devel] [PULL 10/48] spapr: move spapr_populate_pa_features()

From: Sam Bobroff In the next patch, spapr_fixup_cpu_dt() will need to call spapr_populate_pa_features() so move it's definition up without making any other changes. Signed-off-by: Sam Bobroff Signed-off-by: David Gibson

[Qemu-devel] [PULL 19/48] spapr: allocate the ICPState object from under sPAPRCPUCore

From: Cédric Le Goater Today, all the ICPs are created before the CPUs, stored in an array under the sPAPR machine and linked to the CPU when the core threads are realized. This modeling brings some complexity when a lookup in the array is required and it can be simplified by

[Qemu-devel] [PULL 18/48] spapr: move the IRQ server number mapping under the machine

From: Cédric Le Goater This is the second step to abstract the IRQ 'server' number of the XICS layer. Now that the prereq cleanups have been done in the previous patch, we can move down the 'cpu_dt_id' to 'cpu_index' mapping in the sPAPR machine handler. Signed-off-by: Cédric Le

[Qemu-devel] [PULL 14/48] spapr_pci: Warn when RAM page size is not enabled in IOMMU page mask

From: Alexey Kardashevskiy If a page size used by QEMU is not enabled in the PHB IOMMU page mask, in-kernel acceleration of TCE handling won't be enabled and performance might be slower than expected. This prints a warning if system page size is not enabled. This should print a

[Qemu-devel] [PULL 09/48] target/ppc: Implement H_REGISTER_PROCESS_TABLE H_CALL

From: Suraj Jitindar Singh The H_REGISTER_PROCESS_TABLE H_CALL is used by a guest to indicate to the hypervisor where in memory its process table is and how translation should be performed using this process table. Provide the implementation of this H_CALL for a guest.

[Qemu-devel] [PULL 07/48] target-ppc: support KVM_CAP_PPC_MMU_RADIX, KVM_CAP_PPC_MMU_HASH_V3

From: Sam Bobroff Query and cache the value of two new KVM capabilities that indicate KVM's support for new radix and hash modes of the MMU. Signed-off-by: Sam Bobroff Signed-off-by: David Gibson ---

[Qemu-devel] [PULL 11/48] spapr: Enable ISA 3.0 MMU mode selection via CAS

From: Sam Bobroff Add the new node, /chosen/ibm,arch-vec-5-platform-support to the device tree. This allows the guest to determine which modes are supported by the hypervisor. Update the option vector processing in h_client_architecture_support() to handle the new MMU

[Qemu-devel] [PULL 17/48] ppc/xics: introduce an 'intc' backlink under PowerPCCPU

From: Cédric Le Goater Today, the ICPState array of the sPAPR machine is indexed with 'cpu_index' of the CPUState. This numbering of CPUs is internal to QEMU and the guest only knows about what is exposed in the device tree, that is the 'cpu_dt_id'. This is why sPAPR uses the

[Qemu-devel] [PULL 16/48] target/ppc: Add ibm, processor-radix-AP-encodings for TCG

From: Suraj Jitindar Singh The ibm,processor-radix-AP-encodings device tree property of the cpu node is used to specify the radix mode supported page sizes of the processor to the guest os. Contained in the top 3 bits of the msb is the actual page size (AP) encoding

[Qemu-devel] [PULL 02/48] pseries: Add pseries-2.10 machine type

Signed-off-by: David Gibson --- hw/ppc/spapr.c | 23 +-- 1 file changed, 21 insertions(+), 2 deletions(-) diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index 35db949..de5db75 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -3158,18 +3158,37 @@

[Qemu-devel] [PULL 08/48] target/ppc: Add new H-CALL shells for in memory table translation

From: Suraj Jitindar Singh The use of the new in memory tables introduced in ISAv3.00 for translation, also referred to as process tables, requires the introduction of 3 new H-CALLs; H_REGISTER_PROCESS_TABLE, H_CLEAN_SLB, and H_INVALIDATE_PID. Add shells for each of

[Qemu-devel] [PULL 03/48] ppc/spapr: QOM'ify sPAPRRTCState

From: Cédric Le Goater Also use an 'sPAPRRTCState' attribute under the sPAPR machine to hold the RTC object. Overall, these changes remove an unnecessary and implicit dependency on SysBus. Signed-off-by: Cédric Le Goater Signed-off-by: David Gibson

[Qemu-devel] [PULL 05/48] target-ppc: kvm: make use of KVM_CREATE_SPAPR_TCE_64

From: Alexey Kardashevskiy KVM_CAP_SPAPR_TCE capability allows creating TCE tables in KVM which allows having in-kernel acceleration for H_PUT_TCE_xxx hypercalls. However it only supports 32bit DMA windows at zero bus offset. There is a new KVM_CAP_SPAPR_TCE_64 capability which

[Qemu-devel] [PULL 06/48] spapr: Add ibm, processor-radix-AP-encodings to the device tree

From: Sam Bobroff Use the new ioctl, KVM_PPC_GET_RMMU_INFO, to fetch radix MMU information from KVM and present the page encodings in the device tree under ibm,processor-radix-AP-encodings. This provides page size information to the guest which is necessary for it to use

[Qemu-devel] [PULL 01/48] target/ppc: Improve accuracy of guest HTM availability on P8s

From: Sam Bobroff On Power8 hosts it is currently theoretically possible for QEMU/KVM-HV guests to receive a ibm,pa-features property indicating that HTM support is available when it is not. The situation would occur if the platform firmware of a Power8 host cleared the

[Qemu-devel] [PULL 04/48] hw/ppc/pnv: Classify the "PowerNV Chip" devices as CPU devices

From: Thomas Huth The devices that are derived from TYPE_PNV_CHIP currently show up as "uncategorized" devices in the help text of "-device ?". Since they obviously are related to the CPU, let's put them into the CPU category instead. Signed-off-by: Thomas Huth

[Qemu-devel] [PULL 00/48] ppc-for-2.10 queue 20170426

-20170426 for you to fetch changes up to df02d2ca8b23ba1fff137090a65731c68cf1393d: MAINTAINERS: Remove myself from e500 (2017-04-26 12:41:56 +1000) ppc patch queue 2017-04-26 Here's a respind of my first pull request for qemu-2.10

[Qemu-devel] [PATCH] virtio-net: fix wild pointer when remove virtio-net queues

The tx_bh or tx_timer will free in virtio_net_del_queue() function, when removing virtio-net queues if the guest doesn't support multiqueue. But it might be still referenced by virtio_net_set_status(), which needs to be set NULL. And also the tx_waiting needs to be set zero to prevent

Re: [Qemu-devel] [PULL 0/21] Please pull xen-20170421-tag for 2.10

Stefano Stabellini writes: > On Tue, 25 Apr 2017, Markus Armbruster wrote: >> Stefano Stabellini writes: [...] >> > diff --git a/hw/9pfs/xen-9pfs.h b/hw/9pfs/xen-9pfs.h >> > new file mode 100644 >> > index 000..6e33d77 >> > --- /dev/null >> >

Re: [Qemu-devel] [PATCH 2/2] ipmi: don't try to open a NULL filename

On 04/26/2017 04:43 AM, David Gibson wrote: > On Tue, Apr 25, 2017 at 04:06:17PM +0200, Cédric Le Goater wrote: >> On 04/25/2017 03:31 PM, Peter Maydell wrote: >>> On 25 April 2017 at 07:51, Cédric Le Goater wrote: Currenlty, the code relies on the fact that open() handles

[Qemu-devel] [PATCH v3 10/10] tb-hash: improve tb_jmp_cache hash function in user mode

Optimizations to cross-page chaining and indirect branches make performance more sensitive to the hit rate of tb_jmp_cache. The constraint of reserving some bits for the page number lowers the achievable quality of the hashing function. However, user-mode does not have this requirement. Thus,

[Qemu-devel] [PATCH v3 05/10] target/arm: optimize cross-page direct jumps in softmmu

Instead of unconditionally exiting to the exec loop, use the lookup_and_goto_ptr helper to jump to the target if it is valid. Perf impact: see next commit's log. Signed-off-by: Emilio G. Cota --- target/arm/translate.c | 6 +- 1 file changed, 5 insertions(+), 1 deletion(-)

[Qemu-devel] [PATCH v3 09/10] target/i386: optimize indirect branches

Speed up indirect branches by jumping to the target if it is valid. Softmmu measurements (see later commit for user-mode numbers): Note: baseline (i.e. speedup == 1x) is QEMU v2.9.0. - SPECint06 (test set), x86_64-softmmu (Ubuntu 16.04 guest). Host: Intel i7-4790K @ 4.00GHz

[Qemu-devel] [PATCH v3 02/10] tcg: introduce goto_ptr opcode

Signed-off-by: Emilio G. Cota --- tcg/aarch64/tcg-target.h | 1 + tcg/arm/tcg-target.h | 1 + tcg/i386/tcg-target.h| 1 + tcg/ia64/tcg-target.h| 1 + tcg/mips/tcg-target.h| 1 + tcg/ppc/tcg-target.h | 1 + tcg/s390/tcg-target.h| 1 + tcg/sparc/tcg-target.h

[Qemu-devel] [PATCH v3 01/10] tcg-runtime: add lookup_tb_ptr helper

This paves the way for upcoming work. Reviewed-by: Richard Henderson Signed-off-by: Emilio G. Cota --- tcg-runtime.c | 21 + tcg/tcg-runtime.h | 2 ++ tcg/tcg.h | 1 + 3 files changed, 24 insertions(+) diff --git

[Qemu-devel] [PATCH v3 07/10] target/i386: introduce gen_jr helper to generate lookup_and_goto_ptr

This helper will be used by subsequent changes. Signed-off-by: Emilio G. Cota --- target/i386/translate.c | 25 - 1 file changed, 20 insertions(+), 5 deletions(-) diff --git a/target/i386/translate.c b/target/i386/translate.c index 1d1372f..59f6eaa

[Qemu-devel] [PATCH v3 06/10] target/arm: optimize indirect branches

Speed up indirect branches by jumping to the target if it is valid. Softmmu measurements (see later commit for user-mode results): Note: baseline (i.e. speedup == 1x) is QEMU v2.9.0. - Impact on Boot time | setup | ARM debian jessie boot+shutdown time | stddev |

[Qemu-devel] [PATCH v3 03/10] tcg: export tcg_gen_lookup_and_goto_ptr

Instead of exporting goto_ptr directly to TCG frontends, export tcg_gen_lookup_and_goto_ptr(), which calls goto_ptr with the pointer returned by the lookup_tb_ptr() helper. This is the only use case we have for goto_ptr and lookup_tb_ptr, so having this function is very convenient. Furthermore, it

[Qemu-devel] [PATCH v3 04/10] tcg/i386: implement goto_ptr op

Signed-off-by: Emilio G. Cota --- tcg/i386/tcg-target.h | 2 +- tcg/i386/tcg-target.inc.c | 15 +++ 2 files changed, 16 insertions(+), 1 deletion(-) diff --git a/tcg/i386/tcg-target.h b/tcg/i386/tcg-target.h index 59d9835..73a15f7 100644 ---

[Qemu-devel] [PATCH v3 08/10] target/i386: optimize cross-page direct jumps in softmmu

Instead of unconditionally exiting to the exec loop, use the gen_jr helper to jump to the target if it is valid. Perf impact: see next commit's log. Signed-off-by: Emilio G. Cota --- target/i386/translate.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git

[Qemu-devel] [PATCH v3 00/10] TCG optimizations for 2.10

This is the v3 of this series. v2 for context: https://lists.gnu.org/archive/html/qemu-devel/2017-04/msg04342.html Changes from v2 -- all due to Richard's comments: - Inlined tb_from_jmp_cache into the TCG helper; now that this helper is common there is no point in having a separate function

Re: [Qemu-devel] [PULL 00/47] ppc-for-2.10 queue 20170424

On 04/26/2017 04:38 AM, David Gibson wrote: > On Mon, Apr 24, 2017 at 02:12:19PM +0100, Peter Maydell wrote: >> On 24 April 2017 at 02:58, David Gibson wrote: >>> The following changes since commit 32c7e0ab755745e961f1772e95cac381cc68769d: >>> >>> Merge

Re: [Qemu-devel] [PATCH 2/2] ipmi: don't try to open a NULL filename

On 04/26/2017 04:42 AM, David Gibson wrote: > On Tue, Apr 25, 2017 at 08:51:41AM +0200, Cédric Le Goater wrote: >> Currenlty, the code relies on the fact that open() handles NULL >> filenames but that can cause an error with new clang: >> >> hw/core/loader.c:67:15: runtime error: null pointer

Re: [Qemu-devel] [PATCH 2/4] hw/ppc: migrating the DRC state of hotplugged devices

On Tue, Apr 25, 2017 at 05:45:11PM -0500, Michael Roth wrote: > Quoting Daniel Henrique Barboza (2017-04-24 17:08:26) > > In pseries, a firmware abstraction called Dynamic Reconfiguration > > Connector (DRC) is used to assign a particular dynamic resource > > to the guest and provide an interface

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