This series fixes a potential segfault caused by NotifierList corruption
in xen-bus. The first two patches lay the groundwork and the third
actually fixes the problem.
Paul Durrant (3):
xen / notify: introduce a new XenWatchList abstraction
xen: introduce separate XenWatchList for XenDevice ob
add PnvHomer device model to emulate homer memory access
for pstate table, occ-sensors, slw, occ static and dynamic
values for Power8 and Power9 chips.
Signed-off-by: Cédric Le Goater
Signed-off-by: Balamuruhan S
---
hw/ppc/Makefile.objs | 1 +
hw/ppc/pnv.c | 30 +
hw
> -Original Message-
> From: Qemu-devel
> [mailto:qemu-devel-bounces+shameerali.kolothum.thodi=huawei.com@nongn
> u.org] On Behalf Of Michael S. Tsirkin
> Sent: 11 September 2019 14:56
> To: Igor Mammedov
> Cc: Peter Maydell ; Samuel Ortiz
> ; Ard Biesheuvel ;
> QEMU Developers ; Shamee
On 9/11/19 5:39 AM, Alex Bennée wrote:
> We were incorrectly setting NIP resulting in a segfault. This fixes
> linux-test for this ABI.
Perhaps better:
We were incorrectly using the 64-bit AIX ABI instead of the 32-bit SYSV ABI for
setting NIP for the signal handler.
?
>
> Signed-off-by: Alex B
emulate occ common area region with occ sram device model which
occ and skiboot uses it to communicate regarding sensors, slw
and HWMON in PowerNV emulated host.
Reviewed-by: Cédric Le Goater
Signed-off-by: Balamuruhan S
---
hw/ppc/pnv.c | 8 +
hw/ppc/pnv_occ.c | 78 +++
There were few trailing comments after `/*` instead in
new line and line more than 80 character, these fixes are
trivial and doesn't change any logic in code.
Signed-off-by: Balamuruhan S
---
hw/ppc/pnv.c | 49 -
1 file changed, 32 insertions(+), 1
During PowerNV boot skiboot populates the device tree by
retrieving base address of homer/occ common area from
PBA BARs and prd ipoll mask by accessing xscom read/write
accesses.
Reviewed-by: Cédric Le Goater
Signed-off-by: Balamuruhan S
---
hw/ppc/pnv_xscom.c | 34 +++
Hi All,
This is follow-up patch that implements HOMER and OCC SRAM device
models to emulate homer memory and occ common area access for pstate
table, occ sensors, runtime data and slw.
Currently skiboot disables the homer/occ code path with `QUIRK_NO_PBA`,
this quirk have to be removed in skiboot
11.09.2019. 15.21, "Aleksandar Markovic" је
написао/ла:
>
> From: Libo Zhou
>
> Multiple report from users were received regarding failures
> of "packet g" comminucation with gdb. Revert this commit until
> a better solution is developed.
>
> Suggested-by: Aleksandar Markovic
> Signed-off-by: Li
On Fri, 23 Aug 2019 16:38:18 PDT (-0700), Alistair Francis wrote:
Signed-off-by: Alistair Francis
---
target/riscv/cpu.h| 24 ---
target/riscv/cpu_bits.h | 7
target/riscv/cpu_helper.c | 88 +++
3 files changed, 113 insertions(+), 6 de
On Wed, 11 Sep 2019 15:39:37 +0200
Cédric Le Goater wrote:
> A typical pseries VM with 16 vCPUs, one disk, one network adapater
> uses less than 100 interrupts but the whole IRQ number space of the
> QEMU machine is allocated at reset time and it is 8K wide. This is
> wasting a considerable amoun
Public bug reported:
QEMU v3.1.0
$ ./configure --block-drv-rw-
whitelist=qcow2,raw,file,host_device,nbd,iscsi,rbd,blkdebug,luks,null-
co,nvme,copy-on-read,throttle,vxhs,gluster [...]
$ ./check -v -nbd 001 002 003 004 005 008 009 010 011 021 032 033 045 077 094
104 119 123 132 143 145 147 151 15
On Wed, 11 Sep 2019 15:39:36 +0200
Cédric Le Goater wrote:
> It will help us to discard interrupt numbers which have not been
> claimed in the next patch.
>
> Signed-off-by: Cédric Le Goater
> ---
Reviewed-by: Greg Kurz
> include/hw/ppc/xics.h | 5 +
> hw/ppc/spapr_irq.c| 9 +++-
Could be due to concurrent builds on the same system:
$ git grep 10810 tests
tests/qemu-iotests/common.filter:125:-e
's#nbd:127.0.0.1:10810#TEST_DIR/t.IMGFMT#g' \
tests/qemu-iotests/common.filter:161:-e
's#nbd://127.0.0.1:10810$#TEST_DIR/t.IMGFMT#g' \
tests/qemu-iotests/common.rc
10.09.2019 23:37, no-re...@patchew.org wrote:
> Patchew URL:
> https://patchew.org/QEMU/20190910162724.79574-1-vsement...@virtuozzo.com/
>
>
>
> Hi,
>
> This series failed the docker-quick@centos7 build test. Please find the
> testing commands and
> their output below. If you have Docker inst
On Wed, Sep 11, 2019 at 03:45:38PM +0200, Johannes Berg wrote:
> From: Johannes Berg
>
> For good reason, vhost-user is currently built asynchronously, that
> way better performance can be obtained. However, for certain use
> cases such as simulation, this is problematic.
>
> Consider an event-b
On Wed, Sep 11, 2019, at 11:49 AM, Peter Maydell wrote:
> On Fri, 6 Sep 2019 at 07:10, Alistair Francis wrote:
> >
> >
> > Now that the Arm-M4 CPU has been added to QEMU we can add the Netduino
> > Plus 2 machine. This is very similar to the STM32F205 and Netduino 2 SoC
> > and machine.
> >
> > v4
On Wed, Sep 11, 2019 at 03:50:15PM +0200, Igor Mammedov wrote:
> On Wed, 11 Sep 2019 13:57:06 +0100
> Peter Maydell wrote:
>
> > On Wed, 4 Sep 2019 at 09:58, Shameer Kolothum
> > wrote:
> > >
> > > This patch is in preparation for adding numamem and memhp tests
> > > to arm/virt board so that 'm
On Wed, 11 Sep 2019 13:57:06 +0100
Peter Maydell wrote:
> On Wed, 4 Sep 2019 at 09:58, Shameer Kolothum
> wrote:
> >
> > This patch is in preparation for adding numamem and memhp tests
> > to arm/virt board so that 'make check' is happy. This may not
> > be required once the scripts are run and
From: Johannes Berg
Add support for VHOST_USER_PROTOCOL_F_IN_BAND_NOTIFICATIONS, but
as it's not desired by default, don't enable it unless the device
implementation opts in by returning it from its protocol features
callback.
Note that I updated vu_set_vring_err_exec(), but didn't add any
sendi
On Wed, 4 Sep 2019 09:56:29 +0100
Shameer Kolothum wrote:
> This adds numamem and memhp tests for arm/virt platform
>
> Signed-off-by: Shameer Kolothum
Reviewed-by: Igor Mammedov
> ---
> tests/bios-tables-test-allowed-diff.h | 1 +
> tests/bios-tables-test.c | 49 +
From: Johannes Berg
For good reason, vhost-user is currently built asynchronously, that
way better performance can be obtained. However, for certain use
cases such as simulation, this is problematic.
Consider an event-based simulation in which both the device and CPU
have scheduled according to
Here's a respin of both the docs and the code, hopefully addressing
most of the requests from review. Let me know if I've missed anything
or not done it in the way you thought.
Thanks,
johannes
A typical pseries VM with 16 vCPUs, one disk, one network adapater
uses less than 100 interrupts but the whole IRQ number space of the
QEMU machine is allocated at reset time and it is 8K wide. This is
wasting a considerable amount of interrupt numbers in the global IRQ
space which has 1M interrupt
It will help us to discard interrupt numbers which have not been
claimed in the next patch.
Signed-off-by: Cédric Le Goater
---
include/hw/ppc/xics.h | 5 +
hw/ppc/spapr_irq.c| 9 +++--
2 files changed, 8 insertions(+), 6 deletions(-)
diff --git a/include/hw/ppc/xics.h b/include/hw/
Hello,
A typical pseries VM with 16 vCPUs, one disk, one network adapater
uses less than 100 interrupts but the whole IRQ number space of the
QEMU machine is allocated at reset time and it is 8K wide. This is
wasting a considerable amount of interrupt numbers in the global IRQ
space which has 1M
From: Wei Yang
The check of writev_buffer is in qemu_fflush, which means it is not
harmful if it is NULL.
And removing it will make the code consistent since all other
add_to_iovec() is called without the check.
Signed-off-by: Wei Yang
Reviewed-by: Dr. David Alan Gilbert
---
migration/qemu-f
From: Wei Yang
In add_to_iovec(), qemu_fflush() will be called if iovec is full. If
this happens, buf_index is reset. Currently, this is not checked and
buf_index would always been adjust with buf size.
This is not harmful, but will waste some space in file buffer.
This patch make add_to_iovec(
Two cleanup:
Patch #1 make code consistent on calling add_to_iovec
Patch #2 refine the code to handle the case when buf already flushed
v2:
* wrap common steps into add_buf_to_iovec()
Wei Yang (2):
migration/qemu-file: remove check on writev_buffer in
qemu_put_compression_data
migratio
On 9/11/19 6:55 AM, Tony Nguyen wrote:
>> typedef uint64_t FullLoadHelper(CPUArchState *env, target_ulong addr,
>> TCGMemOpIdx oi, uintptr_t retaddr);
>> +typedef uint64_t DirectLoadHelper(const void *);
>
> Would 'Load' instead of 'DirectLoadHelper' have enough c
On Wed, 4 Sep 2019 09:56:26 +0100
Shameer Kolothum wrote:
> For machines 4.2 or higher with ACPI boot use GED for system_powerdown
> event instead of GPIO. Guest boot with DT still uses GPIO.
>
> Signed-off-by: Shameer Kolothum
> Reviewed-by: Eric Auger
Reviewed-by: Igor Mammedov
> ---
> v9
From: Libo Zhou
Multiple report from users were received regarding failures
of "packet g" comminucation with gdb. Revert this commit until
a better solution is developed.
Suggested-by: Aleksandar Markovic
Signed-off-by: Libo Zhou
Signed-off-by: Aleksandar Markovic
---
target/mips/gdbstub.c |
On 9/11/19 9:07 AM, Philippe Mathieu-Daudé wrote:
>> {
>> return load_helper(env, addr, oi, retaddr, MO_LEUW, false,
>> - full_le_lduw_mmu);
>> + full_le_lduw_mmu, direct_lduw_le);
>
> Why not cast lduw_be_p? (except for direct_ldub).
>
> re
Note that the RCU thread is expected to sit most of the time doing
nothing, so I don't think this matters.
Zhengui's theory that notify_me doesn't work properly on ARM is more
promising, but he couldn't provide a clear explanation of why he thought
notify_me is involved. In particular, I would h
Hi, this is an update after some extended tests and a fallback migration
to 4.14.
After doing another >10k migrations we are sure to say that we also encounter
this issue on kernel 4.14.
We migrate vpses from servers in serial (one after the other) mode. And we
notice that on some servers we enc
On Wed, 4 Sep 2019 09:56:24 +0100
Shameer Kolothum wrote:
> Generate Memory Affinity Structures for PC-DIMM ranges.
>
> Also, Linux and Windows need ACPI SRAT table to make memory hotplug
> work properly, however currently QEMU doesn't create SRAT table if
> numa options aren't present on CLI. H
Peter Maydell writes:
> On Fri, 6 Sep 2019 at 21:26, Alex Bennée wrote:
>>
>> Hi Peter,
>>
>> Hopefully this is the final version of the semihosting at translate
>> time patches. I've applied Richard's IS_USER changes and gated the SVN
>> for !M profile.
>>
>> Alex Bennée (3):
>> target/arm:
10.09.2019. 19.50, "Aleksandar Markovic" је
написао/ла:
>
>
> 10.09.2019. 19.26, aleksandar.m.m...@gmail.com је написао/ла:
> >
> >
> > 10.09.2019. 11.57, "Libo Zhou" је написао/ла:
> > >
> > > Hi Alex,
> > >
> > > gdb says remote 'g' packet reply is too long, and then prints out a
long string of
On Wed, 4 Sep 2019 09:56:25 +0100
Shameer Kolothum wrote:
> This is in preparation of using GED device for
> system_powerdown event. Make the powerdown notifier
> registration independent of create_gpio() fn.
>
> Signed-off-by: Shameer Kolothum
> Reviewed-by: Eric Auger
Reviewed-by: Igor Mamm
Patchew URL:
https://patchew.org/QEMU/20190911014353.5926-1-richard.hender...@linaro.org/
Hi,
This series failed the docker-quick@centos7 build test. Please find the testing
commands and
their output below. If you have Docker installed, you can probably reproduce it
locally.
=== TEST SCRIPT
On 9/11/19 3:43 AM, Richard Henderson wrote:
> Add a function parameter to perform the actual load/store to ram.
> With optimization, this results in identical code.
>
> Signed-off-by: Richard Henderson
> ---
> accel/tcg/cputlb.c | 157 +++--
> 1 file chan
On Wed, 4 Sep 2019 09:56:23 +0100
Shameer Kolothum wrote:
[...]
> @@ -730,6 +733,19 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
> VirtMachineState *vms)
>vms->highmem, vms->highmem_ecam);
> acpi_dsdt_add_gpio(scope, &memmap[VIRT_GPIO],
>
On Wed, 4 Sep 2019 at 09:58, Shameer Kolothum
wrote:
>
> This patch is in preparation for adding numamem and memhp tests
> to arm/virt board so that 'make check' is happy. This may not
> be required once the scripts are run and new tables are
> generated with ".numamem" and ".memhp" extensions.
>
On Wed, 4 Sep 2019 at 09:58, Shameer Kolothum
wrote:
>
> Documents basic concepts of ACPI Generic Event device(GED)
> and interface between QEMU and the ACPI BIOS.
>
> Signed-off-by: Shameer Kolothum
> Reviewed-by: Eric Auger
> ---
> docs/specs/acpi_hw_reduced_hotplug.txt | 60 +
On Wed, 4 Sep 2019 09:56:23 +0100
Shameer Kolothum wrote:
> This initializes the GED device with base memory and irq, configures
> ged memory hotplug event and builds the corresponding aml code. With
> this, both hot and cold plug of device memory is enabled now for Guest
> with ACPI boot. Memory
On Wed, 11 Sep 2019, at 15:40, no-re...@patchew.org wrote:
> Patchew URL: https://patchew.org/QEMU/20190911034302.29108-1-and...@aj.id.au/
>
>
>
> Hi,
>
> This series failed the docker-quick@centos7 build test. Please find the
> testing commands and
> their output below. If you have Docker
Max Reitz writes:
> From: Sergio Lopez
>
> block_job_remove_all_bdrv() iterates through job->nodes, calling
> bdrv_root_unref_child() for each entry. The call to the latter may
> reach child_job_[can_]set_aio_ctx(), which will also attempt to
> traverse job->nodes, potentially finding entries t
On Wed, 4 Sep 2019 09:56:21 +0100
Shameer Kolothum wrote:
> From: Samuel Ortiz
>
> The ACPI Generic Event Device (GED) is a hardware-reduced specific
> device[ACPI v6.1 Section 5.6.9] that handles all platform events,
> including the hotplug ones. This patch generates the AML code that
> define
On Tue, Sep 03, 2019 at 07:43:24PM +0100, Dr. David Alan Gilbert wrote:
>* Wei Yang (richard.weiy...@gmail.com) wrote:
>> On Fri, Aug 23, 2019 at 12:06:09PM +0100, Dr. David Alan Gilbert wrote:
>> >(Copying Dan in)
>> >
>> >* Wei Yang (richardw.y...@linux.intel.com) wrote:
>> >> In add_to_iovec(),
Am 11.09.19 um 09:48 schrieb Max Reitz:
> On 10.09.19 17:41, Peter Lieven wrote:
>> libnfs recently added support for unmounting. Add support
>> in Qemu too.
>>
>> Signed-off-by: Peter Lieven
>> ---
>> block/nfs.c | 3 +++
>> 1 file changed, 3 insertions(+)
>>
>> diff --git a/block/nfs.c b/block/
10.09.2019 16:59, Eric Blake wrote:
> On 9/10/19 3:03 AM, Daniel P. Berrangé wrote:
>> On Tue, Sep 10, 2019 at 10:59:43AM +0300, Vladimir Sementsov-Ogievskiy wrote:
>>> In "if (saddr->keep_alive) {" we may already be on error path, with
>>> invalid sock < 0. Fix it by returning error earlier.
>>>
>
On Fri, 6 Sep 2019 at 21:26, Alex Bennée wrote:
>
> Hi Peter,
>
> Hopefully this is the final version of the semihosting at translate
> time patches. I've applied Richard's IS_USER changes and gated the SVN
> for !M profile.
>
> Alex Bennée (3):
> target/arm: handle M-profile semihosting at tran
** Description changed:
+ Command:
+
+ qemu-img convert -m 1 -f qcow2 -O qcow2 ./disk01.qcow2 ./output.qcow2
+
+ Hangs indefinitely approximately 30% of the runs.
+
+
+
+ Workaround:
+
+ qemu-img convert -m 1 -f qcow2 -O qcow2 ./disk01.qcow2 ./output.qcow2
+
+ Run "qemu-img convert" wit
"Dr. David Alan Gilbert (git)" wrote:
> From: "Dr. David Alan Gilbert"
>
> Commit 11808bb removed the non-iovec based write support,
> the comment hung on.
>
> Signed-off-by: Dr. David Alan Gilbert
Reviewed-by: Juan Quintela
Ivan Ren wrote:
> From: Ivan Ren
>
> When encounter error, multifd_send_thread should always notify who pay
> attention to it before exit. Otherwise it may block migration_thread
> at multifd_send_sync_main forever.
>
> Error as follow:
> --
On 06.09.19 09:57, David Hildenbrand wrote:
> This is the successor of
> "[PATCH v1 0/4] s390x/tcg: MOVE (MVC): Fault-safe handling"
>
>
>
> This series fixes a bunch of issues related to some mem helpers and makes
> sure that they are fault-safe, meaning no system state is modified in c
On 11.09.19 12:31, Kevin Wolf wrote:
> Am 11.09.2019 um 12:00 hat Max Reitz geschrieben:
>> On 11.09.19 10:27, Kevin Wolf wrote:
>>> Am 11.09.2019 um 09:37 hat Max Reitz geschrieben:
On 11.09.19 08:55, Kevin Wolf wrote:
> Well, by default the primary child, which should cover like 90% of t
On Tue, Sep 10, 2019 at 09:43:52PM -0400, Richard Henderson wrote:
> Add a function parameter to perform the actual load/store to ram.
> With optimization, this results in identical code.
>
> Signed-off-by: Richard Henderson
> ---
> accel/tcg/cputlb.c | 157 +++---
On Fri, 6 Sep 2019 at 07:10, Alistair Francis wrote:
>
>
> Now that the Arm-M4 CPU has been added to QEMU we can add the Netduino
> Plus 2 machine. This is very similar to the STM32F205 and Netduino 2 SoC
> and machine.
>
> v4:
> - Rebase on master
> v3:
> - Remove custom reset handler
> - Add
* Beata Michalska (beata.michal...@linaro.org) wrote:
> On Tue, 10 Sep 2019 at 14:16, Dr. David Alan Gilbert
> wrote:
> >
> > * Beata Michalska (beata.michal...@linaro.org) wrote:
> > > On Tue, 10 Sep 2019 at 12:26, Dr. David Alan Gilbert
> > > wrote:
> > > >
> > > > * Beata Michalska (beata.mich
Am 11.09.2019 um 12:00 hat Max Reitz geschrieben:
> On 11.09.19 10:27, Kevin Wolf wrote:
> > Am 11.09.2019 um 09:37 hat Max Reitz geschrieben:
> >> On 11.09.19 08:55, Kevin Wolf wrote:
> >>> Well, by default the primary child, which should cover like 90% of the
> >>> drivers?
> >>
> >> Hm, yes.
> >
On Wed, 4 Sep 2019 at 08:05, Cédric Le Goater wrote:
>
> Hello,
>
> This series improves the current models of the Aspeed machines in QEMU
> and adds new ones. It also prepares ground for the models of the
> Aspeed AST2600 SoC by calculating the model typenames using the SoC
> name.
>
> You will f
From: Sergio Lopez
block_job_remove_all_bdrv() iterates through job->nodes, calling
bdrv_root_unref_child() for each entry. The call to the latter may
reach child_job_[can_]set_aio_ctx(), which will also attempt to
traverse job->nodes, potentially finding entries that where freed
on previous iter
* Yury Kotov (yury-ko...@yandex-team.ru) wrote:
> Signed-off-by: Yury Kotov
Reviewed-by: Dr. David Alan Gilbert
> ---
> tests/migration-test.c | 140 -
> 1 file changed, 110 insertions(+), 30 deletions(-)
>
> diff --git a/tests/migration-test.c b/tests/
On 11.09.19 10:27, Kevin Wolf wrote:
> Am 11.09.2019 um 09:37 hat Max Reitz geschrieben:
>> On 11.09.19 08:55, Kevin Wolf wrote:
>>> Am 11.09.2019 um 08:20 hat Max Reitz geschrieben:
On 10.09.19 16:52, Kevin Wolf wrote:
> Am 09.08.2019 um 18:13 hat Max Reitz geschrieben:
>> If the driv
Patchew URL:
https://patchew.org/QEMU/20190911014353.5926-1-richard.hender...@linaro.org/
Hi,
This series failed the docker-quick@centos7 build test. Please find the testing
commands and
their output below. If you have Docker installed, you can probably reproduce it
locally.
=== TEST SCRIPT
On Wed, Sep 11, 2019 at 11:20:40AM +0200, Johannes Berg wrote:
>
> > Each feature is documented near the description of the functionality it
> > enables, that can work for this.
>
> Hmm, so you mean I should add a section on in-band notifications, and
> document things there?
Like other message
* Yury Kotov (yury-ko...@yandex-team.ru) wrote:
> Add qtest_set_expected_status function to set expected exit status of
> child process. By default expected exit status is 0.
>
> Signed-off-by: Yury Kotov
Reviewed-by: Dr. David Alan Gilbert
> ---
> tests/libqtest.c | 36 +-
We were incorrectly setting NIP resulting in a segfault. This fixes
linux-test for this ABI.
Signed-off-by: Alex Bennée
---
linux-user/ppc/signal.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/linux-user/ppc/signal.c b/linux-user/ppc/signal.c
index 619a56950df..5b82af6c
The ordering of events that are emitted during the rmdir
test have changed with kernel >= 5.3. Semantically both
new & old orderings are correct, so we must be able to
cope with either.
To cope with this, when we see an unexpected event, we
push it back onto the queue and look and the subsequent
e
The following changes since commit 89ea03a7dc83ca36b670ba7f787802791fcb04b1:
Merge remote-tracking branch 'remotes/huth-gitlab/tags/m68k-pull-2019-09-07'
into staging (2019-09-09 09:48:34 +0100)
are available in the Git repository at:
https://github.com/berrange/qemu tags/filemon-test-pull-
Aleksandar Markovic writes:
> 10.09.2019. 21.34, "Alex Bennée" је написао/ла:
>>
>> This is preparatory for plugins which will want to report the
>> architecture to plugins. Move the ELF_ARCH definition out of the
>> loader and into its own header.
>>
>> Signed-off-by: Alex Bennée
>> --
>
> H
On 11/09/2019 10.54, Kevin Wolf wrote:
> Am 11.09.2019 um 10:01 hat Thomas Huth geschrieben:
>> On 11/09/2019 08.58, Kevin Wolf wrote:
>>> Am 10.09.2019 um 21:07 hat Eric Blake geschrieben:
On 9/10/19 1:58 PM, Thomas Huth wrote:
> Our "tests" directory is very overcrowded - we store the qt
> Each feature is documented near the description of the functionality it
> enables, that can work for this.
Hmm, so you mean I should add a section on in-band notifications, and
document things there?
> I don't much like F_KICK_CALL_MSGS as
> not generic enough but it's not simulation as such
On Tue, Sep 10, 2019 at 06:17:53PM +0100, Paul Durrant wrote:
> ...not the backend
>
> Commit cb323146 "xen-bus: Fix backend state transition on device reset"
> contained a subtle mistake. The hunk
>
> @@ -539,11 +556,11 @@ static void xen_device_backend_changed(void *opaque)
>
> /*
>
BALATON Zoltan writes:
> On Tue, 10 Sep 2019, Alex Bennée wrote:
>> diff --git a/include/elf/elf-types.inc.h b/include/elf/elf-types.inc.h
>> new file mode 100644
>> index 000..35163adb2b5
>> --- /dev/null
>> +++ b/include/elf/elf-types.inc.h
>> @@ -0,0 +1,63 @@
>> +/*
>> + * Elf Type S
On Wed, 11 Sep 2019 14:04:51 +1000
David Gibson wrote:
> From: Alexey Kardashevskiy
>
> SLOF implements one itself so let's remove it from QEMU. It is one less
> image and simpler setup as the RTAS blob never stays in its initial place
> anyway as the guest OS always decides where to put it.
>
On Thu, Aug 01, 2019 at 08:40:53AM +0800, Wei Yang wrote:
>Persistent backend setup requires some knowledge about nvdimm and ndctl
>tool. Some users report they may struggle to gather these knowledge and
>have difficulty to setup it properly.
>
>Here we provide two examples for persistent backend a
On Tue, Sep 10, 2019 at 05:52:36PM +0200, Johannes Berg wrote:
> On Mon, 2019-09-09 at 15:50 +0200, Johannes Berg wrote:
>
> > > We can document how to behave in case of inconsistent protocol features,
> > > yes.
> >
> > OK.
>
> Coming back to this, I was just looking at it.
>
> How/where would
* Yury Kotov (yury-ko...@yandex-team.ru) wrote:
> This capability realizes simple source validation by UUID.
> It's useful for live migration between hosts.
>
> Signed-off-by: Yury Kotov
Reviewed-by: Dr. David Alan Gilbert
> ---
> migration/migration.c | 9 +
> migration/migration.h
On Wed, 11 Sep 2019 14:04:50 +1000
David Gibson wrote:
> From: Alexey Kardashevskiy
>
> We are going to use spapr_build_fdt() for the boot time FDT and as an
> update for SLOF during handling of H_CAS. SLOF will apply all properties
> from the QEMU's FDT which is usually ok unless there are pro
On Wed, 2019-09-11 at 09:35 +0200, Stefan Hajnoczi wrote:
> On Tue, Sep 10, 2019 at 05:14:36PM +0200, Johannes Berg wrote:
> > On Tue, 2019-09-10 at 17:03 +0200, Stefan Hajnoczi wrote:
> > > > Now, this means that the CPU (that's part of the simulation) has to
> > > > *wait* for the device to add a
On Wed, 11 Sep 2019 at 02:43, Richard Henderson
wrote:
>
> This forced inlining can result in missing symbols,
> which makes a debugging build harder to follow.
>
> Reported-by: Peter Maydell
> Signed-off-by: Richard Henderson
> ---
> accel/tcg/cputlb.c | 16 ++--
> 1 file changed,
Am 11.09.2019 um 10:01 hat Thomas Huth geschrieben:
> On 11/09/2019 08.58, Kevin Wolf wrote:
> > Am 10.09.2019 um 21:07 hat Eric Blake geschrieben:
> >> On 9/10/19 1:58 PM, Thomas Huth wrote:
> >>> Our "tests" directory is very overcrowded - we store the qtests,
> >>> unit test and other files ther
Reverting the commit solved my problem, although I don't know why it needed to
be fixed to 64-bit back then. Finally I can now single step a cross-compiled
MIPS program on a QEMU Linux user binary and observe the register and memory
contents.
-- Original --
Fr
From: Atish Patra
Use both the generic register name and ABI name for the general purpose
registers and floating point registers.
Signed-off-by: Atish Patra
Signed-off-by: Alistair Francis
Reviewed-by: Bin Meng
Signed-off-by: Palmer Dabbelt
---
target/riscv/cpu.c | 19 +++
1
Am 11.09.2019 um 09:37 hat Max Reitz geschrieben:
> On 11.09.19 08:55, Kevin Wolf wrote:
> > Am 11.09.2019 um 08:20 hat Max Reitz geschrieben:
> >> On 10.09.19 16:52, Kevin Wolf wrote:
> >>> Am 09.08.2019 um 18:13 hat Max Reitz geschrieben:
> If the driver does not implement bdrv_get_allocated
Patchew URL: https://patchew.org/QEMU/20190910163600.19971-1-laur...@vivier.eu/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Subject: [Qemu-devel] [PULL 00/15] Linux user for 4.2 patches
Message-id: 20190910163600.19971-1-laur...@vivier.eu
Ty
From: Bin Meng
This adds an OTP memory with a given serial number to the sifive_u
machine. With such support, the upstream U-Boot for sifive_fu540
boots out of the box on the sifive_u machine.
Signed-off-by: Bin Meng
Reviewed-by: Alistair Francis
Signed-off-by: Palmer Dabbelt
---
hw/riscv/si
From: Bin Meng
At present the GEM support in sifive_u machine is seriously broken.
The GEM block register base was set to a weird number (0x100900FC),
which for no way could work with the cadence_gem model in QEMU.
Not like other GEM variants, the FU540-specific GEM has a management
block to con
From: Alistair Francis
Use the TB_FLAGS_MSTATUS_FS macro when enabling floating point in the tb
flags.
Signed-off-by: Alistair Francis
Reviewed-by: Palmer Dabbelt
Signed-off-by: Palmer Dabbelt
---
target/riscv/cpu.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/r
From: Bin Meng
OpenSBI for fu540 does DT fix up (see fu540_modify_dt()) by updating
chosen "stdout-path" to point to "/soc/serial@...", and U-Boot will
use this information to locate the serial node and probe its driver.
However currently we generate the UART node name as "/soc/uart@...",
causing
On Tue, 10 Sep 2019, Alex Bennée wrote:
diff --git a/include/elf/elf-types.inc.h b/include/elf/elf-types.inc.h
new file mode 100644
index 000..35163adb2b5
--- /dev/null
+++ b/include/elf/elf-types.inc.h
@@ -0,0 +1,63 @@
+/*
+ * Elf Type Specialisation
+ *
+ * Copyright (c) 2019
+ * Writte
From: Bin Meng
This adds a simple PRCI model for FU540 (sifive_u). It has different
register layout from the existing PRCI model for FE310 (sifive_e).
Signed-off-by: Bin Meng
Reviewed-by: Alistair Francis
Signed-off-by: Palmer Dabbelt
---
hw/riscv/Makefile.objs | 1 +
hw/riscv/si
From: Alistair Francis
This is meant to mask off the hypervisor bits, but a typo caused it to
mask MPP instead.
Fixes: 1f0419cb04 ("target/riscv: Allow setting mstatus virtulisation bits")
Signed-off-by: Alistair Francis
Reviewed-by: Bin Meng
Signed-off-by: Palmer Dabbelt
---
target/riscv/cs
From: Bin Meng
This updates the UART base address and IRQs to match the hardware.
Signed-off-by: Bin Meng
Reviewed-by: Jonathan Behrens
Acked-by: Alistair Francis
Reviewed-by: Chih-Min Chao
Signed-off-by: Palmer Dabbelt
---
hw/riscv/sifive_u.c | 4 ++--
include/hw/riscv/sifive_u.h
From: Bin Meng
To keep in sync with Linux kernel device tree, generate hfclk and
rtcclk nodes in the device tree, to be referenced by PRCI node.
Signed-off-by: Bin Meng
Reviewed-by: Alistair Francis
Signed-off-by: Palmer Dabbelt
---
hw/riscv/sifive_u.c | 23 +++
i
From: Bin Meng
With the support of heterogeneous harts and PRCI model, it's now
possible to use the OpenSBI image (PLATFORM=sifive/fu540) built
for the real hardware.
Signed-off-by: Bin Meng
Reviewed-by: Alistair Francis
Signed-off-by: Palmer Dabbelt
---
pc-bios/opensbi-riscv64-sifive_u-fw_j
From: Bin Meng
This updates model and compatible strings to use the same strings
as used in the Linux kernel device tree (hifive-unleashed-a00.dts).
Signed-off-by: Bin Meng
Reviewed-by: Alistair Francis
Signed-off-by: Palmer Dabbelt
---
hw/riscv/sifive_u.c | 5 +++--
1 file changed, 3 insert
From: Bin Meng
Add PRCI mmio base address and size mappings to sifive_u machine,
and generate the corresponding device tree node.
Signed-off-by: Bin Meng
Reviewed-by: Alistair Francis
Signed-off-by: Palmer Dabbelt
---
hw/riscv/sifive_u.c | 24 +++-
include/hw/risc
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