The following steps will cause qemu assertion failure:
- pause vm by executing 'virsh suspend'
- create external snapshot of memory and disk using 'virsh snapshot-create-as'
- doing the above operation again will cause qemu crash
The backtrace looks like:
#0 0x7fbf958c5c37 in raise () from
Patchew URL: https://patchew.org/QEMU/20201207073327.33367-1-...@ozlabs.ru/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: 20201207073327.33367-1-...@ozlabs.ru
Subject: [PATCH qemu v11] spapr: Implement Open Firmware
On 05/12/2020 05:32, Greg Kurz wrote:
On Tue, 13 Oct 2020 13:19:11 +1100
Alexey Kardashevskiy wrote:
The PAPR platform which describes an OS environment that's presented by
a combination of a hypervisor and firmware. The features it specifies
require collaboration between the firmware and
The PAPR platform which describes an OS environment that's presented by
a combination of a hypervisor and firmware. The features it specifies
require collaboration between the firmware and the hypervisor.
Since the beginning, the runtime component of the firmware (RTAS) has
been implemented as a
On Nov 23 07:59, Klaus Jensen wrote:
> From: Klaus Jensen
>
> This is a resurrection of Andrzej's series[1] from back July.
>
> Andrzej's main patch basically moved the the CMB from BAR 2 into an
> offset in BAR 4 (located after the MSI-X table and PBA). Having an
> offset on the CMB causes a
Linking of qemu-system-ppc64 fails on macOS with dtrace enabled:
error: probe tpm_spapr_show_buffer doesn't exist
error: Could not register probes
ld: error creating dtrace DOF section for architecture x86_64
The failure is explained in 8c8ed03850208e4 ("net/colo: Match is-enabled
probe to
On 2020-12-04 9:09 a.m., Igor Mammedov wrote:
Adds bit #4 to status/control field of CPU hotplug MMIO interface.
New bit will be used OSPM to mark CPUs as pending for removal by firmware,
when it calls _EJ0 method on CPU device node. Later on, when firmware
sees this bit set, it will perform CPU
On 2020-12-06 10:20 p.m., Ankur Arora wrote:
On 2020-12-04 9:09 a.m., Igor Mammedov wrote:
if firmware and QEMU negotiated CPU hotunplug support, generate
_EJ0 method so that it will mark CPU for removal by firmware and
pass control to it by triggering SMI.
Signed-off-by: Igor Mammedov
---
The QEMU project does not support version 3.1 anymore. Can you either
please report this to the Debian bug tracker instead, or check whether
the problem is still reproducible with the latest version of QEMU (v5.2
will be likely released tomorrow)?
** Changed in: qemu
Status: New =>
On 2020-12-04 9:09 a.m., Igor Mammedov wrote:
if firmware and QEMU negotiated CPU hotunplug support, generate
_EJ0 method so that it will mark CPU for removal by firmware and
pass control to it by triggering SMI.
Signed-off-by: Igor Mammedov
---
include/hw/acpi/cpu.h | 1 +
hw/acpi/cpu.c
Public bug reported:
Hello,
An assertion failure was found in hw/usb/core.c:727 in latest version
5.2.0.
Reproduced environment is as follows:
Host: ubuntu 18.04
Guest: ubuntu 18.04
QEMU boot command line:
qemu-system-x86_64 -enable-kvm -boot c -m 4G -drive
On 06/12/2020 19.55, Philippe Mathieu-Daudé wrote:
> Cross-build mips target with KVM and TCG accelerators enabled.
>
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> later we'll build KVM-only.
> ---
> .gitlab-ci.d/crossbuilds-kvm-mips.yml | 5 +
> .gitlab-ci.yml| 1
On 06/12/2020 19.55, Philippe Mathieu-Daudé wrote:
> Cross-build PPC target with KVM and TCG accelerators enabled.
>
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> later this job build KVM-only.
> ---
> .gitlab-ci.d/crossbuilds-kvm-ppc.yml | 5 +
> .gitlab-ci.yml | 1
On 2020/11/9 上午7:59, Alexey Kirillov wrote:
+#ifdef CONFIG_SLIRP
+case NET_BACKEND_USER: {
+size_t len = strchr(ni->u.user.net, '/') - ni->u.user.net;
+char *net = g_strndup(ni->u.user.net, len);
+
+info_str = g_strdup_printf("net=%s,restrict=%s",
+
On 06/12/2020 19.55, Philippe Mathieu-Daudé wrote:
> Cross-build s390x target with only KVM accelerator enabled.
>
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> .gitlab-ci.d/crossbuilds-kvm-s390x.yml | 6 ++
> .gitlab-ci.yml | 1 +
> MAINTAINERS
On 06/12/2020 19.55, Philippe Mathieu-Daudé wrote:
> Cross-build ARM aarch64 target with KVM and TCG accelerators enabled.
>
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> later this job will build KVM-only.
> ---
> .gitlab-ci.d/crossbuilds-kvm-arm.yml | 5 +
> .gitlab-ci.yml
On 06/12/2020 19.55, Philippe Mathieu-Daudé wrote:
> Cross-build x86 target with only KVM accelerator enabled.
>
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> .gitlab-ci.d/crossbuilds-kvm-x86.yml | 6 ++
> .gitlab-ci.yml | 1 +
> MAINTAINERS
Use bootloader helper to generate CM Base setting code
and kernel jump.
Signed-off-by: Jiaxun Yang
---
hw/mips/boston.c | 60 +++-
1 file changed, 13 insertions(+), 47 deletions(-)
diff --git a/hw/mips/boston.c b/hw/mips/boston.c
index
It's useful for bootloader to do IO opreations.
Signed-off-by: Jiaxun Yang
---
hw/mips/addr.c| 11 +++
include/hw/mips/cpudevs.h | 2 ++
2 files changed, 13 insertions(+)
diff --git a/hw/mips/addr.c b/hw/mips/addr.c
index 2f138fe1ea..9d21cc2eb0 100644
--- a/hw/mips/addr.c
On 06/12/2020 19.55, Philippe Mathieu-Daudé wrote:
> 'extends' is an alternative to using YAML anchors
> and is a little more flexible and readable. See:
> https://docs.gitlab.com/ee/ci/yaml/#extends
>
> More importantly it allows exploding YAML jobs.
>
> Reviewed-by: Wainer dos Santos Moschetta
Use bootloader helper to generate BAR setting code
and kernel jump.
Signed-off-by: Jiaxun Yang
---
hw/mips/malta.c | 108
1 file changed, 26 insertions(+), 82 deletions(-)
diff --git a/hw/mips/malta.c b/hw/mips/malta.c
index
Hi all,
I'm back! Now I'm also helping CIP United, the present owner of MIPS
in China, take care of their open-souce infrastructures.
Btw: I'd like to add kernel boot tests for boston and incoming loongson-virt.
Where should I place kernel binaries?
Thanks.
Jiaxun Yang (5):
hw/mips: Add a
Add a bootloader helper to generate simple bootloaders for kernel.
It can help us reduce inline hex hack and also keep MIPS release 6
compatibility easier.
Signed-off-by: Jiaxun Yang
---
hw/mips/bootloader.c | 150 ++
hw/mips/meson.build | 2 +-
Use bootloader helper to generate kernel jump.
Also move kernel jump to 0x580 to avoid collisions with exception
vectors.
Signed-off-by: Jiaxun Yang
---
hw/mips/fuloong2e.c | 35 +--
1 file changed, 5 insertions(+), 30 deletions(-)
diff --git
>From DDI0487Fc_armv8_arm.pdf, the CPTR_EL2 has two kinds
of layouts according to HCR_EL2.E2H.
When HCR_EL2.E2H is 1, fp_exception_el should refer to
HCR_EL2.FPEN and sve_exception_el should refer to HCR_EL2.ZEN.
Reviewed-by: Richard Henderson
Signed-off-by: LIU Zhiwei
---
target/arm/helper.c
First-fault or no-fault doesn't mean only access one page.
When cross pages, for first-fault, if there is no fault in the first access,
the second page should be accessed. And for no-fault, the second page
should always be accessed.
Signed-off-by: LIU Zhiwei
---
target/arm/sve_helper.c | 35
I found some bugs in target/arm.
The first one is about SVE first-fault or no-fault load/store.
The second is SIMD fcmla(by element).
The third is about CPTR_EL2.
I am not sure I really understand this code. Please confirm the patch set and
let me know if I am wrong.
LIU Zhiwei (4):
For SIMD fcmla(by element), if the number of elements is less than
the number of elements within one segment,i.e. 4H arrangement,
we should not calculate the entire segment.
Signed-off-by: LIU Zhiwei
---
target/arm/vec_helper.c | 8
1 file changed, 8 insertions(+)
diff --git
If the split element is also the first active element of the vector,
mem_off_first[0] should equal to mem_off_split.
Signed-off-by: LIU Zhiwei
---
target/arm/sve_helper.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/target/arm/sve_helper.c b/target/arm/sve_helper.c
[Expired for QEMU because there has been no activity for 60 days.]
** Changed in: qemu
Status: Incomplete => Expired
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1723488
Title:
HAX on
[Expired for QEMU because there has been no activity for 60 days.]
** Changed in: qemu
Status: Incomplete => Expired
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1723161
Title:
Migration
On Sun, Dec 06, 2020 at 07:55:06PM +0100, Philippe Mathieu-Daudé wrote:
> Cross-build PPC target with KVM and TCG accelerators enabled.
>
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> later this job build KVM-only.
> ---
> .gitlab-ci.d/crossbuilds-kvm-ppc.yml | 5 +
> .gitlab-ci.yml
Patchew URL: https://patchew.org/QEMU/20201206233949.3783184-1-f4...@amsat.org/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: 20201206233949.3783184-1-f4...@amsat.org
Subject: [PATCH 00/19] target/mips: Boring code
This file is not TCG specific, contains CPU definitions
and is consumed by cpu.c. Rename it as such.
Signed-off-by: Philippe Mathieu-Daudé
---
cpu-defs.c still contains fpu_init()/mvp_init()/msa_reset().
They are moved out in different series (already posted).
---
target/mips/cpu.c
On 12/6/20 8:23 PM, Claudio Fontana wrote:
> On 12/6/20 7:55 PM, Philippe Mathieu-Daudé wrote:
>> Introduce a job template to cross-build accelerator specific
>> jobs (enable a specific accelerator, disabling the others).
>>
>> Signed-off-by: Philippe Mathieu-Daudé
>> ---
>>
Restrict the following CPUClass handlers to TCG:
- do_interrupt
- do_transaction_failed
- do_unaligned_access
Signed-off-by: Philippe Mathieu-Daudé
---
Cc: Claudio Fontana
target/mips/cpu.c | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/target/mips/cpu.c
We are going to move this code, fix its style first.
Signed-off-by: Philippe Mathieu-Daudé
---
target/mips/translate_init.c.inc | 36
1 file changed, 18 insertions(+), 18 deletions(-)
diff --git a/target/mips/translate_init.c.inc
Signed-off-by: Philippe Mathieu-Daudé
---
target/mips/cpu.c | 20
1 file changed, 8 insertions(+), 12 deletions(-)
diff --git a/target/mips/cpu.c b/target/mips/cpu.c
index 1073db7f257..899a746c3e5 100644
--- a/target/mips/cpu.c
+++ b/target/mips/cpu.c
@@ -104,17 +104,6 @@
Signed-off-by: Philippe Mathieu-Daudé
---
We are very close to build with '--enable-kvm --disable-tcg' :)
---
target/mips/meson.build | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/target/mips/meson.build b/target/mips/meson.build
index c685f03fb28..ef70d9040e2
The rest of helper.c is TLB related. Extract the non TLB
specific functions to a new file, so we can rename helper.c
as tlb_helper.c in the next commit.
Signed-off-by: Philippe Mathieu-Daudé
---
Any better name? xxx_helper.c are usually TCG helpers.
---
target/mips/common_helper.c | 178
To help understand ifdef'ry, add comment after #endif.
Signed-off-by: Philippe Mathieu-Daudé
---
target/mips/helper.c | 15 ---
1 file changed, 8 insertions(+), 7 deletions(-)
diff --git a/target/mips/helper.c b/target/mips/helper.c
index bb962a3e8cc..6d33809fb8b 100644
---
Signed-off-by: Philippe Mathieu-Daudé
---
target/mips/cpu.c| 33 +
target/mips/helper.c | 33 -
2 files changed, 33 insertions(+), 33 deletions(-)
diff --git a/target/mips/cpu.c b/target/mips/cpu.c
index
Nothing TCG specific there, move to common cpu code.
Signed-off-by: Philippe Mathieu-Daudé
---
target/mips/internal.h | 4 -
target/mips/cpu.c | 243
target/mips/translate.c | 240 ---
3 files changed, 243
mips_cpu_do_transaction_failed() requires MemTxAttrs
and MemTxResult declarations.
Signed-off-by: Philippe Mathieu-Daudé
---
target/mips/internal.h | 1 +
target/mips/kvm.c | 1 -
2 files changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/mips/internal.h b/target/mips/internal.h
Move cpu_supports*() and cpu_set_exception_base() from
translate.c to cpu.c.
Signed-off-by: Philippe Mathieu-Daudé
---
target/mips/cpu.c | 18 ++
target/mips/translate.c | 18 --
2 files changed, 18 insertions(+), 18 deletions(-)
diff --git
Signed-off-by: Philippe Mathieu-Daudé
---
target/mips/op_helper.c | 4
1 file changed, 4 deletions(-)
diff --git a/target/mips/op_helper.c b/target/mips/op_helper.c
index 5184a1838be..5aa97902e98 100644
--- a/target/mips/op_helper.c
+++ b/target/mips/op_helper.c
@@ -19,15 +19,11 @@
*/
Signed-off-by: Philippe Mathieu-Daudé
---
target/mips/kvm.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/target/mips/kvm.c b/target/mips/kvm.c
index 72637a1e021..b3f193f7764 100644
--- a/target/mips/kvm.c
+++ b/target/mips/kvm.c
@@ -19,11 +19,9 @@
#include "internal.h"
#include
Signed-off-by: Philippe Mathieu-Daudé
---
target/mips/fpu_helper.c | 4
1 file changed, 4 deletions(-)
diff --git a/target/mips/fpu_helper.c b/target/mips/fpu_helper.c
index 020b768e87b..956e3417d0f 100644
--- a/target/mips/fpu_helper.c
+++ b/target/mips/fpu_helper.c
@@ -21,15 +21,11 @@
This file contains functions related to TLB management,
rename it as 'tlb_helper.c'.
Signed-off-by: Philippe Mathieu-Daudé
---
Maybe I missed some functions not TLB specific...
---
target/mips/{helper.c => tlb_helper.c} | 2 +-
target/mips/meson.build| 2 +-
2 files changed, 2
Signed-off-by: Philippe Mathieu-Daudé
---
target/mips/translate.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/target/mips/translate.c b/target/mips/translate.c
index 87dc38c0683..346635370c4 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -24,8 +24,6 @@
#include
Signed-off-by: Philippe Mathieu-Daudé
---
target/mips/internal.h | 1 +
target/mips/tlb_helper.c | 46 ++
target/mips/translate_init.c.inc | 48
3 files changed, 47 insertions(+), 48 deletions(-)
diff --git
Address translation is an architectural thing (not hardware
related). Move the helpers from hw/ to target/.
As physical address and KVM are specific to system mode
emulation, restrict this file to softmmu, so it doesn't
get compiled for user-mode emulation.
Signed-off-by: Philippe Mathieu-Daudé
Remove unused headers and add missing "qemu/log.h" since
qemu_log() is called.
Signed-off-by: Philippe Mathieu-Daudé
---
target/mips/cp0_helper.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/target/mips/cp0_helper.c b/target/mips/cp0_helper.c
index
Hi,
This is not what I had plan to finish this WE but well...
at least it is done, and the following series will be
clearer/easier to review.
There are now less dependencies on the big translate.c,
and we can almost build a KVM-only binary (without TCG).
Yet another very boring patch series,
Qemu's ACPI table generation sets the fields OEM ID and OEM table ID
to "BOCHS " and "BXPC" where "" is replaced by the ACPI
table name.
Some games like Red Dead Redemption 2 seem to check the ACPI OEM ID
and OEM table ID for the strings "BOCHS" and "BXPC" and if they are
found, the game
On 12/6/20 7:55 PM, Philippe Mathieu-Daudé wrote:
> Introduce a job template to cross-build accelerator specific
> jobs (enable a specific accelerator, disabling the others).
>
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> .gitlab-ci.d/crossbuilds.yml | 12
> 1 file changed, 12
Cross-build ARM and X86 targets with only Xen accelerator enabled.
Signed-off-by: Philippe Mathieu-Daudé
---
.gitlab-ci.d/crossbuilds-xen.yml | 14 ++
.gitlab-ci.yml | 1 +
MAINTAINERS | 1 +
3 files changed, 16 insertions(+)
create mode
Cross-build s390x target with only KVM accelerator enabled.
Signed-off-by: Philippe Mathieu-Daudé
---
.gitlab-ci.d/crossbuilds-kvm-s390x.yml | 6 ++
.gitlab-ci.yml | 1 +
MAINTAINERS| 1 +
3 files changed, 8 insertions(+)
create mode
Cross-build mips target with KVM and TCG accelerators enabled.
Signed-off-by: Philippe Mathieu-Daudé
---
later we'll build KVM-only.
---
.gitlab-ci.d/crossbuilds-kvm-mips.yml | 5 +
.gitlab-ci.yml| 1 +
MAINTAINERS | 1 +
3 files changed, 7
'extends' is an alternative to using YAML anchors
and is a little more flexible and readable. See:
https://docs.gitlab.com/ee/ci/yaml/#extends
More importantly it allows exploding YAML jobs.
Reviewed-by: Wainer dos Santos Moschetta
Signed-off-by: Philippe Mathieu-Daudé
---
Cross-build ARM aarch64 target with KVM and TCG accelerators enabled.
Signed-off-by: Philippe Mathieu-Daudé
---
later this job will build KVM-only.
---
.gitlab-ci.d/crossbuilds-kvm-arm.yml | 5 +
.gitlab-ci.yml | 1 +
MAINTAINERS | 1 +
3 files
Cross-build PPC target with KVM and TCG accelerators enabled.
Signed-off-by: Philippe Mathieu-Daudé
---
later this job build KVM-only.
---
.gitlab-ci.d/crossbuilds-kvm-ppc.yml | 5 +
.gitlab-ci.yml | 1 +
MAINTAINERS | 1 +
3 files changed, 7
Cross-build x86 target with only KVM accelerator enabled.
Signed-off-by: Philippe Mathieu-Daudé
---
.gitlab-ci.d/crossbuilds-kvm-x86.yml | 6 ++
.gitlab-ci.yml | 1 +
MAINTAINERS | 1 +
3 files changed, 8 insertions(+)
create mode 100644
Hi,
I was custom to use Travis-CI for testing KVM builds on s390x/ppc
with the Travis-CI jobs.
During October Travis-CI became unusable for me (extremely slow,
see [1]). Then my free Travis account got updated to the new
"10K credit minutes allotment" [2] which I burned without reading
the
Introduce a job template to cross-build accelerator specific
jobs (enable a specific accelerator, disabling the others).
Signed-off-by: Philippe Mathieu-Daudé
---
.gitlab-ci.d/crossbuilds.yml | 12
1 file changed, 12 insertions(+)
diff --git a/.gitlab-ci.d/crossbuilds.yml
On Fri, Dec 4, 2020 at 3:57 PM Toke Høiland-Jørgensen
wrote:
> Yuri Benditovich writes:
>
> > On Fri, Dec 4, 2020 at 12:09 PM Toke Høiland-Jørgensen
> > wrote:
> >
> >> Yuri Benditovich writes:
> >>
> >> > On Wed, Dec 2, 2020 at 4:18 PM Toke Høiland-Jørgensen <
> t...@redhat.com>
> >> >
Sends mouse buttons 4 and 5, aka "SIDE" and "EXTRA" to the guest
Signed-off-by: Darrell Walisser
---
ui/sdl2.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/ui/sdl2.c b/ui/sdl2.c
index 189d26e2a9..a578017268 100644
--- a/ui/sdl2.c
+++ b/ui/sdl2.c
@@ -275,6 +275,8 @@ static void
As suggested before, I've instead copied the code to the appropriate
callback function so that the refresh rate gets properly updated.
Also to avoid repeating the gd_refresh_rate_millihz function, I've
globalized it. I hope you don't mind.
Signed-off-by: Nikola Pavlica
Hi Philippe,
On Sun, Dec 6, 2020 at 7:50 PM Philippe Mathieu-Daudé wrote:
>
> Hi Ben,
>
> On 12/6/20 3:14 AM, Bin Meng wrote:
> > From: Bin Meng
> >
> > At present net_checksum_calculate() blindly calculates all types of
> > checksums (IP, TCP, UDP). Some NICs may have a per type setting in
> >
Hi Ben,
On 12/6/20 3:14 AM, Bin Meng wrote:
> From: Bin Meng
>
> At present net_checksum_calculate() blindly calculates all types of
> checksums (IP, TCP, UDP). Some NICs may have a per type setting in
> their BDs to control what checksum should be offloaded. To support
> such hardware
On 12/6/20 12:42 PM, Philippe Mathieu-Daudé wrote:
> Hi Nikola,
>
> On 12/6/20 11:43 AM, Nikola Pavlica wrote:
>> I've discussed this issue back January and September. But it still
>> occurs on my machine, despite the two patches.
Oh, also, instead of "my machine", please provide more
Hi Nikola,
On 12/6/20 11:43 AM, Nikola Pavlica wrote:
> I've discussed this issue back January and September. But it still
> occurs on my machine, despite the two patches. This time, the issue is
> that the UI refresh rate doesn't get updated when I launch QEMU with
> gl=on. My fix for this issue
On 12/5/20 3:18 PM, Philippe Mathieu-Daudé wrote:
> On 12/5/20 10:22 AM, Huacai Chen wrote:
>> Use @kernel.org address as the main communications end point. Update the
>> corresponding M-entries and .mailmap (for git shortlog translation).
>>
>> Signed-off-by: Huacai Chen
>> ---
>> .mailmap|
I've discussed this issue back January and September. But it still
occurs on my machine, despite the two patches.
This time, the issue is that the UI refresh rate doesn't get updated
when I launch QEMU with gl=on.
My fix for this issue is to move the code for updating the refresh rate
above the
On 06/12/20 09:21, FelixCuioc wrote:
From: FelixCui-oc
Flatview_simplify() will cause some innocent mappings
to be unmapped.
Signed-off-by: FelixCui-oc
Signed-off-by: FelixCuioc
---
softmmu/memory.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/softmmu/memory.c b/softmmu/memory.c
When assign EHCI device to the virtual machine,
after initializing EHCI in seabios,it will continuously
send dma cycles.
Flatview_simplify() will merge a very large range.The IOVA
mappings of the EHCI device will be innocently unmapped
between the delete and add phases of the VFIO MemoryListener.
From: FelixCui-oc
Flatview_simplify() will cause some innocent mappings
to be unmapped.
Signed-off-by: FelixCui-oc
Signed-off-by: FelixCuioc
---
softmmu/memory.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/softmmu/memory.c b/softmmu/memory.c
index 11ca94d037..66d36dcac4 100644
---
77 matches
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