As per the PAPR, bit 0 of byte 64 in pa-features property indicates
availability of 2nd DAWR registers. i.e. If this bit is set, 2nd
DAWR is present, otherwise not. Use KVM_CAP_PPC_DAWR1 capability to
find whether kvm supports 2nd DAWR or not. If it's supported, allow
user to set the pa-feature
Power10 is introducing second DAWR. Use real register names (with
suffix 0) from ISA for current macros and variables used by Qemu.
One exception to this is KVM_REG_PPC_DAWR[X]. This is from kernel
uapi header and thus not changed in kernel as well as Qemu.
Signed-off-by: Ravi Bangoria
Update against Linux 5.12-rc3
Signed-off-by: Ravi Bangoria
---
include/standard-headers/drm/drm_fourcc.h | 23 -
include/standard-headers/linux/input.h| 2 +-
.../standard-headers/rdma/vmw_pvrdma-abi.h| 7 ++
linux-headers/asm-generic/unistd.h| 4 +-
This series enables 2nd DAWR support on p10 qemu guest. 2nd
DAWR is new watchpoint added in Power10 processor. Kernel/kvm
patches are already in[1]. Watchpoint on powerpc TCG guest is
not supported and thus 2nd DAWR is not enabled for TCG mode.
Patches apply fine on qemu/master branch
在 2021/4/2 下午4:15, Jason Wang 写道:
Hi All:
Several issues has been reported for query-netdev command:
- coverity warnings of memory leak and cut-and-paste issue
- lacking of documentation for future new netdev development
Consider it's late in the rc, I would like to revert this series and
Commit 4c70875372b8 ("pci: advertise a page aligned ATS") advertises
the page aligned via ATS capability (RO) to unbrek recent Linux IOMMU
drivers since 5.2. But it forgot the compat the capability which
breaks the migration from old machine type:
(qemu) qemu-kvm: get_pci_config_device: Bad
在 2021/4/2 下午5:31, Michael S. Tsirkin 写道:
On Fri, Apr 02, 2021 at 03:55:20PM +0800, Jason Wang wrote:
Commit 4c70875372b8 ("pci: advertise a page aligned ATS") advertises
the page aligned via ATS capability (RO) to unbrek recent Linux IOMMU
drivers since 5.2. But it forgot the compat the
I'm looking at this document: http://bitsavers.trailing-
edge.com/components/amd/_dataSheets/1993_53c974_PCscsi.pdf
But I can't find this RSTAT/RINTR register in it. Am I looking at the
wrong document, or is there a name mapping to the official names that
I'm missing?
--
You received this bug
Public bug reported:
I extracted the qemu 5.2.0 source as one user, and then tried to run
`./configure --help` in that directory as a different user. Normal
autoconf configure scripts have no problem with this but yours goes into
an infinite loop printing nonsense:
Using './build' as the
Hi,
Ping...
Thanks
On Fri, 2021-03-26 at 23:01 +0800, Robert Hoo wrote:
> On Fri, 2021-03-26 at 22:54 +0800, Robert Hoo wrote:
> > Since commit fa4518741e (target-i386: Rename struct XMMReg to
> > ZMMReg),
> > CPUX86State.xmm_regs[] has already been extended to 512bit to
> > support
> > AVX512.
Expose AVX (VEX-encoded) versions of the Vector Neural Network
Instructions to guest.
The bit definition:
CPUID.(EAX=7,ECX=1):EAX[bit 4] AVX_VNNI
The following instructions are available when this feature is
present in the guest.
1. VPDPBUS: Multiply and Add Unsigned and Signed Bytes
2.
在 2021/4/6 上午4:00, Dongli Zhang 写道:
On 4/1/21 8:47 PM, Jason Wang wrote:
在 2021/3/30 下午3:29, Dongli Zhang 写道:
On 3/28/21 8:56 PM, Jason Wang wrote:
在 2021/3/27 上午5:16, Dongli Zhang 写道:
Hi Jason,
On 3/26/21 12:24 AM, Jason Wang wrote:
在 2021/3/26 下午1:44, Dongli Zhang 写道:
The virtio
Public bug reported:
This is reproducible against QEMU master. I apologize for the long
reproduction steps, I tried to distill it down as much as possible.
System info:
# qemu-aarch64-static --version
qemu-aarch64 version 5.2.91 (v6.0.0-rc1-68-gee82c086ba)
Copyright (c) 2003-2021 Fabrice
Public bug reported:
QEMU fails migration when using a sparc target.
This cab be verified/reproduced with the `tests/acceptance/migration.py`
test. Running it with:
$ make check-venv
$ ./tests/venv/bin/avocado --show=test run -p qemu_bin=./qemu-system-sparc
> -Original Message-
> From: Philippe Mathieu-Daudé On
> Behalf Of Philippe Mathieu-Daudé
> Sent: Thursday, February 11, 2021 6:23 PM
> To: Taylor Simpson ; qemu-devel@nongnu.org
> Cc: richard.hender...@linaro.org; alex.ben...@linaro.org;
> laur...@vivier.eu; a...@rev.ng; Brian Cain
>
> -Original Message-
> From: Alessandro Di Federico
> Sent: Thursday, March 18, 2021 12:27 PM
> To: Taylor Simpson
> Cc: Richard Henderson ; qemu-
> de...@nongnu.org; Brian Cain ; bab...@rev.ng;
> ni...@rev.ng; phi...@redhat.com
> Subject: Re: [PATCH v2 02/10] target/hexagon: import
nch 'remotes/xtensa/tags/20210403-xtensa' into
> staging (2021-04-04 21:48:45 +0100)
>
> are available in the Git repository at:
>
> https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20210405
>
> for you to fetch changes up to ef951ee33fba780dd6c2b7f8ff25c84c3f87a6b8:
>
>
On 4/1/21 8:47 PM, Jason Wang wrote:
>
> 在 2021/3/30 下午3:29, Dongli Zhang 写道:
>>
>> On 3/28/21 8:56 PM, Jason Wang wrote:
>>> 在 2021/3/27 上午5:16, Dongli Zhang 写道:
Hi Jason,
On 3/26/21 12:24 AM, Jason Wang wrote:
> 在 2021/3/26 下午1:44, Dongli Zhang 写道:
>> The virtio
On Sat, Apr 03, 2021 at 03:28:08PM -0700, Patrick Venture wrote:
> The i2c mux device pca954x implements two devices:
> - the pca9546 and pca9548.
>
> Patrick Venture (2):
> hw/i2c/core: add reachable state boolean
> hw/i2c: add pca954x i2c-mux switch
Looking this over, the code looks good,
Hmm,
it seems I need to retract this bug. It turns out that the 32-bit macppc port
of NetBSD only supports a maximum of 2GB of memory. As a NetBSD developer said
it:
> The physical memory map on G4 Macs doesn't have room for more than 2G
of RAM.
So, I've set the status of this bug report to
On Mon, Apr 05, 2021 at 07:54:44PM +0200, Klaus Jensen wrote:
> From: Klaus Jensen
>
> Various fixes for 6.0.
>
> v2:
> - "hw/block/nvme: fix handling of private namespaces"
> update documentation (Gollu)
> - add a patch for missing copyright headers
Series looks fine.
Reviewed-by:
From: Klaus Jensen
Remove the unused BlockConf from the controller structure and fix the
constraint checking to actually check the right BlockConf and issue the
warning.
Signed-off-by: Klaus Jensen
Reviewed-by: Gollu Appalanaidu
---
hw/block/nvme.h | 1 -
hw/block/nvme.c | 2 +-
2 files
From: Klaus Jensen
Prior to this patch, if a private nvme-ns device (that is, a namespace
that is not linked to a subsystem) is wired up to an nvme-subsys linked
nvme controller device, the device fails to verify that the namespace id
is unique within the subsystem. NVM Express v1.4b, Section
From: Klaus Jensen
The controller namespaces array being 0-indexed requires 'nsid - 1'
everywhere. Something that is easy to miss. Align the controller
namespaces array with the subsystem namespaces array such that both are
1-indexed.
Signed-off-by: Klaus Jensen
Reviewed-by: Gollu Appalanaidu
From: Klaus Jensen
Add missing license/copyright headers to the nvme-dif.{c,h} files.
Signed-off-by: Klaus Jensen
---
hw/block/nvme-dif.h | 10 ++
hw/block/nvme-dif.c | 10 ++
2 files changed, 20 insertions(+)
diff --git a/hw/block/nvme-dif.h b/hw/block/nvme-dif.h
index
From: Klaus Jensen
Protection Information can only be enabled if there is at least 8 bytes
of metadata.
Signed-off-by: Klaus Jensen
Reviewed-by: Gollu Appalanaidu
---
hw/block/nvme-ns.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/block/nvme-ns.c
From: Klaus Jensen
The Non-MDTS DMSRL limit must be recomputed when namespaces are
detached.
Fixes: 645ce1a70cb6 ("hw/block/nvme: support namespace attachment command")
Signed-off-by: Klaus Jensen
Reviewed-by: Gollu Appalanaidu
---
hw/block/nvme.c | 17 +
1 file changed, 17
From: Klaus Jensen
The `nvme_nsid()` function returns '-1' (h) when the given
namespace is NULL. Since h is actually a valid namespace
identifier (the "broadcast" value), change this to be '0' since that
actually *is* the invalid value.
Signed-off-by: Klaus Jensen
Reviewed-by:
From: Klaus Jensen
Various fixes for 6.0.
v2:
- "hw/block/nvme: fix handling of private namespaces"
update documentation (Gollu)
- add a patch for missing copyright headers
Klaus Jensen (8):
hw/block/nvme: fix pi constraint check
hw/block/nvme: fix missing string representation for
From: Klaus Jensen
Add the missing nvme_adm_opc_str entry for the Namespace Attachment
command.
Signed-off-by: Klaus Jensen
Reviewed-by: Gollu Appalanaidu
---
hw/block/nvme.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/hw/block/nvme.h b/hw/block/nvme.h
index
From: Niklas Cassel
The description was originally removed in commit 578d914b263c
("hw/block/nvme: align zoned.zasl with mdts") together with the removal
of the zoned.append_size_limit parameter itself.
However, it was (most likely accidentally), re-added in commit
f7dcd31885cb ("hw/block/nvme:
From: Klaus Jensen
Hi Peter,
The following changes since commit 25d75c99b2e5941c67049ee776efdb226414f4c6:
Merge remote-tracking branch 'remotes/xtensa/tags/20210403-xtensa' into
staging (2021-04-04 21:48:45 +0100)
are available in the Git repository at:
From: Joelle van Dyne
The check for `n->namespace.blkconf.blk` always fails because
this is in the initialization function.
Signed-off-by: Joelle van Dyne
Reviewed-by: Klaus Jensen
Signed-off-by: Klaus Jensen
---
hw/block/nvme.c | 8 +++-
1 file changed, 3 insertions(+), 5 deletions(-)
On 4/1/2021 4:35 PM, Cornelia Huck wrote:
On Fri, 26 Mar 2021 18:48:50 +0530
Tarun Gupta wrote:
Document interfaces used for VFIO device migration. Added flow of state changes
during live migration with VFIO device. Tested by building docs with the new
vfio-migration.rst file.
I don't
Hi, Cedric and Corey
When I'm implementing KCS device for nuvoton BMC boards, one of the
feedback Corey gave me was to refactor the existing device like
ipmi-bmc-extern so that we can reuse some of the common stuff there. I'm in
the process of doing that. I'll probably send that as an RFC first
Hi all,
The team I'm working on started to work on adding support for building the ppc
target with the disable-tcg option. However, we're not quite sure on where to
start with such a big patch.
* Should we focus first on changing the .c files, so that it will build
when we finally patch
On 4/2/21 1:02 PM, Alistair Francis wrote:
@@ -369,6 +369,9 @@ static void gen_jal(DisasContext *ctx, int rd, target_ulong
imm)
static void mark_fs_dirty(DisasContext *ctx)
{
TCGv tmp;
+CPUState *cpu = ctx->cs;
+CPURISCVState *env = cpu->env_ptr;
+
if (ctx->mstatus_fs ==
On 4/2/21 1:02 PM, Alistair Francis wrote:
@@ -622,9 +632,15 @@ static void raise_mmu_exception(CPURISCVState *env,
target_ulong address,
CPUState *cs = env_cpu(env);
int page_fault_exceptions;
if (first_stage) {
-page_fault_exceptions =
-
On 4/2/21 1:02 PM, Alistair Francis wrote:
Signed-off-by: Alistair Francis
---
target/riscv/cpu_bits.h | 11 ---
target/riscv/cpu_helper.c | 21 -
2 files changed, 16 insertions(+), 16 deletions(-)
Reviewed-by: Richard Henderson
@@ -621,9 +626,15 @@
On 4/2/21 1:02 PM, Alistair Francis wrote:
Signed-off-by: Alistair Francis
---
target/riscv/translate.c | 6 --
1 file changed, 6 deletions(-)
Reviewed-by: Richard Henderson
r~
From: Pavel Dovgalyuk
This patch handles icount mode for timer read/write instructions,
because it is required to call gen_io_start in such cases.
Signed-off-by: Pavel Dovgalyuk
Reviewed-by: Richard Henderson
Message-Id:
<161700373035.1135822.16451510827008616793.stgit@pasha-ThinkPad-X280>
On 4/2/21 1:02 PM, Alistair Francis wrote:
Signed-off-by: Alistair Francis
---
target/riscv/cpu_bits.h | 6 --
1 file changed, 6 deletions(-)
Reviewed-by: Richard Henderson
r~
From: Cupertino Miranda
---
configure | 2 ++
default-configs/devices/arcv3-softmmu.mak | 7 +++
default-configs/targets/arcv3-softmmu.mak | 3 +++
include/disas/dis-asm.h | 2 ++
include/elf.h | 1 +
meson.build
From: Cupertino Miranda
---
target/arc/irq.c| 11 +
target/arc/irq.h| 7 +
target/arc/mmu-v6.c | 640
target/arc/mmu-v6.h | 36 +++
4 files changed, 694 insertions(+)
create mode 100644 target/arc/mmu-v6.c
create mode 100644
On 4/2/21 1:02 PM, Alistair Francis wrote:
Signed-off-by: Alistair Francis
---
target/riscv/cpu_bits.h | 6 --
target/riscv/csr.c | 9 -
2 files changed, 8 insertions(+), 7 deletions(-)
Reviewed-by: Richard Henderson
r~
From: Kele Huang
The addrl used to compare with SoftTLB entry should be sign-extended
in common case, and it will cause constant failing in SoftTLB
comparisons for the addrl whose address is over 0x8000 on the
emulation of 32-bit guest on 64-bit host.
This is an important performance bug
From: Cupertino Miranda
---
target/arc/regs-detail.def | 40 ++
target/arc/regs-impl.c | 5 +
target/arc/regs.def| 20 +++
3 files changed, 65 insertions(+)
diff --git a/target/arc/regs-detail.def b/target/arc/regs-detail.def
On 4/5/21 1:20 AM, Pavel Dovgalyuk wrote:
This patch fixes calculation of number of the instructions
that fit the current page. It prevents creation of the translation
blocks that cross the page boundaries. It is required for deterministic
exception generation in icount mode.
Signed-off-by:
From: Cupertino Miranda
---
disas/arc.c| 51 +-
target/arc/decoder-v3.c| 1547
target/arc/decoder-v3.h| 322
target/arc/flags-v3.def| 103 +++
target/arc/operands-v3.def | 133
5 files changed, 2147
On 4/2/21 1:02 PM, Alistair Francis wrote:
Signed-off-by: Alistair Francis
---
target/riscv/cpu.h | 6 --
target/riscv/cpu.c | 6 +-
2 files changed, 5 insertions(+), 7 deletions(-)
Reviewed-by: Richard Henderson
r~
From: Cupertino Miranda
Just an acceptance test with ARC Linux booting.
Signed-off-by: Cupertino Miranda
---
tests/acceptance/boot_linux_console.py | 55 ++
1 file changed, 55 insertions(+)
diff --git a/tests/acceptance/boot_linux_console.py
repository at:
https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20210405
for you to fetch changes up to ef951ee33fba780dd6c2b7f8ff25c84c3f87a6b8:
target/alpha: fix icount handling for timer instructions (2021-04-05 07:32:56
-0700
From: Claudiu Zissulescu
Add the Synopsys ARC boards, arc_sim for testing, sim-hs main emulation
board using standard UART and nsim which includes a Synopsys ARC specific
UART implementation.
Signed-off-by: Claudiu Zissulescu
---
hw/arc/Makefile.objs | 21 +
hw/arc/arc_sim.c
From: Cupertino Miranda
---
hw/arc/boot.c | 1 +
hw/arc/virt.c | 4
2 files changed, 5 insertions(+)
diff --git a/hw/arc/boot.c b/hw/arc/boot.c
index 962fc03b03..0af559e44b 100644
--- a/hw/arc/boot.c
+++ b/hw/arc/boot.c
@@ -69,6 +69,7 @@ void arc_load_kernel(ARCCPU *cpu, struct
From: Cupertino Miranda
Add the infrastructure to define build configuration (BCR) and auxiliary
registers allowing independent modules (MMU, MPU, etc.) to use and extend
them.
Signed-off-by: Cupertino Miranda
---
target/arc/cache.c | 182 +
target/arc/cache.h |
From: Shahab Vahedi
Register layout for the target and the mechanisms to read and set them.
Signed-off-by: Shahab Vahedi
---
gdb-xml/arc-v2-aux.xml | 32 +++
gdb-xml/arc-v2-core.xml | 45 +
gdb-xml/arc-v2-other.xml | 235 ++
target/arc/gdbstub.c | 421
From: Cupertino Miranda
---
target/arc/extra_mapping.def | 16 +
target/arc/helper.c | 11 +
target/arc/helper.h | 16 +
target/arc/op_helper.c| 110 ++-
target/arc/semfunc-v2_mapping.def | 321
From: Cupertino Miranda
---
gdb-xml/arc-core-v3.xml | 45 +
gdb-xml/arc64-aux-minimal.xml | 32 ++
gdb-xml/arc64-aux-other.xml | 177 ++
target/arc/gdbstub.c | 23 +
target/arc/gdbstub.h | 10 ++
5 files changed, 287
From: Shahab Vahedi
Add remaining bits of the Synopsys ARCv2 (EM/HS) support into QEMU,
configure bits, arch_init and configuration files for softmmu (hardware
emulation).
Signed-off-by: Shahab Vahedi
Signed-off-by: Cupertino Miranda
---
configure | 2 ++
From: Shahab Vahedi
Add memory implementation for Synopsys MPU unit version 3.
Synopsys MPU allows to create memory regions against unauthorized
execution/read/writes accesses.
Signed-off-by: Shahab Vahedi
---
target/arc/mpu.c | 656 +++
From: Cupertino Miranda
---
target/arc/translate.c | 180 +
1 file changed, 180 insertions(+)
diff --git a/target/arc/translate.c b/target/arc/translate.c
index 1712fcc9c3..6b2102394f 100644
--- a/target/arc/translate.c
+++ b/target/arc/translate.c
@@
From: Claudiu Zissulescu
Signed-off-by: Claudiu Zissulescu
---
target/arc/irq.c | 680 +
target/arc/irq.h | 37 +++
target/arc/timer.c | 459 ++
target/arc/timer.h | 27 ++
4 files changed, 1203 insertions(+)
create
From: Cupertino Miranda
---
target/arc/arc-common.h | 19 +++
target/arc/cpu-param.h | 10 ++
target/arc/cpu.c| 35 +++
target/arc/cpu.h| 12
target/arc/meson.build | 19 ---
5 files changed,
From: Cupertino Miranda
TCG generator scripts for semfunc.c file.
Signed-off-by: Cupertino Miranda
---
target/arc/semfunc_generator/Gemfile | 3 +
target/arc/semfunc_generator/README | 35 ++
.../classes/CreateInternalVars.rb | 117
From: Cupertino Miranda
Add the most generic parts of TCG constructions. It contains the
basic infrastructure for fundamental ARC features, such as
ZOL (zero overhead loops) and delay-slots.
Also includes hand crafted TCG for more intricate instructions, such
as vector instructions.
From: Claudiu Zissulescu
The decoder and the disassembler inspired by ARC GNU binutils.
Signed-off-by: Claudiu Zissulescu
---
disas/arc.c | 422 +
target/arc/decoder.c| 1297 +++
target/arc/decoder.h| 351 +++
From: Cupertino Miranda
Add Synopsys ARC MMU version 4 support. The implementation is
restricted to 8K page size support.
Signed-off-by: Cupertino Miranda
---
target/arc/mmu.c | 805 +++
target/arc/mmu.h | 148 +
2 files changed, 953
From: Cupertino Miranda
Signed-off-by: Cupertino Miranda
---
target/arc/extra_mapping.def | 63 +
target/arc/helper.c| 281 +++
target/arc/helper.h| 39
target/arc/op_helper.c | 406 +
From: Cupertino Miranda
Signed-off-by: Cupertino Miranda
---
target/arc/arc-common.h | 54 +
target/arc/cpu-param.h | 32 +++
target/arc/cpu-qom.h| 52 +
target/arc/cpu.c| 472
target/arc/cpu.h| 445
Hello everyone,
Here is a long due refresh of ARC port patches.
The reason for taking so long was that I did a big refreshement to the
code due to the adition of the soon to release ARCv3 (64 bit) architecture.
In order to avoid further big changes in the original patches we decided to
delay the
On 4/5/2021 7:16 PM, Peter Maydell wrote:
On Sun, 4 Apr 2021 at 23:26, CKIM wrote:
I have very old binary (testgen) which was built from old sparc station.
(no source code)
If I run "file testgen", I get the following.
ELF 32-bit MSB executable SPARC32PLUS Version 1, V8+ Required,
On Apr 5 18:02, Gollu Appalanaidu wrote:
> On Wed, Mar 24, 2021 at 09:09:07PM +0100, Klaus Jensen wrote:
> > From: Klaus Jensen
> >
> > Prior to this patch, if a private nvme-ns device (that is, a namespace
> > that is not linked to a subsystem) is wired up to an nvme-subsys linked
> > nvme
On Sat, 3 Apr 2021 at 17:16, Max Filippov wrote:
>
> Hi Peter,
>
> please pull the following two fixes for the target/xtensa.
>
> The following changes since commit 6d40ce00c1166c317e298ad82ecf10e650c4f87d:
>
> Update version for v6.0.0-rc1 release (2021-03-30 18:19:07 +0100)
>
> are available
In ga_get_win_product_name() a handle to Registry key was open
but not closed.
In this patch the handle is closed as part of the free routine.
Buglink: https://bugzilla.redhat.com/show_bug.cgi?id=1929144
Signed-off-by: Basil Salman
Signed-off-by: Basil Salman
---
qga/commands-win32.c | 8
Currently Requester freeze times out after 10 seconds, while
the default timeout for Writer Freeze is 60 seconds. according to
VSS Documentation [1].
[1]:
https://docs.microsoft.com/en-us/windows/win32/vss/overview-of-processing-a-backup-under-vss
Buglink:
On the current error path of build_guest_fsinfo(), a non existent
handle is passed to CloseHandle().
This patch add initialization of hLocalDiskHandle to INVALID_HANDLE_VALUE,
and checks for handle validity before the handle is closed.
Signed-off-by: Basil Salman
Signed-off-by: Basil Salman
---
On Wed, Mar 24, 2021 at 09:09:07PM +0100, Klaus Jensen wrote:
From: Klaus Jensen
Prior to this patch, if a private nvme-ns device (that is, a namespace
that is not linked to a subsystem) is wired up to an nvme-subsys linked
nvme controller device, the device fails to verify that the namespace
On Wed, Mar 24, 2021 at 09:09:00PM +0100, Klaus Jensen wrote:
From: Klaus Jensen
Various fixes for 6.0.
Klaus Jensen (7):
hw/block/nvme: fix pi constraint check
hw/block/nvme: fix missing string representation for ns attachment
hw/block/nvme: fix the nsid 'invalid' value
hw/block/nvme:
On Mar 24 21:09, Klaus Jensen wrote:
> From: Klaus Jensen
>
> Various fixes for 6.0.
>
> Klaus Jensen (7):
> hw/block/nvme: fix pi constraint check
> hw/block/nvme: fix missing string representation for ns attachment
> hw/block/nvme: fix the nsid 'invalid' value
> hw/block/nvme: fix
On Sun, 4 Apr 2021 at 23:26, CKIM wrote:
> I have very old binary (testgen) which was built from old sparc station.
> (no source code)
>
> If I run "file testgen", I get the following.
> ELF 32-bit MSB executable SPARC32PLUS Version 1, V8+ Required,
> UltraSPARC1 Extensions Required, statically
I've had a look at your am53c974 boot floppy with PcSCSI drivers and I'm
fairly sure that disabling INT13 support isn't helping here. With your
custom SeaBIOS I see a hang issuing the first SCSI command: without your
custom SeaBIOS I can see that the default SeaBIOS issues several
successful
On 01-04-21, 14:43, Alex Bennée wrote:
> > +/* Parse clients [:] entries one by
> > one */
>
> Then this would be:
>
> **dev = g_strsplit(cp[i], ":", 2);
There can be any number of client devices present for a bus, not just 2.
--
viresh
This adds the vhost-user backend driver to support virtio based I2C and
SMBUS devices.
vhost-user-i2c --help
Signed-off-by: Viresh Kumar
---
V2->2.1
- Check for more smbus functionalities.
- Use better glibc helpers for string parsing.
- Remove code to check return value of memory allocation.
-
This patch fixes calculation of number of the instructions
that fit the current page. It prevents creation of the translation
blocks that cross the page boundaries. It is required for deterministic
exception generation in icount mode.
Signed-off-by: Pavel Dovgalyuk
---
target/nios2/translate.c
On 01/04/2021 21.04, Paolo Bonzini wrote:
Signed-off-by: Paolo Bonzini
---
contribute.md | 2 ++
1 file changed, 2 insertions(+)
diff --git a/contribute.md b/contribute.md
index bcb048e..d7e295f 100644
--- a/contribute.md
+++ b/contribute.md
@@ -16,3 +16,5 @@ permalink: /contribute/
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