On 5/18/21 10:15 PM, Peter Maydell wrote:
> On Tue, 18 May 2021 at 19:38, Philippe Mathieu-Daudé
> wrote:
>>
>> When the pointer alignment is known to be safe, we can
>> directly swap the data in place, without having to rely
>> on the compiler builtin code.
>>
>> Load/store methods expecting
Patchew URL:
https://patchew.org/QEMU/20210519053940.1888907-1-kra...@redhat.com/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: 20210519053940.1888907-1-kra...@redhat.com
Subject: [PATCH v6 0/9] ui: add vdagent
Want place gtk clipboard code in a separate C file, which in turn
requires GtkDisplayState being in a header file. So move it. No
functional change.
Signed-off-by: Gerd Hoffmann
Reviewed-by: Marc-André Lureau
---
include/ui/gtk.h | 57
This patch adds support for cut+paste to the qemu vnc server, which
allows the vnc client exchange clipbaord data with qemu and other peers
like the qemu vdagent implementation.
Signed-off-by: Gerd Hoffmann
Reviewed-by: Marc-André Lureau
---
ui/vnc.h | 24
ui/vnc-clipboard.c |
The vdagent protocol allows the guest agent (spice-vdagent) and the
spice client exchange messages to implement features which require
guest cooperation, for example clipboard support.
This is a qemu implementation of the spice client side. This allows
the spice guest agent talk to qemu directly
This patch adds clipboard support to the qemu gtk ui.
Signed-off-by: Gerd Hoffmann
---
include/ui/gtk.h | 10 +++
ui/gtk-clipboard.c | 192 +
ui/gtk.c | 1 +
ui/meson.build | 2 +-
4 files changed, 204 insertions(+), 1 deletion(-)
This patch adds support for mouse messages to the vdagent
implementation. This can be enabled/disabled using the new
'mouse' parameter for the vdagent chardev. Default is on.
Signed-off-by: Gerd Hoffmann
Reviewed-by: Marc-André Lureau
---
chardev/char.c | 3 +
ui/vdagent.c | 149
This patch adds support for clipboard messages to the qemu vdagent
implementation, which allows the guest exchange clipboard data with
qemu. Clipboard support can be enabled/disabled using the new
'clipboard' parameter for the vdagent chardev. Default is off.
Signed-off-by: Gerd Hoffmann
---
Fist sketch of cut+paste support for vnc. On the guest side we are
going to reuse the spice vdagent, so things should work out-of-the-box
with guests in the wild. So this patch set brings a qemu implemenation
of the vdagent protocol.
Beside that there is the clipboard infrastructure of course.
Document clipboard infrastructure in qemu.
Signed-off-by: Gerd Hoffmann
Reviewed-by: Marc-André Lureau
---
include/ui/clipboard.h | 133 -
docs/devel/index.rst | 1 +
docs/devel/ui.rst | 8 +++
3 files changed, 141 insertions(+), 1 deletion(-)
When implementing spice vdagent protocol in qemu we only need the
spice-protocol package for that, spice-server is not needed. So
go split those two build dependencies.
Signed-off-by: Gerd Hoffmann
Reviewed-by: Marc-André Lureau
---
configure | 36
Add some infrastructure to manage the clipboard in qemu.
Signed-off-by: Gerd Hoffmann
Reviewed-by: Marc-André Lureau
---
include/ui/clipboard.h | 62
ui/clipboard.c | 92 ++
ui/meson.build | 1 +
3 files
On Tue, May 18, 2021 at 09:15:42AM -0400, Paolo Bonzini wrote:
> Right now the SPICE module is special cased to be loaded when processing
> of the -spice command line option. However, the spice option group
> can also be brought in via -readconfig, in which case the module is
> not loaded.
>
>
This series for the s390-next tree fixes [1]. Patch 1 is the fix, patch
2 is the new test to avoid similar regressions in the future.
[1] https://lists.nongnu.org/archive/html/qemu-devel/2021-05/msg02962.html
v1: https://lists.gnu.org/archive/html/qemu-devel/2021-05/msg03219.html
v1 -> v2: Fixed
Having a small test will prevent trivial regressions in the future.
Signed-off-by: Ilya Leoshkevich
---
tests/tcg/x86_64/Makefile.target | 6 +-
tests/tcg/x86_64/vsyscall.c | 12
2 files changed, 17 insertions(+), 1 deletion(-)
create mode 100644
tb_gen_code() assumes that tb->size must never be zero, otherwise it
may produce spurious exceptions. For x86_64 this may happen when
creating a translation block for the vsyscall page.
Fix by pretending that vsyscall translation blocks have at least one
instruction.
Signed-off-by: Ilya
On Tue, May 18, 2021 at 03:11:22PM -0500, Richard Henderson wrote:
> This attempts the cleanup I've been talking about with Bruno.
>
> On the way, there's a lot of MMUAccessType cleanup, to get the
> code into the form I wanted the interface to share. There's a
> lot more cleanup that could be
Hi Gerd,
>
> On Tue, May 11, 2021 at 03:47:06PM -0700, Vivek Kasireddy wrote:
> > Enabling this feature would eliminate data copies from the resource
> > object in the Guest to the shadow resource in Qemu. This patch series
> > however adds support only for Blobs of type VIRTIO_GPU_BLOB_MEM_GUEST
On Tue, May 18, 2021 at 03:30:20PM +0200, Giuseppe Musacchio wrote:
> TARGET_WORDS_BIGENDIAN may not match the machine endianness if that's a
> runtime-configurable parameter.
>
> Fixes: bcb0b7b1a1c05707304f80ca6f523d557816f85c
> Fixes: afae37d98ae991c0792c867dbd9f32f988044318
> Resolves:
On Tue, May 18, 2021 at 10:42:09AM -0500, Paul A. Clarke wrote:
> Thanks, all! My original patch which addressed this issue
> for me probably should've been labeled as an RFC. Thanks for your
> willingness to review it, in spite of its problems. It was a bit
> of a stab in the dark. I hope it
On Tue, May 18, 2021 at 12:05:09PM -0300, Bruno Larsen (billionai) wrote:
> When the function was moved to cpu.c, it should have been wrapped with
> #if !defined(CONFIG_USER_ONLY), otherwise linux-user builds don't work.
I already corrected this in my tree, folding it into the original
change to
On Tue, May 18, 2021 at 12:05:15PM -0300, Bruno Larsen (billionai) wrote:
> Wrapped some function calls in cpu_init.c, gdbstub.c, mmu-hash64.c and
> excp_helper.c that were TCG only with ifdef CONFIG_TCG, to support
> building without TCG.
>
> for excp_helper we also moved the function do_rfi
On Tue, May 18, 2021 at 09:30:38AM +0200, Greg Kurz wrote:
> On Tue, 18 May 2021 08:40:36 +0200
> Giuseppe Musacchio wrote:
>
> > The ISA [1] specifies the load order to be the target one, hence
> > the use of MO_TEQ in my patch (in both lxvwsx and lxvdsx).
> >
> > I believe the error is hidden
Added a table-like output which contains the total number of calls
for each used syscall along with the number of errors that occurred.
Per-call tracing is still available through supplying the argument
``print`` to the plugin.
Signed-off-by: Mahmoud Mandour
---
v3 -> v4: Added a missing
On 2021/5/19 3:22, Salil Mehta wrote:
From: Andrew Jones [mailto:drjo...@redhat.com]
Sent: Tuesday, May 18, 2021 8:06 PM
To: Salil Mehta
Cc: wangyanan (Y) ; Peter Maydell
; Michael S . Tsirkin ; Wanghaibin
(D) ; qemu-devel@nongnu.org; Shannon Zhao
; qemu-...@nongnu.org; Alistair Francis
;
Hi,Laszlo
Thanks for your kindly reply.This is my first time to submit
code to the community. I spent some time learning how to configure
the email and reply.
Yes you are right, fw_cfg_init_mem_wide can solve my problem.
I just want to access 8 bytes width.I did not look at the code
carefully.I
Hello all,
I'm Gaelan Steele, one of QEMU's Google Summer of Code students this
year. My mentor (Sergio Lopez) has asked me to introduce myself and my
project here.
As you all may know, QEMU supports virtio-scsi in one of two ways: it
can use a built-in C implementation, running in the main QEMU
> -Original Message-
> From: Lukas Straub
> Sent: Tuesday, May 18, 2021 7:42 PM
> To: qemu-devel
> Cc: qemu-block ; Alberto Garcia
> ; Kevin Wolf ; Max Reitz
> ; Minghao Yuan ; Zhang, Chen
> ; Zhang Chen
> Subject: [PATCH Resend] block/quorum: Provide .bdrv_co_flush instead
> of
Patchew URL:
https://patchew.org/QEMU/20210519001414.786439-1-vivek.kasire...@intel.com/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: 20210519001414.786439-1-vivek.kasire...@intel.com
Subject: [PATCH v5 00/13]
If a blob is available for the cursor, copy the data from the blob.
Based-on-patch-by: Gerd Hoffmann
Cc: Gerd Hoffmann
Signed-off-by: Vivek Kasireddy
---
hw/display/virtio-gpu.c | 19 ++-
1 file changed, 14 insertions(+), 5 deletions(-)
diff --git a/hw/display/virtio-gpu.c
Creating a small helper function for updating the scanout
will be useful in the next patch where this needs to be
done early in do_set_scanout before returning.
Cc: Gerd Hoffmann
Signed-off-by: Vivek Kasireddy
---
hw/display/virtio-gpu.c | 35 +++
1 file
Add the property bit, configuration flag and other relevant
macros and definitions associated with this feature.
Based-on-patch-by: Gerd Hoffmann
Cc: Gerd Hoffmann
Signed-off-by: Vivek Kasireddy
---
hw/display/virtio-gpu-base.c | 3 +++
hw/display/virtio-gpu.c| 14 ++
Instead of passing the attach_backing object to extract nr_entries
and offset, explicitly pass these as arguments to this function.
This will be helpful when adding create_blob API.
Cc: Gerd Hoffmann
Signed-off-by: Vivek Kasireddy
---
hw/display/virtio-gpu-virgl.c | 3 ++-
Store the meta-data associated with a FB in a new object
(struct virtio_gpu_framebuffer) and pass the object to set_scanout.
Also move code in set_scanout into a do_set_scanout function.
This will be helpful when adding set_scanout_blob API.
Based-on-patch-by: Gerd Hoffmann
Cc: Gerd Hoffmann
Add helper functions to create a dmabuf for a resource and mmap it.
Also, introduce the fields blob and blob_size so that these helpers
can start to use them but the full picture will emerge only after
adding create_blob API in patch 8 of this series.
To be able to create a dmabuf using the
This API allows Qemu to set the blob allocated by the Guest as
the scanout buffer. If Opengl support is available, then the
scanout buffer would be submitted as a dmabuf to the UI; if not,
a pixman image is created from the scanout buffer and is
submitted to the UI via the display surface.
This adds udmabuf header to standard headers so that the
relevant udmabuf objects can be accessed in subsequent
patches.
Based-on-patch-by: Gerd Hoffmann
Cc: Gerd Hoffmann
Signed-off-by: Vivek Kasireddy
---
include/standard-headers/linux/udmabuf.h | 32
These helpers can be useful for creating dmabuf objects from blobs
and submitting them to the UI.
Cc: Gerd Hoffmann
Signed-off-by: Vivek Kasireddy
---
hw/display/virtio-gpu-udmabuf.c | 74 +
include/hw/virtio/virtio-gpu.h | 15 +++
2 files changed, 89
This new function to get the drm_format associated with a pixman
format will be useful while creating a dmabuf.
Based-on-patch-by: Gerd Hoffmann
Cc: Gerd Hoffmann
Signed-off-by: Vivek Kasireddy
---
include/ui/qemu-pixman.h | 1 +
ui/qemu-pixman.c | 35
Try to open the udmabuf dev node for the first time or return the
fd if the device was previously opened.
Based-on-patch-by: Gerd Hoffmann
Cc: Gerd Hoffmann
Signed-off-by: Vivek Kasireddy
---
include/ui/console.h | 3 +++
ui/meson.build | 1 +
ui/udmabuf.c | 40
This API allows Qemu to register the blob allocated by the Guest
as a new resource and map its backing storage.
Based-on-patch-by: Gerd Hoffmann
Cc: Gerd Hoffmann
Signed-off-by: Vivek Kasireddy
---
hw/display/trace-events | 1 +
hw/display/virtio-gpu.c | 75
Hi Richard,
On Tue, May 18, 2021 at 1:11 PM Richard Henderson
wrote:
> On 5/17/21 3:52 PM, Max Filippov wrote:
> > @@ -1784,10 +1770,11 @@ static void translate_l32e(DisasContext *dc, const
> > OpcodeArg arg[],
> > const uint32_t par[])
> > {
> > TCGv_i32
Enabling this feature would eliminate data copies from the resource
object in the Guest to the shadow resource in Qemu. This patch series
however adds support only for Blobs of type
VIRTIO_GPU_BLOB_MEM_GUEST with property VIRTIO_GPU_BLOB_FLAG_USE_SHAREABLE.
Most of the patches in this series are
Move finding the resource and validating its backing storage into one
function.
Based-on-patch-by: Gerd Hoffmann
Cc: Gerd Hoffmann
Signed-off-by: Vivek Kasireddy
---
hw/display/virtio-gpu.c | 66 +
1 file changed, 47 insertions(+), 19 deletions(-)
diff
From: Corey Minyard
Lots of this are expected to be coming in, create a directory for them.
Also move the tmp105.h file into the include directory where it
should be.
Cc: Cédric Le Goater
Cc: Peter Maydell
Cc: Andrew Jeffery
Cc: Joel Stanley
Cc: Andrzej Zaborowski
Cc: qemu-...@nongnu.org
From: Corey Minyard
It's an adc, put it where it belongs.
Cc: Andrzej Zaborowski
Cc: Peter Maydell
Cc: qemu-...@nongnu.org
Signed-off-by: Corey Minyard
---
MAINTAINERS| 4 ++--
hw/adc/Kconfig | 3 +++
hw/{misc => adc}/max111x.c | 2 +-
From: Corey Minyard
It's an ADC, put it where it belongs.
Cc: Edgar E. Iglesias
Cc: Alistair Francis
Cc: Peter Maydell
Cc: qemu-...@nongnu.org
Signed-off-by: Corey Minyard
---
MAINTAINERS | 6 --
hw/adc/meson.build | 1 +
hw/{misc =>
hw/misc has collected a few things that could be moved elsewhere.
Move two ADC devices into the adc directory.
Create a sensor directory and move the sensors into it. There's only a
few for now, but the people driving the BMC work are going to be adding
many more, and it would really clutter up
This is an automated cleanup. This bug report has been moved to QEMU's
new bug tracker on gitlab.com and thus gets marked as 'expired' now.
Please continue with the discussion here:
https://gitlab.com/qemu-project/qemu/-/issues/343
** Changed in: qemu
Status: Confirmed => Expired
**
This is an automated cleanup. This bug report has been moved to QEMU's
new bug tracker on gitlab.com and thus gets marked as 'expired' now.
Please continue with the discussion here:
https://gitlab.com/qemu-project/qemu/-/issues/342
** Changed in: qemu
Status: New => Expired
** Changed
This is an automated cleanup. This bug report has been moved to QEMU's
new bug tracker on gitlab.com and thus gets marked as 'expired' now.
Please continue with the discussion here:
https://gitlab.com/qemu-project/qemu/-/issues/341
** Changed in: qemu
Status: Confirmed => Expired
**
On Tue, 18 May 2021 at 19:41, Patrick Venture wrote:
>
> Enables the pca954x muxes in the bmc board configuration.
>
> Signed-off-by: Patrick Venture
> Reviewed-by: Hao Wu
Not sure about this one, there's no device tree for it in Linux.
> ---
> hw/arm/aspeed.c | 22 +++---
>
On Tue, 18 May 2021 at 19:41, Patrick Venture wrote:
>
> Adds the pca954x muxes expected.
>
> Tested: Booted quanta-q71l image to userspace.
> Signed-off-by: Patrick Venture
> Reviewed-by: Hao Wu
Reviewed-by: Joel Stanley
On Tue, 18 May 2021 at 19:41, Patrick Venture wrote:
>
> Tested: Quanta-gsj firmware booted.
>
> i2c /dev entries driver
> I2C init bus 1 freq 10
> I2C init bus 2 freq 10
> I2C init bus 3 freq 10
> I2C init bus 4 freq 10
> I2C init bus 8 freq 10
> I2C init bus 9 freq 10
>
On Tue, 18 May 2021 at 19:41, Patrick Venture wrote:
>
> Adds comments to the board init to identify missing i2c devices.
>
> Signed-off-by: Patrick Venture
> Reviewed-by: Hao Wu
Reviewed-by: Joel Stanley
On Tue, 18 May 2021, Philippe Mathieu-Daudé wrote:
IDE bus depends on ISA bus for IRQ/DMA.
Add an ISABus reference in PCIIDEState, and add link properties
to it in the PIIX and VIA objects (which inherit PCI_IDE).
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/ide/pci.h | 1 +
Change fLSBNEW/fLSBNEW0/fLSBNEW1 from copy to "x & 1"
Remove gen_logical_not function
Clean up fLSBNEWNOT to use andi-1 followed by xori-1
Test cases added to tests/tcg/hexagon/misc.c
Signed-off-by: Taylor Simpson
---
target/hexagon/macros.h| 27 ++-
Fixes for bugs found by inspection and internal testing
Tests added to tests/tcg/hexagon/misc.c
Taylor Simpson (2):
Hexagon (target/hexagon) fix bug in fLSBNEW*
Hexagon (target/hexagon) fix l2fetch instructions
target/hexagon/gen_tcg.h | 11
target/hexagon/macros.h
Y4_l2fetch == l2fetch(Rs32, Rt32)
Y5_l2fetch == l2fetch(Rs32, Rtt32)
The semantics for these instructions are present, but the encodings
are missing.
Note that these are treated as nops in qemu, so we add overrides.
Test case added to tests/tcg/hexagon/misc.c
Signed-off-by: Taylor Simpson
---
Change fLSBNEW/fLSBNEW0/fLSBNEW1 from copy to "x & 1"
Remove gen_logical_not function
Clean up fLSBNEWNOT to use andi-1 followed by xori-1
Test cases added to tests/tcg/hexagon/misc.c
Signed-off-by: Taylor Simpson
---
target/hexagon/macros.h| 27 ++-
Y4_l2fetch == l2fetch(Rs32, Rt32)
Y5_l2fetch == l2fetch(Rs32, Rtt32)
The semantics for these instructions are present, but the encodings
are missing.
Note that these are treated as nops in qemu, so we add overrides.
Test case added to tests/tcg/hexagon/misc.c
Signed-off-by: Taylor Simpson
---
In the previous commit we removed all call to these functions
passing a NULL ISADevice argument. We can simplify and remove
the use of the global isabus object.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/isa/isa-bus.c | 23 +--
1 file changed, 17 insertions(+), 6
Previous commit removed the calls to isa_get_irq() passing a NULL
ISADevice. Simplify the assertion, removing the use on the global
isabus object.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/isa/isa-bus.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/hw/isa/isa-bus.c
isa_register_portio_list() takes an ISADevice argument mostly
to resolve the ISA bus. Extract the bus logic to a new function:
isa_bus_register_portio_list().
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/isa/isa.h | 4
hw/isa/isa-bus.c | 17 +
2 files changed,
Set the ISA Bus link property on the VIA IDE object from the
two unique users, the Fuloong and Pegasos machines.
Add a check in via_ide_realize() to be sure this property is set.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/ide/via.c| 5 +
hw/mips/fuloong2e.c | 4
Both callers to ide_init_ioport() have access to the ISA bus of the
device, so can pass it directly. This allows ide_init_ioport() to
directly call isa_bus_register_portio_list().
Note, now the callers become the owner of the PortioList.
Signed-off-by: Philippe Mathieu-Daudé
---
To make explicit the isabus singleton isn't used anywhere else,
move it's static declaration locally to isa_bus_new() and rename
it as 'g_isabus'.
Unfortunately we provide the get_system_io() call which expose
an unique I/O bus to a machine, and the ISA bus rely on this I/O
bus, so we can not
To be able to set a property on the ISA-IDE bridges objects
before they are realized, explode the pci_create_simple()
calls as pci_new() + pci_realize_and_unref().
Signed-off-by: Philippe Mathieu-Daudé
---
hw/i386/pc_piix.c | 5 +++--
hw/isa/piix4.c | 3 ++-
hw/mips/fuloong2e.c | 3 ++-
IDE bus depends on ISA bus for IRQ/DMA.
Add an ISABus reference in PCIIDEState, and add link properties
to it in the PIIX and VIA objects (which inherit PCI_IDE).
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/ide/pci.h | 1 +
hw/ide/piix.c| 11 ++-
hw/ide/via.c
Both PIIX/VIA objects inherit PCI_IDE, thus have a pointer to an
ISA bus. Pass this bus argument to isa_bus_get_irq() instead of
calling isa_get_irq() with a NULL device.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/ide/piix.c | 2 +-
hw/ide/via.c | 3 ++-
2 files changed, 3 insertions(+), 2
isa_get_irq() takes an ISADevice argument mostly to resolve
the ISA bus. Extract the bus logic to isa_bus_get_irq().
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/isa/isa.h | 1 +
hw/isa/isa-bus.c | 9 +++--
2 files changed, 8 insertions(+), 2 deletions(-)
diff --git
Set the ISA Bus link property on the PIIX IDE object from the
two unique users, the PC machine and the PIIX4 function.
Add a check in pci_piix_ide_realize() to be sure this property
is set.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/i386/pc_piix.c | 2 ++
hw/ide/piix.c | 5 +
Hi,
This series implements the suggestions from Markus analysis:
https://www.mail-archive.com/qemu-block@nongnu.org/msg84090.html
on the ISA bus.
There is still work to do (remove global get_system_io?) but
this is enough to convert a crash to an error message, and
the changes are simple, so
That would be great.
On Tue, 18 May 2021, 16:59 Corey Minyard, wrote:
>
> On Tue, May 18, 2021 at 03:50:57PM -0400, Titus Rwantare wrote:
> > I would also like a directory for sensors. There are quite a few of
> > those incoming. Any objections?
>
> None from me. I'll add a patch to move all
We need to skip bytes in two cases.
a. Before we start reading into in_sg, we need to skip iov_len bytes
in the beginning which typically will have fuse_out_header.
b. If preadv() does a short read, then we need to retry preadv() with
remainig bytes and skip the bytes preadv() read in
pvreadv() can return following.
- error
- 0 in case of EOF
- short read
We seem to handle all the cases already. We are retrying read in case
of short read. So another check for short read seems like dead code.
Get rid of it.
Reviewed-by: Dr. David Alan Gilbert
Reviewed-by: Connor Kuehl
We don't seem to check for EINTR and retry. There are other places
in code where we check for EINTR. So lets add a check.
Reviewed-by: Dr. David Alan Gilbert
Reviewed-by: Connor Kuehl
Signed-off-by: Vivek Goyal
---
tools/virtiofsd/fuse_virtio.c | 3 +++
1 file changed, 3 insertions(+)
diff
There is no reason to set it in label "err". We should be able to set
it right after sending reply. It is easier to read.
Also got rid of label "err" because now only thing it was doing was
return a code. We can return from the error location itself and no
need to first jump to label "err".
Hi,
This is V2 of the patches. Changes since V1 are.
- Took care of coding style issue.
- Got rid of label "err" completely in last patch. (Dave, Connor).
- Captured Reviewed-by tags from Connor and David.
Code in virtio_send_data_iov() little twisted and complicated. This
patch series just
In virtio_send_data_iov() we are checking first for short read and then
EOF condition. Change the order. Basically check for error and EOF first
and last remaining piece is short ready which will lead to retry
automatically at the end of while loop.
Just that it is little simpler to read to the
in_sg_left seems to be being used primarly for debugging purpose. It is
keeping track of how many bytes are left in the scatter list we are
reading into.
We already have another variable "len" which keeps track how many bytes
are left to be read. And in_sg_left is greater than or equal to len. We
There are places where we need to skip few bytes from front of the iovec
array. We have our own custom code for that. Looks like iov_discard_front()
can do same thing. So use that helper instead.
Reviewed-by: Dr. David Alan Gilbert
Reviewed-by: Connor Kuehl
Signed-off-by: Vivek Goyal
---
When processing a command to select a target and send a CDB, the ESP device
maintains a sequence step register so that if an error occurs the host can
determine which part of the selection/CDB submission sequence failed.
The old Linux 2.6 driver is really pedantic here: it checks the sequence
Following on from the ESP changes in QEMU 6.0 someone pointed out that the old
Linux 2.6 ESP driver as used in Aurelian's SPARC image at
https://people.debian.org/~aurel32/qemu/sparc/ emits a constant stream of
"esp0: STEP_ASEL for tgt 0" messages to the console during boot.
These patches solve
The datasheet sequence tables confirm that when a target selection fails, only
the INTR_DC interrupt flag should be asserted.
Signed-off-by: Mark Cave-Ayland
Fixes: cf47a41e05 ("esp: latch individual bits in ESP_RINTR register")
---
hw/scsi/esp.c | 2 +-
1 file changed, 1 insertion(+), 1
From: Nolan Leake
This is just enough to make reboot and poweroff work. Notably, the
watchdog timer functionality is not yet implemented.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/64
Signed-off-by: Nolan Leake
---
hw/arm/bcm2835_peripherals.c | 13 ++-
On 4/28/21 5:32 AM, Thomas Huth wrote:
On 28/04/2021 11.24, Stefan Hajnoczi wrote:
On Fri, Apr 16, 2021 at 02:52:56PM +0200, Thomas Huth wrote:
@@ -158,7 +166,11 @@ static void pci_piix_ide_realize(PCIDevice *dev,
Error **errp)
vmstate_register(VMSTATE_IF(dev), 0, _ide_pci, d);
-
On Tue, May 18, 2021 at 03:50:57PM -0400, Titus Rwantare wrote:
> I would also like a directory for sensors. There are quite a few of
> those incoming. Any objections?
None from me. I'll add a patch to move all the sensors from misc into
it, if you like.
-corey
>
> -Titus
>
> On Tue, 18 May
On Tue, 18 May 2021 at 06:33, Laurent Vivier wrote:
>
> The following changes since commit 6d34aa9969ff85ca6eaeb4dc1988a4d4e13e7d79:
>
> Merge remote-tracking branch 'remotes/marcandre/tags/rtd-pull-request' into
> staging (2021-05-14 17:20:08 +0100)
>
> are available in the Git repository at:
This function is used by TCGCPUOps, and is thus TCG specific.
Signed-off-by: Richard Henderson
---
target/ppc/mmu_helper.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/target/ppc/mmu_helper.c b/target/ppc/mmu_helper.c
index 2535ea1836..78e6f7496b 100644
--- a/target/ppc/mmu_helper.c
Create one common dispatch for all of the ppc_*_xlate functions.
Use ppc64_v3_radix to directly dispatch between ppc_radix64_xlate
and ppc_hash64_xlate.
Remove the separate *_handle_mmu_fault and *_get_phys_page_debug
functions, using common code for ppc_cpu_tlb_fill and
Mirror the interface of ppc_radix64_xlate (mostly), putting all
of the logic for older mmu translation into a single entry point.
For booke, we need to add mmu_idx to the xlate-style interface.
Signed-off-by: Richard Henderson
---
target/ppc/mmu_helper.c | 181
Mirror the interface of ppc_radix64_xlate, putting all of
the logic for hash64 translation into a single function.
Signed-off-by: Richard Henderson
---
target/ppc/mmu-hash64.c | 125 +++-
1 file changed, 59 insertions(+), 66 deletions(-)
diff --git
On Tue, 18 May 2021 at 19:38, Philippe Mathieu-Daudé wrote:
>
> When the pointer alignment is known to be safe, we can
> directly swap the data in place, without having to rely
> on the compiler builtin code.
>
> Load/store methods expecting aligned pointer use the 'a'
> infix. For example to
Mirror the interface of ppc_radix64_xlate, putting all of
the logic for hash32 translation into a single entry point.
Signed-off-by: Richard Henderson
---
target/ppc/mmu-hash32.c | 224
1 file changed, 113 insertions(+), 111 deletions(-)
diff --git
On 5/18/2021 3:23 PM, Dr. David Alan Gilbert wrote:
> * Steven Sistare (steven.sist...@oracle.com) wrote:
>> On 5/18/2021 5:57 AM, Dr. David Alan Gilbert wrote:
>>> * Steven Sistare (steven.sist...@oracle.com) wrote:
On 5/14/2021 7:53 AM, Stefan Hajnoczi wrote:
> On Thu, May 13, 2021 at
Instead of returning non-zero for failure, return true for success.
Signed-off-by: Richard Henderson
---
target/ppc/mmu-radix64.c | 30 +++---
1 file changed, 15 insertions(+), 15 deletions(-)
diff --git a/target/ppc/mmu-radix64.c b/target/ppc/mmu-radix64.c
index
This removes some incomplete duplication between
ppc_radix64_handle_mmu_fault and ppc_radix64_get_phys_page_debug.
The former was correct wrt SPR_HRMOR and the latter was not.
Signed-off-by: Richard Henderson
---
target/ppc/mmu-radix64.c | 77 ++--
1 file
Instead, use a switch on env->mmu_model. This avoids some
replicated information in cpu setup.
Signed-off-by: Richard Henderson
---
target/ppc/cpu-qom.h| 1 -
target/ppc/cpu_init.c | 45 -
target/ppc/mmu_helper.c | 24 ++
3
It is no longer used.
Signed-off-by: Richard Henderson
---
target/ppc/mmu_helper.c | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/target/ppc/mmu_helper.c b/target/ppc/mmu_helper.c
index 83e7e0dd13..bf0fcca9be 100644
--- a/target/ppc/mmu_helper.c
+++
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