Signed-off-by: Paolo Bonzini
---
tests/unit/test-coroutine.c | 35 ---
1 file changed, 28 insertions(+), 7 deletions(-)
diff --git a/tests/unit/test-coroutine.c b/tests/unit/test-coroutine.c
index 0fe9226b86..642ef36bc3 100644
--- a/tests/unit/test-coroutine.c
Signed-off-by: Paolo Bonzini
---
tests/unit/test-coroutine.c | 44 -
1 file changed, 39 insertions(+), 5 deletions(-)
diff --git a/tests/unit/test-coroutine.c b/tests/unit/test-coroutine.c
index 3d898d50c6..439bd269c9 100644
--- a/tests/unit/test-coroutine.c
Signed-off-by: Paolo Bonzini
---
tests/unit/test-coroutine.c | 23 +++
1 file changed, 19 insertions(+), 4 deletions(-)
diff --git a/tests/unit/test-coroutine.c b/tests/unit/test-coroutine.c
index 75d54e5d29..0b7b4d6ef8 100644
--- a/tests/unit/test-coroutine.c
+++
From: Philippe Mathieu-Daudé
Commit e0220bb5b2 made cpus.c target-agnostic but didn't notice
the cpu_list() function is only defined in target-specific code
in "cpu.h". Extract list_cpus() from the generic cpus.c into a
new target-specific unit.
Fixes: e0220bb5b2 ("softmmu: Build
Signed-off-by: Paolo Bonzini
---
tests/unit/test-coroutine.c | 30 ++
1 file changed, 22 insertions(+), 8 deletions(-)
diff --git a/tests/unit/test-coroutine.c b/tests/unit/test-coroutine.c
index c701113d77..bc75050463 100644
--- a/tests/unit/test-coroutine.c
+++
Signed-off-by: Paolo Bonzini
---
tests/unit/test-coroutine.c | 7 +++
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/tests/unit/test-coroutine.c b/tests/unit/test-coroutine.c
index bc75050463..6ad653adda 100644
--- a/tests/unit/test-coroutine.c
+++
Signed-off-by: Paolo Bonzini
---
tests/unit/test-coroutine.c | 23 ++-
1 file changed, 18 insertions(+), 5 deletions(-)
diff --git a/tests/unit/test-coroutine.c b/tests/unit/test-coroutine.c
index 6ad653adda..3d898d50c6 100644
--- a/tests/unit/test-coroutine.c
+++
Signed-off-by: Paolo Bonzini
---
tests/unit/test-coroutine.c | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/tests/unit/test-coroutine.c b/tests/unit/test-coroutine.c
index 7aaadfd31a..c701113d77 100644
--- a/tests/unit/test-coroutine.c
+++
Build the frame for qemu_co_mutex_lock_slowpath, because it has code
that runs after qemu_coroutine_yield(). For qemu_co_mutex_lock() and
qemu_co_mutex_unlock(), just return COROUTINE_CONTINUE on paths that do
not go through an awaitable function, which is all of them in the case
of
Hi
On Thu, Mar 10, 2022 at 3:35 PM Daniel P. Berrangé
wrote:
> On Thu, Mar 10, 2022 at 03:11:08PM +0400, Marc-André Lureau wrote:
> > Hi
> >
> > On Thu, Mar 10, 2022 at 2:56 PM Daniel P. Berrangé
> > wrote:
> >
> > > On Mon, Mar 07, 2022 at 11:09:37AM +0100, Thomas Huth wrote:
> > > > On
Signed-off-by: Paolo Bonzini
---
tests/unit/test-coroutine.c | 27 +++
1 file changed, 23 insertions(+), 4 deletions(-)
diff --git a/tests/unit/test-coroutine.c b/tests/unit/test-coroutine.c
index 3670750c5b..ae06e97c95 100644
--- a/tests/unit/test-coroutine.c
+++
Make qemu_co_mutex_lock_slowpath a tail call, so that qemu_co_mutex_lock
does not need to build a stack frame of its own.
Signed-off-by: Paolo Bonzini
---
util/qemu-coroutine-lock.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/util/qemu-coroutine-lock.c
On 10/03/2022 12.35, Richard Henderson wrote:
On 3/10/22 02:21, Thomas Huth wrote:
On 10/03/2022 09.36, Thomas Huth wrote:
[...]
However, the error still persists. I now had a closer look by running the
test with "qemu-s390x" on my z15 machine directly, and all tests are
failing! The problem
+Stefan for overall project resources.
On 10/3/22 12:07, Daniel P. Berrangé wrote:
On Thu, Mar 10, 2022 at 12:00:35PM +0100, Christian Schoenebeck wrote:
On Mittwoch, 9. März 2022 12:44:16 CET Daniel P. Berrangé wrote:
On Wed, Mar 09, 2022 at 11:40:42AM +0100, Christian Schoenebeck wrote:
On
The main change is to qemu_co_sleep_ns_wakeable, which gets the full
conversion treatment. It's important to note that variables that escape
(have their address taken), such as "QEMUTimer ts" in this case, move
entirely to the frame structure and do not have local variables anymore.
For the
On 10/03/2022 12.10, Max Filippov wrote:
Hello,
I've noticed that the command
qemu-system-xtensa -cpu help
no longer prints anything. Apparently because cpu_list is no longer defined
in list_cpus inside softmmu/cpus.c
Bisection points to the following commit:
e0220bb5b200 ("softmmu: Build
Because conversion to stackless coroutines is incredibly repetitive,
define some magic variable-argument macros that simplify the task:
- CO_DECLARE_FRAME() declares a frame structure, with a couple common fields
and the extras coming from variable arguments
- CO_INIT_FRAME() allocates the
For PIT, it's straightforward to merge microvm::pit and
pc_machine::pit_enabled into x86ms::pit
For PIC, move microvm::pic to x86ms:pic, which gives PC machine the
ability to dis-/en-able PIC and it's the preparation for future TDX
support.
---
Resend:
- collect Reviewed-by;
- rebase to
On 3/10/22 02:21, Thomas Huth wrote:
On 10/03/2022 09.36, Thomas Huth wrote:
On 09/03/2022 12.22, Alex Bennée wrote:
With -cpu max we get a warning:
qemu-s390x: warning: 'msa5-base' requires 'kimd-sha-512'.
But dropping the -cpu max and it still runs fine.
Signed-off-by: Alex Bennée
Cc:
Some functions only make sense from coroutine context, but never yield.
Mark them as "coroutine_only_fn".
Signed-off-by: Paolo Bonzini
---
include/qemu/coroutine.h | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/include/qemu/coroutine.h b/include/qemu/coroutine.h
index
On Thu, 10 Mar 2022 at 11:27, Richard Henderson
wrote:
>
> Use FIELD_DP32 instead of manual shifting and masking.
>
> Signed-off-by: Richard Henderson
> ---
> target/nios2/cpu.h| 4
> target/nios2/helper.c | 37 ++---
> 2 files changed, 26
In preparation for splitting "from coroutine" ("awaitable" in other
languages) and "not from coroutine" functions, remove the CoMutex case
from QemuLockable---thus making qemu_lockable_lock and qemu_lockable_unlock
"not awaitable".
To satisfy the qemu_co_queue_wait use case, introduce
The upper 16 bits of kvm_userspace_memory_region::slot are
address space id. Parse it separately in trace_kvm_set_user_memory().
Signed-off-by: Xiaoyao Li
---
Resend:
- rebase to 2048c4eba2b4 ("Merge remote-tracking branch
'remotes/philmd/tags/pmbus-20220308' into staging")
---
We want to move data from the heap into Nios2MachineState,
which is not possible with DEFINE_MACHINE.
Signed-off-by: Richard Henderson
---
hw/nios2/10m50_devboard.c | 24 ++--
1 file changed, 22 insertions(+), 2 deletions(-)
diff --git a/hw/nios2/10m50_devboard.c
On Thu, Mar 10, 2022 at 03:50:58PM +0400, Marc-André Lureau wrote:
> Hi
>
> On Thu, Mar 10, 2022 at 3:35 PM Daniel P. Berrangé
> wrote:
>
> > On Thu, Mar 10, 2022 at 03:11:08PM +0400, Marc-André Lureau wrote:
> > > Hi
> > >
> > > On Thu, Mar 10, 2022 at 2:56 PM Daniel P. Berrangé
> > > wrote:
When CRS = 0, we restore from estatus; otherwise from sstatus.
Update for the new CRS.
Signed-off-by: Richard Henderson
---
target/nios2/cpu.h | 1 +
target/nios2/op_helper.c | 3 ++-
target/nios2/translate.c | 13 -
3 files changed, 11 insertions(+), 6 deletions(-)
diff
Hi
On Thu, Mar 10, 2022 at 3:35 PM Daniel P. Berrangé
wrote:
>
> Removing either 'assert' or g_assert would be a massive amount of code
> churn, for no real functional benefit.
>
>
Well, a few thousands of lines that are trivially regexp. And we can make
use of git blame ignore-rev
Do not actually enable them so far, but add all of the
plumbing to address them. Do not enable them for user-only.
Add an env->regs pointer that handles the indirection to
the current register set. The naming of the pointer hides
the difference between old and new, user-only and sysemu.
>From
Legacy PIC (8259) cannot be supported for TDX guests since TDX module
doesn't allow directly interrupt injection. Using posted interrupts
for the PIC is not a viable option as the guest BIOS/kernel will not
do EOI for PIC IRQs, i.e. will leave the vIRR bit set.
Make PIC the property of common
Implement these out of line, so that tcg global temps
(aka the architectural registers) are synced back to
tcg storage as required. This makes sure that we get
the proper results when status.PRS == status.CRS.
Signed-off-by: Richard Henderson
---
target/nios2/cpu.h | 1 +
Both pc and microvm have pit property individually. Let's just make it
the property of common x86 base machine type.
Signed-off-by: Xiaoyao Li
Reviewed-by: Sergio Lopez
---
hw/i386/microvm.c | 27 +--
hw/i386/pc.c | 24 +++-
We missed out on a couple of exception types that may
legitimately be raised by a userland program.
Signed-off-by: Richard Henderson
---
linux-user/nios2/cpu_loop.c | 8
1 file changed, 8 insertions(+)
diff --git a/linux-user/nios2/cpu_loop.c b/linux-user/nios2/cpu_loop.c
index
Use lookup_and_goto_ptr for indirect chaining between TBs.
Signed-off-by: Richard Henderson
---
target/nios2/translate.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/target/nios2/translate.c b/target/nios2/translate.c
index 6f31b6cc50..f7bab0908b 100644
---
Rather than force all callers to set this, do it
within the subroutine.
Signed-off-by: Richard Henderson
---
target/nios2/translate.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/target/nios2/translate.c b/target/nios2/translate.c
index f61ba92052..51907586ab 100644
Indirect branches, plus eret and bret optionally raise
an exception when branching to a misaligned address.
The exception is required when an mmu is enabled, but
enable it always because the fallback behaviour is not
documented (though presumably it discards low bits).
For the purposes of the
This interrupt bit is never set, so testing it in
nios2_cpu_has_work is pointless.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/nios2/cpu.h | 2 --
target/nios2/cpu.c | 2 +-
2 files changed, 1 insertion(+), 3 deletions(-)
diff --git a/target/nios2/cpu.h
On Tue, 8 Mar 2022 at 11:38, Paolo Bonzini wrote:
>
> The following changes since commit 99c53410bc9d50e556f565b0960673cccb566452:
>
> Merge remote-tracking branch
> 'remotes/thuth-gitlab/tags/pull-request-2022-02-28' into staging (2022-03-01
> 13:25:54 +)
>
> are available in the Git
On Thu, 10 Mar 2022 at 11:27, Richard Henderson
wrote:
>
> We had failed to copy BSTATUS back to STATUS, and diagnose
> supervisor-only. The spec is light on the specifics of the
> implementation of bret, but it is an easy assumption that
> the restore into STATUS should work the same as eret.
>
Split out a function to perform an indirect branch.
Signed-off-by: Richard Henderson
---
target/nios2/translate.c | 27 +--
1 file changed, 13 insertions(+), 14 deletions(-)
diff --git a/target/nios2/translate.c b/target/nios2/translate.c
index d5f2e98de9..f61ba92052
The 4 lower bits, D, PERM, BAD, DBL, are unconditionally set on any
exception with EH=0, or so says Table 42 (Processor Status After
Taking Exception).
We currently do not set PERM or BAD at all, and only set/clear
DBL for tlb miss, and do not clear DBL for any other exception.
It is a bit
On 10/03/2022 12.35, Daniel P. Berrangé wrote:
On Thu, Mar 10, 2022 at 03:11:08PM +0400, Marc-André Lureau wrote:
Hi
On Thu, Mar 10, 2022 at 2:56 PM Daniel P. Berrangé
wrote:
On Mon, Mar 07, 2022 at 11:09:37AM +0100, Thomas Huth wrote:
On 07/03/2022 11.06, Daniel P. Berrangé wrote:
On
Thomas Huth writes:
> On 10/03/2022 11.34, Alex Bennée wrote:
>> Thomas Huth writes:
>>
>>> On 09/03/2022 12.22, Alex Bennée wrote:
With -cpu max we get a warning:
qemu-s390x: warning: 'msa5-base' requires 'kimd-sha-512'.
But dropping the -cpu max and it still runs fine.
The register is entirely read-only for software, and we do not
implement ECC, so we need not deposit the cause into an existing
value; just create a new value from scratch.
Furthermore, exception.CAUSE is not written for break exceptions.
Signed-off-by: Richard Henderson
---
Division may (optionally) raise a division exception.
Since the linux kernel has been prepared for this for
some time, enable it by default.
Signed-off-by: Richard Henderson
---
target/nios2/cpu.h | 2 ++
target/nios2/helper.h | 2 ++
linux-user/nios2/cpu_loop.c | 4 +++
Without EIC, this bit is RES1. So set the bit at reset,
and add it to the readonly fields of CR_STATUS.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/nios2/cpu.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/target/nios2/cpu.c
From: Amir Gonnen
Demonstrate how to use nios2 VIC on a machine.
Introduce a new machine property to attach a VIC.
When VIC is present, let the CPU know that it should use the
External Interrupt Interface instead of the Internal Interrupt Interface.
The devices on the machine are attached to
These misaligned data and misaligned destination exceptions
are defined, but not currently raised.
Signed-off-by: Richard Henderson
---
target/nios2/helper.c | 8
1 file changed, 8 insertions(+)
diff --git a/target/nios2/helper.c b/target/nios2/helper.c
index 285f3aae1d..0392c0ea84
Use FIELD_EX32 and FIELD_DP32 instead of managing the
masking by hand.
Signed-off-by: Richard Henderson
---
target/nios2/cpu.h | 29 +++--
target/nios2/helper.c| 7 ++-
target/nios2/mmu.c | 35 +--
Create an array of masks which detail the writable and readonly
bits for each control register. Apply them when writing to
control registers, including the write to status during eret.
Signed-off-by: Richard Henderson
---
target/nios2/cpu.h | 13 ++
target/nios2/cpu.c | 94
Depending on the reason for ending the TB, we can chain
to the next TB because the PC is constant.
Signed-off-by: Richard Henderson
---
target/nios2/translate.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/target/nios2/translate.c b/target/nios2/translate.c
index
Unaligned traps are optional, but required with an mmu.
Turn them on always, because the fallback behaviour is not
documented (though presumably it discards low bits).
Enable alignment checks in the config file.
Unwind the guest pc properly from do_unaligned_access.
Signed-off-by: Richard
Place the control registers into their own array, env->ctrl[].
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/nios2/cpu.h | 43
target/nios2/cpu.c | 19 +++
target/nios2/helper.c| 106 +++
Copy the existing cpu_index into the space reserved for CR_CPUID.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/nios2/cpu.c | 4
1 file changed, 4 insertions(+)
diff --git a/target/nios2/cpu.c b/target/nios2/cpu.c
index ce2b0c6493..d491360973 100644
---
This function is unused. The real computation of this value
is located in nios2_cpu_exec_interrupt.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/nios2/cpu.h | 5 -
1 file changed, 5 deletions(-)
diff --git a/target/nios2/cpu.h b/target/nios2/cpu.h
index
Performing this early means that we can merge more cases
within the non-logging switch statement.
Signed-off-by: Richard Henderson
---
target/nios2/helper.c | 58 +++
1 file changed, 47 insertions(+), 11 deletions(-)
diff --git a/target/nios2/helper.c
Constrain all references to cpu_R[] to load_gpr and dest_gpr.
This will be required for supporting shadow register sets.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/nios2/translate.c | 153 ++-
1 file changed, 55 insertions(+), 98
It is cleaner to have a separate name for this variable.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/nios2/cpu.h | 10 +++-
linux-user/elfload.c| 2 +-
linux-user/nios2/cpu_loop.c | 17 ++---
linux-user/nios2/signal.c | 6 ++---
Split out do_exception and do_iic_irq to handle bulk of the interrupt and
exception processing. Parameterize the changes required to cpu state.
The status.EH bit, which protects some data against double-faults,
is only present with the MMU. Several exception cases did not check
for status.EH
Decode 'break 1' during translation, rather than doing
it again during exception processing.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/nios2/cpu.h | 1 +
target/nios2/helper.c| 14 ++
target/nios2/translate.c | 17 -
3 files
On Thu, Mar 10, 2022 at 03:11:08PM +0400, Marc-André Lureau wrote:
> Hi
>
> On Thu, Mar 10, 2022 at 2:56 PM Daniel P. Berrangé
> wrote:
>
> > On Mon, Mar 07, 2022 at 11:09:37AM +0100, Thomas Huth wrote:
> > > On 07/03/2022 11.06, Daniel P. Berrangé wrote:
> > > > On Mon, Mar 07, 2022 at
WE is the architectural name of the field, not WR.
Signed-off-by: Richard Henderson
---
target/nios2/cpu.h| 2 +-
target/nios2/helper.c | 4 ++--
target/nios2/mmu.c| 4 ++--
3 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/target/nios2/cpu.h b/target/nios2/cpu.h
index
These symbols become available to the debugger.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/nios2/cpu.h | 72 ++
1 file changed, 35 insertions(+), 37 deletions(-)
diff --git a/target/nios2/cpu.h b/target/nios2/cpu.h
index
Whether the cpu is in user-mode or not is something that we
know at translation-time. We do not need to generate code
after having raised an exception.
Suggested-by: Peter Maydell
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/nios2/translate.c | 20
Convert to contiguous allocation, as much as possible so far.
The two timer objects are not exposed for subobject allocation.
Reviewed-by: Mark Cave-Ayland
Signed-off-by: Richard Henderson
---
hw/nios2/10m50_devboard.c | 30 --
1 file changed, 16 insertions(+), 14
Use FIELD_EX32 and FIELD_DP32 instead of manual manipulation
of the fields.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/nios2/cpu.h | 8
target/nios2/helper.c| 4 ++--
target/nios2/mmu.c | 17 +
target/nios2/translate.c | 2
Retain the helper macros for single bit fields as aliases to
the longer R_*_MASK names. Use FIELD_EX32 and FIELD_DP32
instead of manually manipulating the fields.
Since we're rewriting the references to CR_TLBACC_IGN_* anyway,
we correct the name of this field to IG, which is its name in
the
From: Amir Gonnen
Implement nios2 Vectored Interrupt Controller (VIC).
VIC is connected to EIC. It needs to update rha, ril, rrs and rnmi
fields on Nios2CPU before raising an IRQ.
For that purpose, VIC has a "cpu" property which should refer to the
nios2 cpu and set by the board that connects
This has grown quite beyond merely implementing $SUBJECT,
which are only the last 8 patches of the set.
Version 5 addresses all of the feedback from v4, fixes some
further bugs in the base exception handling, implements
some missing exceptions.
r~
Amir Gonnen (5):
target/nios2: Check
Add all fields; retain the helper macros for single bit fields.
So far there are no uses of the multi-bit status fields.
Signed-off-by: Richard Henderson
---
target/nios2/cpu.h | 28 +++-
1 file changed, 19 insertions(+), 9 deletions(-)
diff --git a/target/nios2/cpu.h
Use FIELD_DP32 instead of manual shifting and masking.
Signed-off-by: Richard Henderson
---
target/nios2/cpu.h| 4
target/nios2/helper.c | 37 ++---
2 files changed, 26 insertions(+), 15 deletions(-)
diff --git a/target/nios2/cpu.h b/target/nios2/cpu.h
On 10/3/22 10:18, Peter Maydell wrote:
On Tue, 8 Mar 2022 at 18:22, Philippe Mathieu-Daudé
wrote:
From: Philippe Mathieu-Daudé
The following changes since commit 9740b907a5363c06ecf61e08b21966a81eb0dab4:
Merge remote-tracking branch
'remotes/pmaydell/tags/pull-target-arm-20220307' into
This is the cpu side of the operation. Register one irq line,
called EIC. Split out the rather different processing to a
separate function.
Delay initialization of gpio irqs until realize. We need to
provide a window after init in which the board can set eic_present.
Signed-off-by: Richard
Do not print control registers for user-only mode.
Rename reserved control registers to "resN", where
N is the control register index.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/nios2/translate.c | 19 +--
1 file changed, 9 insertions(+), 10
Let's add a few bits of code which hide the new KVM PV dump API from
us via new functions.
Signed-off-by: Janosch Frank
---
hw/s390x/pv.c | 52 +++
include/hw/s390x/pv.h | 8 +++
2 files changed, 60 insertions(+)
diff --git a/hw/s390x/pv.c
From: Amir Gonnen
Split NUM_CORE_REGS into components that can be used elsewhere.
Reviewed-by: Peter Maydell
Signed-off-by: Amir Gonnen
Message-Id: <20220303153906.2024748-3-amir.gon...@neuroblade.ai>
[rth: Split out of a larger patch for shadow register sets.]
Signed-off-by: Richard
There's nothing about EH that affects translation,
so there's no need to include it in tb->flags.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/nios2/cpu.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/nios2/cpu.h b/target/nios2/cpu.h
index
From: Amir Gonnen
eret instruction is only allowed in supervisor mode.
Reviewed-by: Peter Maydell
Reviewed-by: Richard Henderson
Signed-off-by: Amir Gonnen
Message-Id: <20220303153906.2024748-2-amir.gon...@neuroblade.ai>
Signed-off-by: Richard Henderson
---
target/nios2/translate.c | 2 ++
The bulk of the general register set is undefined on reset.
The zero register is for the most part special-cased in translate,
but the slot is still exposed to gdbstub and nios2_cpu_dump_state,
so continue to make sure that's zeroed.
Signed-off-by: Richard Henderson
---
target/nios2/cpu.c | 6
Introduce an interface over which we can get information about UV data.
Signed-off-by: Janosch Frank
---
hw/s390x/pv.c | 61 ++
hw/s390x/s390-virtio-ccw.c | 5
include/hw/s390x/pv.h | 10 +++
3 files changed, 76 insertions(+)
diff
Replace current uses of tcg_const_tl, and remove the frees.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/nios2/translate.c | 30 ++
1 file changed, 6 insertions(+), 24 deletions(-)
diff --git a/target/nios2/translate.c
Drop the set of estatus in init_thread; it was clearly intended
to be setting the value of CR_STATUS for the application, but we
never actually performed that copy. However, the proper value is
set in nios2_cpu_reset so we don't need to do anything here.
We only initialize SP and EA in
Sometimes dumping a guest from the outside is the only way to get the
data that is needed. This can be the case if a dumping mechanism like
KDUMP hasn't been configured or data needs to be fetched at a specific
point. Dumping a protected guest from the outside without help from
fw/hw doesn't yield
Signed-off-by: Janosch Frank
---
linux-headers/linux/kvm.h | 55 +++
1 file changed, 55 insertions(+)
diff --git a/linux-headers/linux/kvm.h b/linux-headers/linux/kvm.h
index 00af3bc333..ead1d51cb5 100644
--- a/linux-headers/linux/kvm.h
+++
We don't need to reference them often, and when we do it
is just as easy to load/store from cpu_env directly.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/nios2/translate.c | 33 ++---
1 file changed, 26 insertions(+), 7 deletions(-)
diff
Signed-off-by: Janosch Frank
---
target/s390x/kvm/kvm.c | 7 +++
target/s390x/kvm/kvm_s390x.h | 1 +
2 files changed, 8 insertions(+)
diff --git a/target/s390x/kvm/kvm.c b/target/s390x/kvm/kvm.c
index 6acf14d5ec..56ca5408db 100644
--- a/target/s390x/kvm/kvm.c
+++
We had failed to copy BSTATUS back to STATUS, and diagnose
supervisor-only. The spec is light on the specifics of the
implementation of bret, but it is an easy assumption that
the restore into STATUS should work the same as eret.
Therefore, reuse the existing helper_eret.
Reported-by: Peter
Time to add a bit more descriptiveness to the dumps.
Signed-off-by: Janosch Frank
---
dump/dump.c | 106 --
include/sysemu/dump.h | 1 +
2 files changed, 94 insertions(+), 13 deletions(-)
diff --git a/dump/dump.c b/dump/dump.c
index
From: Amir Gonnen
The implementation of eret will become much more complex
with the introduction of shadow registers.
Reviewed-by: Peter Maydell
Signed-off-by: Amir Gonnen
Message-Id: <20220303153906.2024748-3-amir.gon...@neuroblade.ai>
[rth: Split out of a larger patch for shadow register
On 09.03.22 23:02, Jason A. Donenfeld wrote:
Hi Alex,
On Wed, Mar 9, 2022 at 3:10 AM Alexander Graf wrote:
The vmgenid driver basically works, though it is racy, because that ACPI
notification can arrive after the system is already running again. This
I believe enough people already
This is the qemu part of the PV dump support where we take the data
that the KVM PV dump API gives us and put it into the ELF file for
later processing.
The encrypted PV cpu state is added as an additional note like the
other architecture registers.
The storage state and completion data however
Add hooks which architectures can use to add arbitrary data to custom
sections.
Signed-off-by: Janosch Frank
---
dump/dump.c| 21 ++---
include/sysemu/dump-arch.h | 27 +++
2 files changed, 45 insertions(+), 3 deletions(-)
diff --git
On 10/3/22 06:21, Joel Stanley wrote:
In order to correctly report secure boot running firmware, these values
must be set. They are taken from a running machine when secure boot is
enabled.
We don't yet have documentation from ASPEED on what they mean. Set the
raw values for now, and in the
Architectures already provide custom cpu data via elf notes but
there's currently no way for an architecture to add other custom data
to dumps.
s390x for instance needs to store special data in the dump when
dumping protected guests so the vm owner can decrypt the dump and
access the vm data.
Let's move to the new way of handling errors before changing the dump
code. This patch has mostly been generated by the coccinelle script
scripts/coccinelle/errp-guard.cocci.
Signed-off-by: Janosch Frank
---
dump/dump.c | 144 ++--
1 file changed,
Allocating the header lets us write it at a later time and hence also
allows us to change section and segment table offsets until we
finally write it.
Signed-off-by: Janosch Frank
---
dump/dump.c | 115 ++
include/sysemu/dump.h | 1 +
2 files
Let's move from a boolean to a int variable which will later enable us
to store the number of sections that are in the dump file.
Signed-off-by: Janosch Frank
---
dump/dump.c | 24
include/sysemu/dump.h | 2 +-
2 files changed, 13 insertions(+), 13
By splitting the writing of the section headers and (future) section
data we prepare for the addition of a string table section and
architecture sections.
Signed-off-by: Janosch Frank
---
dump/dump.c | 112 --
include/sysemu/dump.h | 4 ++
2
Hi
On Thu, Mar 10, 2022 at 2:56 PM Daniel P. Berrangé
wrote:
> On Mon, Mar 07, 2022 at 11:09:37AM +0100, Thomas Huth wrote:
> > On 07/03/2022 11.06, Daniel P. Berrangé wrote:
> > > On Mon, Mar 07, 2022 at 02:51:23PM +0800, Peter Xu wrote:
> > > > On Wed, Mar 02, 2022 at 05:49:18PM +, Daniel
Let's move ELF related members into one block and guest memory related
ones into another to improve readability.
Signed-off-by: Janosch Frank
---
include/sysemu/dump.h | 18 +++---
1 file changed, 11 insertions(+), 7 deletions(-)
diff --git a/include/sysemu/dump.h
There's no need to have two write functions. Let's rather have two
functions that set the data for elf 32/64 and then write it in a
common function.
Signed-off-by: Janosch Frank
---
dump/dump.c | 94 +++--
1 file changed, 48 insertions(+), 46
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