This adds GRAPH_RDLOCK annotations to declare that callers of
bdrv_co_truncate() need to hold a reader lock for the graph.
For some places, we know that they will hold the lock, but we don't have
the GRAPH_RDLOCK annotations yet. In this case, add assume_graph_lock()
with a FIXME comment. These
The following changes since commit 79b677d658d3d35e1e776826ac4abb28cdce69b8:
Merge tag 'net-pull-request' of https://github.com/jasowang/qemu into staging
(2023-02-21 11:28:31 +)
are available in the Git repository at:
https://repo.or.cz/qemu/kevin.git tags/for-upstream
for you to
bdrv_mirror_top_pwritev() accesses the job object when active mirroring
is enabled. It disables this code during early initialisation while
s->job isn't set yet.
However, s->job is still set way too early when the job object isn't
fully initialised. For example, >ops_in_flight isn't initialised
Although TCGv is defined as TCGv_i64 on sparc64,
make it clear tcg_temp_new_i64() returns a TCGv_i64.
Free calling tcg_temp_free_i64().
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
---
target/sparc/translate.c | 8
1 file changed, 4 insertions(+), 4
Although TCGv is defined as TCGv_i64 on s390x,
make it clear tcg_temp_new_i64() returns a TCGv_i64.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Reviewed-by: Ilya Leoshkevich
---
target/s390x/tcg/translate.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff
Although TCGv is defined as TCGv_i64 on alpha,
make it clear tcg_temp_new_i64() returns a TCGv_i64.
Free calling tcg_temp_free_i64().
Suggested-by: Ilya Leoshkevich
Signed-off-by: Philippe Mathieu-Daudé
---
target/alpha/translate.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
Missing review: #2
Although on 64-bit targets TCGv is defined as TCGv_i64,
clarify using the correct type for tcg_temp_new_i64().
Since v1:
- Added alpha patch (Ilya)
- Also use tcg_temp_free_i64()
Philippe Mathieu-Daudé (3):
target/s390x: Replace TCGv by TCGv_i64 in op_mov2e()
On 2/23/23 00:09, Philippe Mathieu-Daudé wrote:
+#include "cpu.h"
Does it work to include "exec/cpu-all.h" instead?
We get:
include/exec/cpu-all.h:110:5: warning: 'TARGET_LONG_SIZE' is not defined, evaluates to 0
[-Wundef]
#if TARGET_LONG_SIZE == 4
^
TARGET_LONG_SIZE is defined in
Am 29.01.2023 um 12:31 hat o...@il.ibm.com geschrieben:
> From: Or Ozeri
>
> Ceph RBD encryption API required specifying the encryption format
> for loading encryption. The supported formats were LUKS (v1) and LUKS2.
>
> Starting from Reef release, RBD also supports loading with "luks-any"
On Wed, 22 Feb 2023 at 23:33, Richard Henderson
wrote:
>
> This makes it easier to assign blame with perf.
>
> Signed-off-by: Richard Henderson
Reviewed-by: Peter Maydell
thanks
-- PMM
On Wed, 22 Feb 2023 at 23:32, Richard Henderson
wrote:
>
> Rewrite the sections which talked about 'local temporaries'.
> Remove some assumptions which no longer hold.
>
> Signed-off-by: Richard Henderson
> ---
> docs/devel/tcg-ops.rst | 103 +
> 1 file
On Wed, 22 Feb 2023 at 23:29, Richard Henderson
wrote:
>
> Since we now get TEMP_TB temporaries by default, we no longer
> need to make copies across these loops. These were the only
> uses of new_tmp_a64_local(), so remove that as well.
>
> Signed-off-by: Richard Henderson
> ---
Reviewed-by:
On 2/23/23 07:22, Peter Maydell wrote:
On Thu, 23 Feb 2023 at 17:16, Richard Henderson
xzr uses tcg_constant_i64(), which has no lifetime issues.
Hmm? cpu_reg() calls new_tmp_a64_zero() calls new_tmp_a64()
calls tcg_temp_new_i64(). What am I missing ?
Whoops, bad memory vs other target/foo/
Am 12. Februar 2023 12:37:42 UTC schrieb Bernhard Beschow :
>This series consolidates the implementations of the PIIX3 and PIIX4 south
>
>bridges and is an extended version of [1]. The motivation is to share as much
>
>code as possible and to bring both device models to feature parity such that
On Thu, 23 Feb 2023 at 17:16, Richard Henderson
wrote:
>
> On 2/23/23 06:49, Peter Maydell wrote:
> > On Thu, 16 Feb 2023 at 03:09, Richard Henderson
> > wrote:
> >>
> >> FEAT_LSE2 only requires that atomic operations not cross a
> >> 16-byte boundary. Ordered operations may be completely
> >>
Am 21.02.2023 um 22:22 hat Stefan Hajnoczi geschrieben:
> v3:
> - Fix s/see/sees/ typo in Patch 2 commit description [Eric]
> - Add call stack to Patch 3 commit description to make it clear how
> blk_drain()
> is invoked [Kevin]
>
> Unplugging SCSIDevices when virtio-scsi is using an IOThread
On 2/23/23 06:49, Peter Maydell wrote:
On Thu, 16 Feb 2023 at 03:09, Richard Henderson
wrote:
FEAT_LSE2 only requires that atomic operations not cross a
16-byte boundary. Ordered operations may be completely
unaligned if SCTLR.nAA is set.
Because this alignment check is so special, do it by
On Thu, 23 Feb 2023 at 16:51, Peter Maydell wrote:
> The current state of affairs is arguably broken, because it
> means you can't migrate a guest from a BE host to an LE host,
> because the migration stream contains host-endian-dependent
> data.
...thinking it through, this isn't right. The
On 1/31/23 23:56, Taylor Simpson wrote:
diff --git a/target/hexagon/gen_analyze_funcs.py
b/target/hexagon/gen_analyze_funcs.py
new file mode 100755
index 00..c45696bec8
--- /dev/null
+++ b/target/hexagon/gen_analyze_funcs.py
@@ -0,0 +1,237 @@
+#!/usr/bin/env python3
+
+##
+##
On Thu, 16 Feb 2023 at 03:11, Richard Henderson
wrote:
>
> Fixes a bug in that with SCTLR.A set, we should raise any
> alignment fault before raising any MTE check fault.
>
> Signed-off-by: Richard Henderson
Reviewed-by: Peter Maydell
thanks
-- PMM
On Thu, 23 Feb 2023 at 16:20, Richard Henderson
wrote:
>
> On 2/23/23 05:24, Peter Maydell wrote:
> > On Thu, 16 Feb 2023 at 03:10, Richard Henderson
> > wrote:
> >>
> >> This fixes a bug in that these two insns should have been using atomic
> >> 16-byte stores, since MTE is ARMv8.5 and LSE2 is
On Thu, 23 Feb 2023 at 16:12, Richard Henderson
wrote:
>
> On 2/23/23 05:14, Peter Maydell wrote:
> > On Thu, 16 Feb 2023 at 03:09, Richard Henderson
> > wrote:
> >>
> >> We currently treat cpu_exclusive_high as containing the
> >> second word of LDXP, even though that word is not "high"
> >> in
* Huanyu ZHAI (huanyu.z...@outlook.com) wrote:
> Subject: [PATCH] cpu/i386: update xsave components after CPUID filtering
>
> On i386 platform, CPUID data are setup through three consecutive steps: CPU
> model definition, expansion and filtering.
> XSAVE components are enabled during the
On Thu, 16 Feb 2023 at 03:09, Richard Henderson
wrote:
>
> FEAT_LSE2 only requires that atomic operations not cross a
> 16-byte boundary. Ordered operations may be completely
> unaligned if SCTLR.nAA is set.
>
> Because this alignment check is so special, do it by hand.
> Make sure not to keep
The following changes since commit 79b677d658d3d35e1e776826ac4abb28cdce69b8:
Merge tag 'net-pull-request' of https://github.com/jasowang/qemu into staging
(2023-02-21 11:28:31 +)
are available in the Git repository at:
https://gitlab.com/stsquad/qemu.git tags/pull-testing-next-230223-1
On 2/23/23 06:28, Peter Maydell wrote:
Also described in the text: the I_ZFGJP priority table lists
MTE faults at priority 33, basically lower than anything else
except an external abort.
Looking at the code, is this really the only case here where
we were mis-prioritizing tag check faults?
The base job template is responsible for controlling how we kick off
testing on our various branches. Rename and extend the
custom_runner_template so we can take advantage of all that control.
Signed-off-by: Alex Bennée
Reviewed-by: Thomas Huth
Message-Id:
On Thu, 16 Feb 2023 at 03:10, Richard Henderson
wrote:
>
> Signed-off-by: Richard Henderson
> ---
> docs/system/arm/emulation.rst | 1 +
> target/arm/cpu64.c| 1 +
> 2 files changed, 2 insertions(+)
Reviewed-by: Peter Maydell
thanks
-- PMM
On Thu, 16 Feb 2023 at 03:10, Richard Henderson
wrote:
>
> This is required for LSE2, where the pair must be treated
> atomically if it does not cross a 16-byte boundary. But
> it simplifies the code to do this always, just use the
> unpaired atomicity without LSE2.
>
> Signed-off-by: Richard
On Thu, 16 Feb 2023 at 03:11, Richard Henderson
wrote:
>
> With -cpu max and FEAT_LSE2, the __aarch64__ section will only raise
> an alignment exception when the load crosses a 16-byte boundary.
>
> Signed-off-by: Richard Henderson
Reviewed-by: Peter Maydell
thanks
-- PMM
On 23/2/23 16:56, Philippe Mathieu-Daudé wrote:
On 23/2/23 14:49, Markus Armbruster wrote:
Philippe Mathieu-Daudé writes:
All series reviewed, can patches be picked by corresponding
maintainers, or should I include them in on of my PRs?
I'm sitting on a lonely patch for the monitor
On Thu, 16 Feb 2023 at 03:10, Richard Henderson
wrote:
>
> Push the mte check behind the exclusive_addr check.
> Document the several ways that we are still out of spec
> with this implementation.
>
> Signed-off-by: Richard Henderson
> ---
Reviewed-by: Peter Maydell
thanks
-- PMM
On Thu, 16 Feb 2023 at 03:11, Richard Henderson
wrote:
>
> We are going to need the complete memop beforehand,
> so let's not compute it twice.
>
> Signed-off-by: Richard Henderson
Reviewed-by: Peter Maydell
thanks
-- PMM
It is buggy and keeps failing.
Suggested-by: Peter Maydell
Signed-off-by: Alex Bennée
Reviewed-by: Philippe Mathieu-Daudé
Message-Id: <20230221094558.2864616-11-alex.ben...@linaro.org>
diff --git a/tests/avocado/replay_kernel.py b/tests/avocado/replay_kernel.py
index 00a26e4a0c..f13456e1ec
On Thu, 16 Feb 2023 at 03:10, Richard Henderson
wrote:
>
> Signed-off-by: Richard Henderson
> ---
> target/arm/cpu.h | 3 ++-
> target/arm/translate.h | 2 ++
> target/arm/helper.c| 6 ++
> target/arm/translate-a64.c | 1 +
> 4 files changed, 11 insertions(+), 1
In preparation for the next patch when we enable socat for our CI
images we need to disable this part of the test for MacOS. The bug has
been raised here:
https://gitlab.com/qemu-project/qemu/-/issues/1495
Once that is fixed we should re-enable the test.
Signed-off-by: Alex Bennée
On Thu, 16 Feb 2023 at 03:11, Richard Henderson
wrote:
>
> Fixes a bug in that with SCTLR.A set, we should raise any
> alignment fault before raising any MTE check fault.
>
> Signed-off-by: Richard Henderson
> ---
> target/arm/internals.h | 3 ++-
> target/arm/mte_helper.c| 18
When we re-factored we dropped the unlink() step which turns out to be
required for rmdir to do its thing. If we had been checking the return
value we would have noticed so lets do that with this fix.
Fixes: 68406d1085 (tests/unit: cleanups for test-io-channel-command)
Signed-off-by: Alex Bennée
As we like to run tests under CI with V=1 flags the softfloat tests
can add up to a fair amount of extra log lines. With an update to the
testfloat library we can now call fp-test with the -q flag and reduce
the output to a terse one line per function tested.
make check-softfloat V=1 | wc -l
From: Thomas Huth
The meson log files can get very big, especially if running the tests in
verbose mode. So dumping those logs to the console was a bad idea, since
gitlab truncates the output if it is getting too big. Let's publish the
logs as artifacts instead. This has the disadvantage that
Philippe Mathieu-Daudé writes:
> On 23/2/23 16:56, Philippe Mathieu-Daudé wrote:
>> On 23/2/23 14:49, Markus Armbruster wrote:
>>> Philippe Mathieu-Daudé writes:
>>>
All series reviewed, can patches be picked by corresponding
maintainers, or should I include them in on of my PRs?
>>>
On 23/2/23 14:49, Markus Armbruster wrote:
Philippe Mathieu-Daudé writes:
All series reviewed, can patches be picked by corresponding
maintainers, or should I include them in on of my PRs?
I'm sitting on a lonely patch for the monitor subsystem. Want me to
throw in your series, so my PR is
From: Thomas Huth
There's no need to run a full-blown bash just to create a directory.
And we can skip the "cd build" each time by doing it once at the
beginning.
Additionally, let's exclude some targets (that we already compile-test
with MinGW in the gitlab jobs) from the build, since the
On 2/23/23 05:24, Peter Maydell wrote:
On Thu, 16 Feb 2023 at 03:10, Richard Henderson
wrote:
This fixes a bug in that these two insns should have been using atomic
16-byte stores, since MTE is ARMv8.5 and LSE2 is mandatory from ARMv8.4.
Signed-off-by: Richard Henderson
diff --git
145e2198d749 ("hw/mips/gt64xxx_pci: Endian-swap using PCI_HOST_BRIDGE
MemoryRegionOps") converted CFGADDR/CFGDATA registers to use PCI_HOST_BRIDGE's
accessor facility and enabled byte swap for both CFGADDR/CFGDATA register.
However CFGADDR as a ISD internal register is not controled by MByteSwap
Since commit a0e61807a3 ("qapi: Remove QMP events and commands from
user-mode builds") we don't generate the "qapi-commands-machine.h"
header in a user-emulation-only build.
Move the QMP functions from helper.c (which is always compiled)
to monitor.c (which is only compiled when system-emulation
All series reviewed, can patches be picked by corresponding
maintainers, or should I include them in on of my PRs?
The "qapi-commands-machine.h" header is not generated in user-only
emulation. This series removes its use in user-emu code by moving
the QMP code depending on this header into a
All we are really doing here is checking that TSAN builds compile and are
therefor a tool available to developers. The benchmarks are not
representative of QEMU's actual threading behaviour and they burn
precious CI time. Indeed switching to check-unit reveals many
unaddressed issues which have
We only use it for test-io-channel-command at the moment.
Unfortunately bringing socat into CI exposed an existing bug in the
test-io-channel-command unit test so we disabled it for MacOS in the
previous patch.
Signed-off-by: Alex Bennée
Reviewed-by: Philippe Mathieu-Daudé
Tested-by: Philippe
The 22.04 LTS release has been out for almost a year now so its time
to update all the remaining images to the current LTS. We can also
drop some hacks we need for older clang TSAN support.
We will keep the ubuntu2004 container around for those who wish to
test builds on the currently still
Since commit a0e61807a3 ("qapi: Remove QMP events and commands from
user-mode builds") we don't generate the "qapi-commands-machine.h"
header in a user-emulation-only build.
Move the QMP functions from cpu_init.c (which is always compiled)
to monitor.c (which is only compiled when
On 2/23/23 05:14, Peter Maydell wrote:
On Thu, 16 Feb 2023 at 03:09, Richard Henderson
wrote:
We currently treat cpu_exclusive_high as containing the
second word of LDXP, even though that word is not "high"
in big-endian mode. Swap things around so that it is.
Signed-off-by: Richard
Daniel P. Berrangé writes:
> On Thu, Feb 23, 2023 at 11:21:53AM -0300, Fabiano Rosas wrote:
>> I'm not sure if this was discussed previously, but I noticed we're not
>> pulling the images we push to the registry at every pipeline run.
>>
>> I would expect we don't actually need to rebuild
Since commit a0e61807a3 ("qapi: Remove QMP events and commands from
user-mode builds") we don't generate the "qapi-commands-machine.h"
header in a user-emulation-only build.
Extract the QMP functions from cpu.c (which is always compiled)
to the new 'loongarch-qmp-cmds.c' unit (which is only
On Thu, 16 Feb 2023 at 03:10, Richard Henderson
wrote:
>
> Pass the individual memop to gen_mte_checkN.
> For the moment, do nothing with it.
>
> Signed-off-by: Richard Henderson
> ---
> target/arm/translate-a64.h | 2 +-
> target/arm/translate-a64.c | 26 +++---
>
Since commit a0e61807a3 ("qapi: Remove QMP events and commands from
user-mode builds") we don't generate the "qapi-commands-machine.h"
header in a user-emulation-only build.
Guard qmp_query_cpu_definitions() within CONFIG_USER_ONLY; move
x86_cpu_class_check_missing_features() closer since it is
We do run tests on some cross builds. Provide a template to ensure we
export the testlog to the build artefacts and report the test results
via the junit.
Signed-off-by: Alex Bennée
Reported-by: Peter Maydell
Reviewed-by: Thomas Huth
Message-Id:
The TuxRun project (www.tuxrun.org) uses QEMU to run tests on a wide
variety of kernel configurations on wide range of our emulated
platforms. They publish a known good set of images at:
https://storage.tuxboot.com/
to help with bisecting regressions in either the kernel, firmware or
QEMU
On Thu, 16 Feb 2023 at 03:11, Richard Henderson
wrote:
>
> Pass the completed memop to gen_mte_check1_mmuidx.
> For the moment, do nothing more than extract the size.
>
> Signed-off-by: Richard Henderson
Reviewed-by: Peter Maydell
thanks
-- PMM
From: Bastian Koppelmann
since binutils is pretty old, it fails our CI repeatedly during the
compilation of tricore-binutils. We created a precompiled version using
the debian docker image and download it instead of building it ourself.
We also updated the package to include a newer version of
On Thu, 16 Feb 2023 at 03:11, Richard Henderson
wrote:
>
> We are going to need the complete memop beforehand,
> so let's not compute it twice.
>
> Signed-off-by: Richard Henderson
> ---
> target/arm/translate-a64.c | 42 +-
> 1 file changed, 19
On Thu, 16 Feb 2023 at 03:11, Richard Henderson
wrote:
>
> Use this to record the default atomicity of memory operations.
> Set it to MO_ATOM_WITHIN16 if FEAT_LSE2 applies.
>
> Signed-off-by: Richard Henderson
> ---
> target/arm/translate.h | 14 +++---
> target/arm/translate-a64.c
On Thu, Feb 23, 2023 at 02:59:19PM +0800, Jason Wang wrote:
> Hi All:
>
> According to ATS, device should work if ATS is disabled. This is not
> correctly implemented in the current intel-iommu since it doesn't
> handle the UNMAP notifier correctly. This breaks the vhost-net +
> vIOMMU without
Daniel P. Berrangé writes:
> On Thu, Feb 23, 2023 at 11:21:53AM -0300, Fabiano Rosas wrote:
>> I'm not sure if this was discussed previously, but I noticed we're not
>> pulling the images we push to the registry at every pipeline run.
>>
>> I would expect we don't actually need to rebuild
On Thu, 16 Feb 2023 at 03:10, Richard Henderson
wrote:
>
> Signed-off-by: Richard Henderson
> ---
> target/arm/cpu.h | 5 +
> 1 file changed, 5 insertions(+)
>
> diff --git a/target/arm/cpu.h b/target/arm/cpu.h
> index 7bc97fece9..2108caf753 100644
> --- a/target/arm/cpu.h
> +++
Philippe Mathieu-Daudé writes:
> ForeachArgs::name is only used once as TYPE_IPMI_BMC.
> Since the penultimate commit, object_child_foreach_recursive()'s
> handler takes an Error* argument and return a boolean.
> We can directly pass ForeachArgs::obj as context, removing the
> ForeachArgs
On 22/2/23 23:36, Richard Henderson wrote:
On 2/22/23 11:28, Philippe Mathieu-Daudé wrote:
Signed-off-by: Philippe Mathieu-Daudé
---
tcg/tcg.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/tcg/tcg.c b/tcg/tcg.c
index a4a3da6804..3df2c6a6af 100644
--- a/tcg/tcg.c
+++ b/tcg/tcg.c
@@
On Thu, 16 Feb 2023 at 03:10, Richard Henderson
wrote:
>
> No need to duplicate this check across multiple call sites.
>
> Signed-off-by: Richard Henderson
Reviewed-by: Peter Maydell
thanks
-- PMM
Philippe Mathieu-Daudé writes:
> Following the Error API best practices documented in commit
> e3fe3988d7 ("error: Document Error API usage rules"), have the
> object_child_foreach[_recursive]() handler take a Error* argument
> and return a boolean indicating whether this error is set or not.
>
On 23/02/2023 0:40, Alex Williamson wrote:
External email: Use caution opening links or attachments
On Wed, 22 Feb 2023 19:49:06 +0200
Avihai Horon wrote:
From: Joao Martins
Add device dirty page tracking start/stop functionality. This uses the
device DMA logging uAPI to start and stop
On Thu, 16 Feb 2023 at 03:09, Richard Henderson
wrote:
>
> Round len_align to 16 instead of 8, handling an odd 8-byte as part
> of the tail. Use MO_ATOM_NONE to indicate that all of these memory
> ops have only byte atomicity.
>
> Signed-off-by: Richard Henderson
Reviewed-by: Peter Maydell
On Tue, Feb 21, 2023 at 11:40:26AM -0500, Stefan Hajnoczi wrote:
> On Fri, Feb 17, 2023 at 11:22:02AM +0100, Kevin Wolf wrote:
> > Am 10.02.2023 um 15:32 hat Stefan Hajnoczi geschrieben:
> > > When an IOThread is configured, the ctrl virtqueue is processed in the
> > > IOThread. TMFs that reset
On Thu, Feb 23, 2023 at 03:28:37PM +, Ben Dooks wrote:
> On Thu, Feb 23, 2023 at 12:56:56PM +, Peter Maydell wrote:
> > Hi; the project is out of gitlab CI pipeline minutes again.
> > In the absence of any other proposals, no more pull request
> > merges will happen til 1st March...
>
>
On Thu, Feb 23, 2023 at 12:56:56PM +, Peter Maydell wrote:
> Hi; the project is out of gitlab CI pipeline minutes again.
> In the absence of any other proposals, no more pull request
> merges will happen til 1st March...
Is there a way of sponsoring more minutes, could people provide
runner
On 22/02/2023 23:40, Alex Williamson wrote:
External email: Use caution opening links or attachments
On Wed, 22 Feb 2023 19:49:02 +0200
Avihai Horon wrote:
There are already two places where dirty page bitmap allocation and
calculations are done in open code. With device dirty page
Philippe Mathieu-Daudé writes:
> Following the example documented since commit e3fe3988d7 ("error:
> Document Error API usage rules"), have the nmi_monitor_handler
> return a boolean indicating whether an error is set or not and
> convert its implementations.
>
> Signed-off-by: Philippe
On 22/02/2023 22:58, Alex Williamson wrote:
External email: Use caution opening links or attachments
On Wed, 22 Feb 2023 19:48:58 +0200
Avihai Horon wrote:
Pre-copy support allows the VFIO device data to be transferred while the
VM is running. This helps to accommodate VFIO devices that
On Thu, 16 Feb 2023 at 03:10, Richard Henderson
wrote:
>
> This fixes a bug in that these two insns should have been using atomic
> 16-byte stores, since MTE is ARMv8.5 and LSE2 is mandatory from ARMv8.4.
>
> Signed-off-by: Richard Henderson
> diff --git a/tests/tcg/aarch64/mte-7.c
On 23/02/2023 15.02, Daniel P. Berrangé wrote:
On Tue, Feb 07, 2023 at 09:14:47PM +0100, Thomas Huth wrote:
By using --enable-fdt=system we can make sure that the configure
script does not try to check out the "dtc" submodule. This should
help to safe some precious CI minutes in the long run.
On Thu, 16 Feb 2023 at 03:09, Richard Henderson
wrote:
>
> While we don't require 16-byte atomicity here, using a single
> larger operation simplifies the code.
>
> Signed-off-by: Richard Henderson
> ---
> target/arm/translate-a64.c | 38 ++
> 1 file changed,
On 2/22/23 22:23, gaosong wrote:
Hi, Richard
在 2023/2/21 上午1:21, Richard Henderson 写道:
On 2/19/23 21:47, gaosong wrote:
I have some questions:
1 Should we need implement GVecGen* for simple gvec instructiosn?
such as add, sub , or , xor..
No, these are done generically.
2 Should we
ping
On 10/2/23 13:57, Philippe Mathieu-Daudé wrote:
We have a X86CPU *cpu pointer available at the start of the function.
Inspired-by: Daniel Henrique Barboza
Signed-off-by: Philippe Mathieu-Daudé
---
target/i386/tcg/sysemu/misc_helper.c | 2 +-
1 file changed, 1 insertion(+), 1
ping
On 13/2/23 11:10, Philippe Mathieu-Daudé wrote:
Convert EEPRO100 to use the latest QDev conventions / style.
v1:
https://lore.kernel.org/qemu-devel/20230213070820.76881-9-phi...@linaro.org/
Based-on: <20230213070423.76428-1-phi...@linaro.org>
hw/qdev: Housekeeping around
On Thu, 16 Feb 2023 at 03:09, Richard Henderson
wrote:
>
> We currently treat cpu_exclusive_high as containing the
> second word of LDXP, even though that word is not "high"
> in big-endian mode. Swap things around so that it is.
>
> Signed-off-by: Richard Henderson
> ---
>
On 23/02/2023 12:05, Cédric Le Goater wrote:
External email: Use caution opening links or attachments
On 2/22/23 21:55, Alex Williamson wrote:
There are various errors running this through the CI on gitlab.
This one seems bogus but needs to be resolved regardless:
On Thu, Feb 23, 2023 at 07:15:47AM -0700, Warner Losh wrote:
> On Thu, Feb 23, 2023, 6:48 AM Thomas Huth wrote:
>
> > On 23/02/2023 13.56, Peter Maydell wrote:
> > > Hi; the project is out of gitlab CI pipeline minutes again.
> > > In the absence of any other proposals, no more pull request
> >
On Thu, Feb 23, 2023 at 11:21:53AM -0300, Fabiano Rosas wrote:
> I'm not sure if this was discussed previously, but I noticed we're not
> pulling the images we push to the registry at every pipeline run.
>
> I would expect we don't actually need to rebuild container images at
> _every_ pipeline
On 22/02/2023 22:55, Alex Williamson wrote:
External email: Use caution opening links or attachments
There are various errors running this through the CI on gitlab.
This one seems bogus but needs to be resolved regardless:
https://gitlab.com/alex.williamson/qemu/-/jobs/3817940731
FAILED:
On 2023-02-23 14:30, Thomas Huth wrote:
On 22/02/2023 15.20, Pierre Morel wrote:
On interception of STSI(15.1.x) the System Information Block
(SYSIB) is built from the list of pre-ordered topology entries.
Signed-off-by: Pierre Morel
---
...
diff --git a/target/s390x/cpu.h
On 2023-02-23 13:53, Thomas Huth wrote:
On 22/02/2023 15.20, Pierre Morel wrote:
The topology information are attributes of the CPU and are
specified during the CPU device creation.
...
diff --git a/include/hw/s390x/cpu-topology.h
b/include/hw/s390x/cpu-topology.h
index
On 2023-02-23 15:13, Nina Schoetterl-Glausch wrote:
On Thu, 2023-02-23 at 15:06 +0100, pierre wrote:
On 2023-02-23 13:53, Thomas Huth wrote:
> On 22/02/2023 15.20, Pierre Morel wrote:
> > The topology information are attributes of the CPU and are
> > specified during the CPU device creation.
>
On 22/2/23 04:53, Thomas Huth wrote:
On 22/02/2023 00.25, Philippe Mathieu-Daudé wrote:
Since commit 262a69f428 ("osdep.h: Prohibit disabling assert()
in supported builds") we can not build QEMU with NDEBUG (or
G_DISABLE_ASSERT) defined, thus 'assert(0)' always aborts QEMU.
However some static
On 18/2/23 01:47, Bernhard Beschow wrote:
Am 17. Februar 2023 14:18:31 UTC schrieb "Philippe Mathieu-Daudé"
:
Following the recommendation added in commit a98c370c46
("typedefs: (Re-)sort entries alphabetically"), and similarly
to commit 64baadc272 ("Sort include/qemu/typedefs.h"), sort
I'm not sure if this was discussed previously, but I noticed we're not
pulling the images we push to the registry at every pipeline run.
I would expect we don't actually need to rebuild container images at
_every_ pipeline run, so I propose we add a "docker pull" to the
container templates. We
We currently build and push container images at every pipeline
run. Since the main objective of the CI is testing QEMU, we don't need
to build the containers at every single run, we could pull the images
that were built in previous runs.
Signed-off-by: Fabiano Rosas
---
On Thu, 23 Feb 2023 08:37:46 +0100
Markus Armbruster wrote:
> Thomas Huth writes:
>
> > On 22/02/2023 19.16, Philippe Mathieu-Daudé wrote:
> >> +Thomas (meson) & Marc-André (conditional QAPI)
> >
> > + Markus
> >
> >> On 22/2/23 17:49, Jonathan Cameron wrote:
>
> [...]
>
> >>
On Thu, 23 Feb 2023, Bernhard Beschow wrote:
On Thu, Feb 23, 2023 at 1:34 PM BALATON Zoltan wrote:
I don't get your approach.
I hope that I could help you get a better understanding. The linked
.pdf is good and comprehensive reading material.
I'm not sure the via-ide confirms to that doc
On Thu, Feb 23, 2023, 6:48 AM Thomas Huth wrote:
> On 23/02/2023 13.56, Peter Maydell wrote:
> > Hi; the project is out of gitlab CI pipeline minutes again.
> > In the absence of any other proposals, no more pull request
> > merges will happen til 1st March...
>
> I'd like to propose again to
On Thu, Feb 23, 2023 at 02:46:40PM +0100, Thomas Huth wrote:
> On 23/02/2023 13.56, Peter Maydell wrote:
> > Hi; the project is out of gitlab CI pipeline minutes again.
> > In the absence of any other proposals, no more pull request
> > merges will happen til 1st March...
>
> I'd like to propose
On Thu, 2023-02-23 at 15:06 +0100, pierre wrote:
> On 2023-02-23 13:53, Thomas Huth wrote:
> > On 22/02/2023 15.20, Pierre Morel wrote:
> > > The topology information are attributes of the CPU and are
> > > specified during the CPU device creation.
> > ...
> > > diff --git
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