[Qemu-devel] [PATCH v2 2/3] Update README to accomodate markdown format

Signed-off-by: Pranith Kumar <bobby.pr...@gmail.com> Reviewed-by: Stefan Weil <s...@weilnetz.de> --- README | 44 +--- 1 file changed, 21 insertions(+), 23 deletions(-) diff --git a/README b/README index f38193f..8a7ac66 100644 --- a/README

[Qemu-devel] [PATCH v2 1/3] Revert e5dfc5e8e("Move README to markdown")

checkpatch.pl and other scripts fail without README. Also in dicussions it was deemed safer to create a symlink, the patch for which follows. This reverts commit e5dfc5e8e715c572aea44ac4d96c43941d4741c7. Signed-off-by: Pranith Kumar <bobby.pr...@gmail.com> Reviewed-by: Stefan W

Re: [Qemu-devel] [PATCH 3/3] Update README to accomodate markdown format

Thank you for reviewing. On Wed, Jul 20, 2016 at 4:10 PM, Stefan Weil <s...@weilnetz.de> wrote: > See comments below. > > I'd also switch commits 2 and 3, because 2 is only valid as soon as > README is in markup format. > OK, I will update patches 2 and 3 and resend a v2. Thanks! -- Pranith

[Qemu-devel] [PATCH 2/3] Create README.md as a symlink to README

Signed-off-by: Pranith Kumar <bobby.pr...@gmail.com> --- README.md | 1 + 1 file changed, 1 insertion(+) create mode 12 README.md diff --git a/README.md b/README.md new file mode 12 index 000..100b938 --- /dev/null +++ b/README.md @@ -0,0 +1 @@ +README \ No newline at end o

[Qemu-devel] [PATCH 1/3] Revert e4dfc5e8e("Move README to markdown")

checkpatch.pl and other scripts fail without README. Also in dicussions it was deemed safer to create a symlink, the patch for which follows. This reverts commit e5dfc5e8e715c572aea44ac4d96c43941d4741c7. Signed-off-by: Pranith Kumar <bobby.pr...@gmail.com> --- README.md => RE

[Qemu-devel] [PATCH 3/3] Update README to accomodate markdown format

Signed-off-by: Pranith Kumar <bobby.pr...@gmail.com> --- README | 44 +--- 1 file changed, 21 insertions(+), 23 deletions(-) diff --git a/README b/README index f38193f..8d5744d 100644 --- a/README +++ b/README @@ -1,5 +1,5 @@ - QEMU

[Qemu-devel] [PATCH 0/3] Fix regression caused my moving README

be seen here: https://github.com/pranith/qemu/tree/markdown Pranith Kumar (3): Revert e4dfc5e8e("Move README to markdown") Create README.md as a symlink to README Update README to accomodate markdown format READM

Re: [Qemu-devel] [PATCH] Fix regressions caused by renaming README

o getting it reverted if it really is bothering. -- Pranith

Re: [Qemu-devel] [RFC PATCH] tcg: Optimize fence instructions

Paolo Bonzini writes: > On 14/07/2016 22:29, Pranith Kumar wrote: >> +} else if (curr_mb_type == TCG_BAR_STRL && >> + prev_mb_type == TCG_BAR_LDAQ) { >> +/* Consecutive load-acquire and store-release barriers >>

[Qemu-devel] [Bug 485239] Re: Windows 2008 datacenter- 64 bit , installation fails with qemu-system-x86_64 0.11.50

Please try the latest version. The version you reported is too old. ** Changed in: qemu Status: New => Invalid -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. https://bugs.launchpad.net/bugs/485239 Title: Windows 2008

Re: [Qemu-devel] [RFC PATCH] tcg: Optimize fence instructions

Alex Bennée writes: > Pranith Kumar <bobby.pr...@gmail.com> writes: > >> This patch applies on top of the fence generation patch series. >> >> This commit optimizes fence instructions. Two optimizations are >> currently implemented. These are: >> >

Re: [Qemu-devel] [RFC PATCH] tcg: Optimize fence instructions

Alex Bennée writes: > Pranith Kumar <bobby.pr...@gmail.com> writes: > >> This patch applies on top of the fence generation patch series. >> >> This commit optimizes fence instructions. Two optimizations are >> currently implemented. These are: >> >

Re: [Qemu-devel] [PATCH] Fix regressions caused by renaming README

aniel P. Berrange <berra...@redhat.com> > Signed-off-by: Stefan Weil <s...@weilnetz.de> Thank you for fixing this. -- Pranith

Re: [Qemu-devel] [RFC PATCH] tcg: Optimize fence instructions

Richard Henderson writes: > On 07/15/2016 01:59 AM, Pranith Kumar wrote: >> This patch applies on top of the fence generation patch series. >> >> This commit optimizes fence instructions. Two optimizations are >> currently implemented. These are: >> >> 1. U

Re: [Qemu-devel] [PULL 09/12] Move README to markdown

On Tue, Jul 19, 2016 at 11:49 AM, Daniel P. Berrange <berra...@redhat.com> wrote: > On Tue, Jul 19, 2016 at 10:34:16AM +0200, Paolo Bonzini wrote: >> From: Pranith Kumar <bobby.pr...@gmail.com> >> >> Move the README file to markdown so that it makes the git

[Qemu-devel] [PATCH] Move README to markdown

Move the README file to markdown so that it makes the github page look prettier. I know that github repo is a mirror and not the official repo, but I think it doesn't hurt to have it in markdown format. Signed-off-by: Pranith Kumar <bobby.pr...@gmail.com> --- README => READM

[Qemu-devel] [PATCH] MAINTAINERS: Update PPC maintainer to Richard

Richard agreed to look after PPC[1]. Make this change. [1] https://lists.gnu.org/archive/html/qemu-ppc/2016-03/msg00657.html CC: Richard Henderson <r...@twiddle.net> Signed-off-by: Pranith Kumar <bobby.pr...@gmail.com> --- MAINTAINERS | 2 +- 1 file changed, 1 insertion(+), 1 delet

[Qemu-devel] [RFC PATCH] tcg: Optimize fence instructions

; st Signed-off-by: Pranith Kumar <bobby.pr...@gmail.com> --- tcg/optimize.c | 59 ++ tcg/tcg.h | 1 + 2 files changed, 60 insertions(+) diff --git a/tcg/optimize.c b/tcg/optimize.c index c0d975b..a655829 100644 --- a/tcg/op

[Qemu-devel] [PATCH v4 12/14] target-alpha: Generate fence op

Signed-off-by: Pranith Kumar <bobby.pr...@gmail.com> Signed-off-by: Richard Henderson <r...@twiddle.net> --- target-alpha/translate.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/target-alpha/translate.c b/target-alpha/translate.c index 0ea0e6e..c2

[Qemu-devel] [PATCH v4 11/14] target-arm: Generate fences in ARMv7 frontend

Signed-off-by: Pranith Kumar <bobby.pr...@gmail.com> --- target-arm/translate.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/target-arm/translate.c b/target-arm/translate.c index bd5d5cb..693d4bc 100644 --- a/target-arm/translate.c +++ b/target-arm/trans

[Qemu-devel] [PATCH v4 04/14] tcg/arm: Add support for fence

Cc: Andrzej Zaborowski <balr...@gmail.com> Cc: Peter Maydell <peter.mayd...@linaro.org> Signed-off-by: Pranith Kumar <bobby.pr...@gmail.com> Signed-off-by: Richard Henderson <r...@twiddle.net> --- tcg/arm/tcg-target.inc.c | 18 ++ 1 file changed, 18 inserti

[Qemu-devel] [PATCH v4 08/14] tcg/s390: Add support for fence

Cc: Alexander Graf <ag...@suse.de> Signed-off-by: Pranith Kumar <bobby.pr...@gmail.com> Signed-off-by: Richard Henderson <r...@twiddle.net> --- tcg/s390/tcg-target.inc.c | 11 +++ 1 file changed, 11 insertions(+) diff --git a/tcg/s390/tcg-target.inc.c b/tcg/s390/tcg-

[Qemu-devel] [PATCH v4 05/14] tcg/ia64: Add support for fence

Cc: Aurelien Jarno <aurel...@aurel32.net> Signed-off-by: Richard Henderson <r...@twiddle.net> Signed-off-by: Pranith Kumar <bobby.pr...@gmail.com> --- tcg/ia64/tcg-target.inc.c | 5 + 1 file changed, 5 insertions(+) diff --git a/tcg/ia64/tcg-target.inc.c b/tcg/ia64/tcg-

[Qemu-devel] [PATCH v4 13/14] target-aarch64: Generate fences for aarch64

Signed-off-by: Pranith Kumar <bobby.pr...@gmail.com> --- target-arm/translate-a64.c | 14 +- 1 file changed, 13 insertions(+), 1 deletion(-) diff --git a/target-arm/translate-a64.c b/target-arm/translate-a64.c index f5e29d2..09877bc 100644 --- a/target-arm/translate-a64.c

[Qemu-devel] [PATCH v4 10/14] tcg/tci: Add support for fence

Cc: Stefan Weil <s...@weilnetz.de> Signed-off-by: Pranith Kumar <bobby.pr...@gmail.com> Signed-off-by: Richard Henderson <r...@twiddle.net> --- tcg/tci/tcg-target.inc.c | 3 +++ tci.c| 4 2 files changed, 7 insertions(+) diff --git a/tcg/tci/tcg-targ

[Qemu-devel] [PATCH v4 06/14] tcg/mips: Add support for fence

Signed-off-by: Richard Henderson <r...@twiddle.net> Signed-off-by: Pranith Kumar <bobby.pr...@gmail.com> --- tcg/mips/tcg-target.inc.c | 6 ++ 1 file changed, 6 insertions(+) diff --git a/tcg/mips/tcg-target.inc.c b/tcg/mips/tcg-target.inc.c index 2f9be48..1f5adbe 100644 --- a/

[Qemu-devel] [PATCH v4 01/14] Introduce TCGOpcode for memory barrier

This commit introduces the TCGOpcode for memory barrier instruction. This opcode takes an argument which is the type of memory barrier which should be generated. Signed-off-by: Pranith Kumar <bobby.pr...@gmail.com> --- tcg/README| 17 + tcg/tcg-op.c

[Qemu-devel] [PATCH v4 14/14] target-i386: Generate fences for x86

Signed-off-by: Pranith Kumar <bobby.pr...@gmail.com> --- target-i386/translate.c | 8 1 file changed, 8 insertions(+) diff --git a/target-i386/translate.c b/target-i386/translate.c index 7dea18b..ebeb6f0 100644 --- a/target-i386/translate.c +++ b/target-i386/translate.c @@ -8

[Qemu-devel] [PATCH v4 09/14] tcg/sparc: Add support for fence

Cc: Blue Swirl <blauwir...@gmail.com> Signed-off-by: Pranith Kumar <bobby.pr...@gmail.com> Signed-off-by: Richard Henderson <r...@twiddle.net> --- tcg/sparc/tcg-target.inc.c | 25 + 1 file changed, 25 insertions(+) diff --git a/tcg/sparc/tcg-target.inc

[Qemu-devel] [PATCH v4 07/14] tcg/ppc: Add support for fence

Signed-off-by: Pranith Kumar <bobby.pr...@gmail.com> Signed-off-by: Richard Henderson <r...@twiddle.net> --- tcg/ppc/tcg-target.inc.c | 22 ++ 1 file changed, 22 insertions(+) diff --git a/tcg/ppc/tcg-target.inc.c b/tcg/ppc/tcg-target.inc.c index eaf1bd9..15

[Qemu-devel] [PATCH v4 03/14] tcg/aarch64: Add support for fence

Cc: Claudio Fontana <claudio.font...@gmail.com> Signed-off-by: Pranith Kumar <bobby.pr...@gmail.com> --- tcg/aarch64/tcg-target.inc.c | 26 ++ 1 file changed, 26 insertions(+) diff --git a/tcg/aarch64/tcg-target.inc.c b/tcg/aarch64/tcg-target.inc.c index 08b2

[Qemu-devel] [PATCH v4 00/14] tcg: Add support for fence generation

flag to argument. v2: - Rebase on Richard's patches generating fences for other architectures. v1: - Initial version: Introduce memory barrier tcg opcode. Pranith Kumar (14): Introduce TCGOpcode for memory barrier tcg/i386: Add support for fence tcg/aarch64: Add support for fence tcg

[Qemu-devel] [PATCH v4 02/14] tcg/i386: Add support for fence

Generate a 'lock orl $0,0(%esp)' instruction for ordering instead of mfence which has similar ordering semantics. Signed-off-by: Pranith Kumar <bobby.pr...@gmail.com> --- tcg/i386/tcg-target.inc.c | 18 ++ 1 file changed, 18 insertions(+) diff --git a/tcg/i386/tcg-target.i

Re: [Qemu-devel] [PATCH v2] .travis.yml: Disable IRC build status updates from forks

used to decrypt this string. You can only have access to the public key of the repo to create the encrypted string as above. -- Pranith

[Qemu-devel] [PATCH] misc/aspeed_scu: Fix build error caused by missing header

Tracing configurations error out currently as follows: /home/travis/build/pranith/qemu/hw/misc/aspeed_scu.c: In function ‘aspeed_scu_read’: /home/travis/build/pranith/qemu/hw/misc/aspeed_scu.c:130:9: error: implicit declaration of function ‘qemu_log_mask’ [-Werror=implicit-function-declaration

[Qemu-devel] [PATCH v2] .travis.yml: Disable IRC build status updates from forks

to notify the IRC only for the main repo. Signed-off-by: Pranith Kumar <bobby.pr...@gmail.com> CC: serge.f...@gmail.com CC: peter.mayd...@linaro.org --- v2: Add comment about what the string is and how the string is generated .travis.yml | 5 - 1 file changed, 4 insertions(+), 1 deletio

Re: [Qemu-devel] [RFC PATCH] .travis.yml: Disable IRC build status updates from non-master branches

On Mon, Jun 27, 2016 at 1:40 PM, Peter Maydell <peter.mayd...@linaro.org> wrote: > On 27 June 2016 at 18:34, Pranith Kumar <bobby.pr...@gmail.com> wrote: >> The idea is to encrypt "irc.oftc.net#qemu" against "qemu/qemu" to >> generate an ecrypted

[Qemu-devel] [PATCH] .travis.yml: Disable IRC build status updates from forks

to notify the IRC only for the main repo. Signed-off-by: Pranith Kumar <bobby.pr...@gmail.com> CC: serge.f...@gmail.com CC: peter.mayd...@linaro.org --- .travis.yml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/.travis.yml b/.travis.yml index c13881e..b6b1daf 100644 -

Re: [Qemu-devel] [RFC PATCH] .travis.yml: Disable IRC build status updates from non-master branches

On Mon, Jun 27, 2016 at 1:28 PM, Peter Maydell <peter.mayd...@linaro.org> wrote: > On 27 June 2016 at 18:18, Pranith Kumar <bobby.pr...@gmail.com> wrote: >> On Mon, Jun 27, 2016 at 1:16 PM, Peter Maydell <peter.mayd...@linaro.org> >> wrote: >>>> >

Re: [Qemu-devel] [RFC PATCH] .travis.yml: Disable IRC build status updates from non-master branches

mu repo does > notifications" ? > This does the later. If we prefer the former, we need to encrypt the IRC channel as suggested in: https://github.com/facebook/flow/pull/1822 -- Pranith

[Qemu-devel] [RFC PATCH] .travis.yml: Disable IRC build status updates from non-master branches

alternative is to encrypt the "qemu/qemu" repository so that only the main repository updates are posted on IRC. (ref. https://github.com/facebook/flow/pull/1822). Signed-off-by: Pranith Kumar <bobby.pr...@gmail.com> --- .travis.yml | 4 1 file changed, 4 insertions(+) diff --git

Re: [Qemu-devel] [RFC v3 PATCH 01/14] Introduce TCGOpcode for memory barrier

On Tue, Jun 21, 2016 at 2:04 PM, Alex Bennée <alex.ben...@linaro.org> wrote: > > Pranith Kumar <bobby.pr...@gmail.com> writes: > >> This commit introduces the TCGOpcode for memory barrier instruction. >> >> This opcode takes an argument which is the

Re: [Qemu-devel] [RFC v3 PATCH 01/14] Introduce TCGOpcode for memory barrier

what on >> what operations the ordering is to be enforced. > > This would be worthwhile in the comments. I'm confused by the fact we > have two sets of enums that are going to be merged when building TCGOp > parameters. OK, I will add these comments with the details. -- Pranith

Re: [Qemu-devel] [RFC v3 PATCH 14/14] target-i386: Generate fences for x86

On Tue, Jun 21, 2016 at 1:54 PM, Peter Maydell <peter.mayd...@linaro.org> wrote: > On 21 June 2016 at 18:28, Pranith Kumar <bobby.pr...@gmail.com> wrote: >> Reg. the second point, I did consider this situation of running x86 on >> ARM where such barriers are necessary

Re: [Qemu-devel] [RFC v3 PATCH 14/14] target-i386: Generate fences for x86

On Tue, Jun 21, 2016 at 3:28 AM, Paolo Bonzini <pbonz...@redhat.com> wrote: > > > On 18/06/2016 06:03, Pranith Kumar wrote: >> Signed-off-by: Pranith Kumar <bobby.pr...@gmail.com> >> --- >> target-i386/translate.c | 4 >> 1 file changed, 4

Re: [Qemu-devel] [RFC v3 PATCH 01/14] Introduce TCGOpcode for memory barrier

Hi Sergey, On Mon, Jun 20, 2016 at 5:21 PM, Sergey Fedorov <serge.f...@gmail.com> wrote: > On 18/06/16 07:03, Pranith Kumar wrote: >> diff --git a/tcg/tcg.h b/tcg/tcg.h >> index db6a062..36feca9 100644 >> --- a/tcg/tcg.h >> +++ b/tcg/tcg.h >> @@ -

Re: [Qemu-devel] [RFC v3 PATCH 14/14] target-i386: Generate fences for x86

On Sat, Jun 18, 2016 at 1:48 AM, Richard Henderson <r...@twiddle.net> wrote: > On 06/17/2016 09:03 PM, Pranith Kumar wrote: >> >> case 0xe8 ... 0xef: /* lfence */ >> +tcg_gen_mb(TCG_MO_LD_LD | TCG_BAR_SC); >> +break; >>

[Qemu-devel] [Bug 1594069] Re: SIMD instructions translated to scalar host instructions

** Changed in: qemu Status: New => Confirmed -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. https://bugs.launchpad.net/bugs/1594069 Title: SIMD instructions translated to scalar host instructions Status in QEMU:

[Qemu-devel] [RFC v3 PATCH 14/14] target-i386: Generate fences for x86

Signed-off-by: Pranith Kumar <bobby.pr...@gmail.com> --- target-i386/translate.c | 4 1 file changed, 4 insertions(+) diff --git a/target-i386/translate.c b/target-i386/translate.c index bf33e6b..32b0f5c 100644 --- a/target-i386/translate.c +++ b/target-i386/translate.c @@ -8012,13 +8

[Qemu-devel] [RFC v3 PATCH 13/14] aarch64: Generate fences for aarch64

Signed-off-by: Pranith Kumar <bobby.pr...@gmail.com> --- target-arm/translate-a64.c | 18 +- 1 file changed, 13 insertions(+), 5 deletions(-) diff --git a/target-arm/translate-a64.c b/target-arm/translate-a64.c index ce8141a..fa24bf2 100644 --- a/target-arm/translate-a64.c

[Qemu-devel] [RFC v3 PATCH 00/14] tcg: Add fence gen support

opcode. Pranith Kumar (14): Introduce TCGOpcode for memory barrier tcg/i386: Add support for fence tcg/aarch64: Add support for fence tcg/arm: Add support for fence tcg/ia64: Add support for fence tcg/mips: Add support for fence tcg/ppc: Add support for fence tcg/s390: Add support

[Qemu-devel] [RFC v3 PATCH 11/14] target-arm: Generate fences in ARMv7 frontend

Signed-off-by: Pranith Kumar <bobby.pr...@gmail.com> Signed-off-by: Richard Henderson <r...@twiddle.net> --- target-arm/translate.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/target-arm/translate.c b/target-arm/translate.c index e525f1e..012e450 100644

[Qemu-devel] [RFC v3 PATCH 10/14] tcg/tci: Add support for fence

Cc: Stefan Weil <s...@weilnetz.de> Signed-off-by: Richard Henderson <r...@twiddle.net> Signed-off-by: Pranith Kumar <bobby.pr...@gmail.com> --- tcg/tci/tcg-target.inc.c | 3 +++ tci.c| 3 +++ 2 files changed, 6 insertions(+) diff --git a/tcg/tci/tcg-target.i

[Qemu-devel] [RFC v3 PATCH 12/14] target-alpha: Generate fence op

Signed-off-by: Richard Henderson <r...@twiddle.net> Signed-off-by: Pranith Kumar <bobby.pr...@gmail.com> --- target-alpha/translate.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/target-alpha/translate.c b/target-alpha/translate.c index 76dab15..f0

[Qemu-devel] [RFC v3 PATCH 03/14] tcg/aarch64: Add support for fence

Cc: Claudio Fontana <claudio.font...@gmail.com> Signed-off-by: Richard Henderson <r...@twiddle.net> Signed-off-by: Pranith Kumar <bobby.pr...@gmail.com> --- tcg/aarch64/tcg-target.inc.c | 25 + 1 file changed, 25 insertions(+) diff --git a/tcg/aarch64/

[Qemu-devel] [RFC v3 PATCH 04/14] tcg/arm: Add support for fence

Cc: Andrzej Zaborowski <balr...@gmail.com> Cc: Peter Maydell <peter.mayd...@linaro.org> Signed-off-by: Pranith Kumar <bobby.pr...@gmail.com> Signed-off-by: Richard Henderson <r...@twiddle.net> --- tcg/arm/tcg-target.inc.c | 18 ++ 1 file changed, 18 inserti

[Qemu-devel] [RFC v3 PATCH 05/14] tcg/ia64: Add support for fence

Cc: Aurelien Jarno <aurel...@aurel32.net> Signed-off-by: Richard Henderson <r...@twiddle.net> Signed-off-by: Pranith Kumar <bobby.pr...@gmail.com> --- tcg/ia64/tcg-target.inc.c | 5 + 1 file changed, 5 insertions(+) diff --git a/tcg/ia64/tcg-target.inc.c b/tcg/ia64/tcg-

[Qemu-devel] [RFC v3 PATCH 08/14] tcg/s390: Add support for fence

Cc: Alexander Graf <ag...@suse.de> Signed-off-by: Richard Henderson <r...@twiddle.net> Signed-off-by: Pranith Kumar <bobby.pr...@gmail.com> --- tcg/s390/tcg-target.inc.c | 9 + 1 file changed, 9 insertions(+) diff --git a/tcg/s390/tcg-target.inc.c b/tcg/s390/tcg-

[Qemu-devel] [RFC v3 PATCH 09/14] tcg/sparc: Add support for fence

Cc: Blue Swirl <blauwir...@gmail.com> Signed-off-by: Richard Henderson <r...@twiddle.net> Signed-off-by: Pranith Kumar <bobby.pr...@gmail.com> --- tcg/sparc/tcg-target.inc.c | 25 + 1 file changed, 25 insertions(+) diff --git a/tcg/sparc/tcg-target.inc

[Qemu-devel] [RFC v3 PATCH 07/14] tcg/ppc: Add support for fence

Signed-off-by: Richard Henderson <r...@twiddle.net> Signed-off-by: Pranith Kumar <bobby.pr...@gmail.com> --- tcg/ppc/tcg-target.inc.c | 24 1 file changed, 24 insertions(+) diff --git a/tcg/ppc/tcg-target.inc.c b/tcg/ppc/tcg-target.inc.c index da10052..76

[Qemu-devel] [RFC v3 PATCH 06/14] tcg/mips: Add support for fence

Signed-off-by: Richard Henderson <r...@twiddle.net> Signed-off-by: Pranith Kumar <bobby.pr...@gmail.com> --- tcg/mips/tcg-target.inc.c | 6 ++ 1 file changed, 6 insertions(+) diff --git a/tcg/mips/tcg-target.inc.c b/tcg/mips/tcg-target.inc.c index 50e98ea..fb6cb3e 100644 --- a/

[Qemu-devel] [RFC v3 PATCH 02/14] tcg/i386: Add support for fence

Generate mfence/sfence/lfence instruction on SSE2 enabled processors. For older processors, generate a 'lock orl $0,0(%esp)' instruction which has full ordering semantics. Signed-off-by: Pranith Kumar <bobby.pr...@gmail.com> [rth: Check for sse2, fallback to locked memory op otherwise.]

[Qemu-devel] [RFC v3 PATCH 01/14] Introduce TCGOpcode for memory barrier

This commit introduces the TCGOpcode for memory barrier instruction. This opcode takes an argument which is the type of memory barrier which should be generated. Signed-off-by: Pranith Kumar <bobby.pr...@gmail.com> Signed-off-by: Richard Henderson <r...@twiddle.net> --- tcg/RE

Re: [Qemu-devel] [PATCH] alpha: Fix build error for linux-user

GET_VIRT_ADDR_SPACE_BITS == addr >> 63); >>> +&& addr >> TARGET_VIRT_ADDR_SPACE_BITS == 1); > > What you want here is > > + addr >> TARGET_VIRT_ADDR_SPACE_BITS == -1 > > since that's what addr >> 63 is. With this change the patch should be fine. Isn't (addr >> 63) supposed to be 1? How can it be -1? -- Pranith

Re: [Qemu-devel] [PATCH] alpha: Fix build error for linux-user

On Fri, Jun 17, 2016 at 2:09 PM, Richard Henderson <r...@twiddle.net> wrote: > On 06/17/2016 11:07 AM, Pranith Kumar wrote: >> On Fri, Jun 17, 2016 at 2:04 PM, Paolo Bonzini <pbonz...@redhat.com> wrote: >>> >>> >>> On 16/06/2016 21:07, Richard Hen

Re: [Qemu-devel] [PATCH] alpha: Fix build error for linux-user

On Thu, Jun 16, 2016 at 8:43 PM, Laurent Vivier <laur...@vivier.eu> wrote: > > > Le 16/06/2016 à 21:15, Pranith Kumar a écrit : >> On Thu, Jun 16, 2016 at 3:07 PM, Richard Henderson <r...@twiddle.net> wrote: >>> On 06/16/2016 11:56 AM, Pranith Kumar wrote: >

Re: [Qemu-devel] [RFC v2 PATCH 03/13] tcg/aarch64: Add support for fence

Hi Richard, On Tue, May 31, 2016 at 4:34 PM, Richard Henderson <r...@twiddle.net> wrote: > On 05/31/2016 11:39 AM, Pranith Kumar wrote: >> >> +/* System instructions. */ >> +DMB_ISH = 0xd5033bbf, > > ... >> >> +case

Re: [Qemu-devel] [PATCH] alpha: Fix build error for linux-user

On Thu, Jun 16, 2016 at 3:07 PM, Richard Henderson <r...@twiddle.net> wrote: > On 06/16/2016 11:56 AM, Pranith Kumar wrote: >> Using gcc 6.1 for alpha-linux-user target we see the following build >> error: >> >> /mnt/devops/code/qemu/target-alpha/translate.c: In

[Qemu-devel] [PATCH] alpha: Fix build error for linux-user

] && addr >> TARGET_VIRT_ADDR_SPACE_BITS == addr >> 63); Fix it by replacing (addr >> 63) by '1' which is what it evaluates to since addr is negative. Signed-off-by: Pranith Kumar <bobby.pr...@gmail.com> --- target-alpha/translate.c | 2 +- 1 file changed, 1 i

[Qemu-devel] Introduces a regression (was: target-arm: Avoid unnecessary TLB flush on TCR_EL2, TCR_EL3 writes)

Hi Peter, On Tue, May 10, 2016 at 6:11 AM, Peter Maydell wrote: > The TCR_EL2 and TCR_EL3 regdefs wer incorrectly using the > vmsa_tcr_el1_write function for writes. Since these registers don't > have the A1 bit that TCR_EL1 does, we don't need to do a tlb_flush() >

Re: [Qemu-devel] [RFC v2 PATCH 01/13] Introduce TCGOpcode for memory barrier

On Mon, Jun 6, 2016 at 3:23 PM, Richard Henderson <r...@twiddle.net> wrote: > On 06/06/2016 10:11 AM, Pranith Kumar wrote: >> >> If I read it correctly TCG_BAR_SYNC is equivalent to OR of all the >> other four barriers. I am not sure if we can just construct SYNC

Re: [Qemu-devel] [RFC v2 PATCH 01/13] Introduce TCGOpcode for memory barrier

On Mon, Jun 6, 2016 at 12:14 PM, Sergey Fedorov <serge.f...@gmail.com> wrote: > On 06/06/16 18:58, Pranith Kumar wrote: >> On Mon, Jun 6, 2016 at 11:49 AM, Sergey Fedorov <serge.f...@gmail.com> wrote: >>> On 06/06/16 18:47, Pranith Kumar wrote: >>>> On Mo

Re: [Qemu-devel] [RFC v2 PATCH 01/13] Introduce TCGOpcode for memory barrier

On Mon, Jun 6, 2016 at 11:44 AM, Sergey Fedorov <serge.f...@gmail.com> wrote: > On 03/06/16 21:27, Pranith Kumar wrote: >> On Thu, Jun 2, 2016 at 5:18 PM, Richard Henderson <r...@twiddle.net> wrote: >>> >>> What if we have tcg_canonicalize_memo

Re: [Qemu-devel] [RFC v2 PATCH 01/13] Introduce TCGOpcode for memory barrier

On Mon, Jun 6, 2016 at 11:49 AM, Sergey Fedorov <serge.f...@gmail.com> wrote: > On 06/06/16 18:47, Pranith Kumar wrote: >> On Mon, Jun 6, 2016 at 11:44 AM, Sergey Fedorov <serge.f...@gmail.com> wrote: >>> On 03/06/16 21:27, Pranith Kumar wrote: >>>&g

Re: [Qemu-devel] [RFC v2 PATCH 11/13] target-arm: Generate fences in ARMv7 frontend

On Thu, Jun 2, 2016 at 3:37 PM, Sergey Fedorov <serge.f...@gmail.com> wrote: > On 31/05/16 21:39, Pranith Kumar wrote: >> Signed-off-by: Pranith Kumar <bobby.pr...@gmail.com> >> Signed-off-by: Richard Henderson <r...@twiddle.net> >> --- >> target-arm/

Re: [Qemu-devel] [RFC v3 00/19] Base enabling patches for MTTCG

sible by Emilio's QHT work which this > is based on. > > The branch can be found at: > > https://github.com/stsquad/qemu/tree/mttcg/base-patches-v3 FYI, I tried booting a debian armv7 image with this branch and it doesn't boot. I'll try to see why it is failing. Thanks, -- Pranith.

Re: [Qemu-devel] [RFC v2 PATCH 01/13] Introduce TCGOpcode for memory barrier

TCG_BAR_LD_LD > qemu_ld_i32 x, y, i, m > mbTCG_BAR_LD_ST > > We can then add an optimization pass which folds barriers with no memory > operations in between, so that duplicates are eliminated. > Yes, folding/eliding these barriers in an optimization pass sounds like a good idea. Thanks, -- Pranith

Re: [Qemu-devel] [RFC v2 PATCH 01/13] Introduce TCGOpcode for memory barrier

ase instructions makes a significant difference in performance when compared to plain dmb+memory instruction sequence. So I would really like to keep the option of generating acq/rel instructions(by combining barrier and memory or some other way) open. Thanks, -- Pranith

Re: [Qemu-devel] [RFC v2 PATCH 01/13] Introduce TCGOpcode for memory barrier

Sergey Fedorov writes: > On 31/05/16 21:39, Pranith Kumar wrote: >> diff --git a/tcg/README b/tcg/README >> index f4a8ac1..cfe79d7 100644 >> --- a/tcg/README >> +++ b/tcg/README >> @@ -402,6 +402,23 @@ double-word product T0. The later is return

Re: [Qemu-devel] [RFC v2 PATCH 02/13] tcg/i386: Add support for fence

e read and write barriers. But we still need to generate 'mfence' to prevent store-after-load reordering. I will refine this in the next version. Thanks, -- Pranith

Re: [Qemu-devel] [RFC v2 PATCH 02/13] tcg/i386: Add support for fence

On Tue, May 31, 2016 at 4:27 PM, Richard Henderson <r...@twiddle.net> wrote: > On 05/31/2016 11:39 AM, Pranith Kumar wrote: >> >> +case INDEX_op_mb: >> +tcg_out_mb(s); > > > You need to look at the barrier type and DTRT. In particular, the Li

Re: [Qemu-devel] [RFC v2 PATCH 01/13] Introduce TCGOpcode for memory barrier

Hi Richard, Thanks for the review. I will make the changes you pointed out. One point below: On Tue, May 31, 2016 at 4:24 PM, Richard Henderson <r...@twiddle.net> wrote: > On 05/31/2016 11:39 AM, Pranith Kumar wrote: >> +/* TCGOpmb args */ >> +#define TCG_MB_FULL

[Qemu-devel] [RFC v2 PATCH 03/13] tcg/aarch64: Add support for fence

Cc: Claudio Fontana <claudio.font...@gmail.com> Signed-off-by: Richard Henderson <r...@twiddle.net> Signed-off-by: Pranith Kumar <bobby.pr...@gmail.com> --- tcg/aarch64/tcg-target.inc.c | 7 +++ 1 file changed, 7 insertions(+) diff --git a/tcg/aarch64/tcg-target.inc.c

[Qemu-devel] [RFC v2 PATCH 10/13] tcg/tci: Add support for fence

Cc: Stefan Weil <s...@weilnetz.de> Signed-off-by: Richard Henderson <r...@twiddle.net> Signed-off-by: Pranith Kumar <bobby.pr...@gmail.com> --- tcg/tci/tcg-target.inc.c | 3 +++ tci.c| 3 +++ 2 files changed, 6 insertions(+) diff --git a/tcg/tci/tcg-target.i

[Qemu-devel] [RFC v2 PATCH 08/13] tcg/s390: Add support for fence

Cc: Alexander Graf <ag...@suse.de> Signed-off-by: Richard Henderson <r...@twiddle.net> Signed-off-by: Pranith Kumar <bobby.pr...@gmail.com> --- tcg/s390/tcg-target.inc.c | 9 + 1 file changed, 9 insertions(+) diff --git a/tcg/s390/tcg-target.inc.c b/tcg/s390/tcg-

[Qemu-devel] [RFC v2 PATCH 09/13] tcg/sparc: Add support for fence

Cc: Blue Swirl <blauwir...@gmail.com> Signed-off-by: Richard Henderson <r...@twiddle.net> Signed-off-by: Pranith Kumar <bobby.pr...@gmail.com> --- tcg/sparc/tcg-target.inc.c | 8 1 file changed, 8 insertions(+) diff --git a/tcg/sparc/tcg-target.inc.c b/tcg/sparc/tcg-

Re: [Qemu-devel] [RFC v2 PATCH 00/13] tcg: Add fence gen support

Added correct email for Sergey in CC. I apologize for getting Sergey's email wrong. Please drop/correct his email when replying to the patches in this series otherwise you will see an email bounce. On Tue, May 31, 2016 at 2:39 PM, Pranith Kumar <bobby.pr...@gmail.com> wrote: &

[Qemu-devel] [RFC v2 PATCH 12/13] target-alpha: Generate fence op

Signed-off-by: Richard Henderson <r...@twiddle.net> Signed-off-by: Pranith Kumar <bobby.pr...@gmail.com> --- target-alpha/translate.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/target-alpha/translate.c b/target-alpha/translate.c index 5b86992..17

[Qemu-devel] [RFC v2 PATCH 02/13] tcg/i386: Add support for fence

Generate mfence instruction on SSE2 enabled processors. For older processors, generate a 'lock orl $0,0(%esp)' instruction which has similar ordering semantics. Signed-off-by: Pranith Kumar <bobby.pr...@gmail.com> [rth: Check for sse2, fallback to locked memory op otherwise.] Sign

[Qemu-devel] [RFC v2 PATCH 04/13] tcg/arm: Add support for fence

Cc: Andrzej Zaborowski <balr...@gmail.com> Cc: Peter Maydell <peter.mayd...@linaro.org> Signed-off-by: Pranith Kumar <bobby.pr...@gmail.com> Signed-off-by: Richard Henderson <r...@twiddle.net> --- tcg/arm/tcg-target.inc.c | 12 1 file changed, 12 insertions(

[Qemu-devel] [RFC v2 PATCH 01/13] Introduce TCGOpcode for memory barrier

This commit introduces the TCGOpcode for memory barrier instruction. This opcode takes an argument which is the type of memory barrier which should be generated. Signed-off-by: Pranith Kumar <bobby.pr...@gmail.com> Signed-off-by: Richard Henderson <r...@twiddle.net> --- tcg/RE

[Qemu-devel] [RFC v2 PATCH 11/13] target-arm: Generate fences in ARMv7 frontend

Signed-off-by: Pranith Kumar <bobby.pr...@gmail.com> Signed-off-by: Richard Henderson <r...@twiddle.net> --- target-arm/translate.c | 7 +-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/target-arm/translate.c b/target-arm/translate.c index c946c0e..e1b16c0 100644

[Qemu-devel] [RFC v2 PATCH 05/13] tcg/ia64: Add support for fence

Cc: Aurelien Jarno <aurel...@aurel32.net> Signed-off-by: Richard Henderson <r...@twiddle.net> Signed-off-by: Pranith Kumar <bobby.pr...@gmail.com> --- tcg/ia64/tcg-target.inc.c | 5 + 1 file changed, 5 insertions(+) diff --git a/tcg/ia64/tcg-target.inc.c b/tcg/ia64/tcg-

[Qemu-devel] [RFC v2 PATCH 13/13] tcg: Generate fences only for SMP MTTCG guests

We need to generate fence instructions only for SMP MTTCG guests. This patch enforces that. Signed-off-by: Pranith Kumar <bobby.pr...@gmail.com> --- tcg/tcg-op.c | 7 +-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/tcg/tcg-op.c b/tcg/tcg-op.c index a6f01a7..eeb0d0c

[Qemu-devel] [RFC v2 PATCH 00/13] tcg: Add fence gen support

Hello, The following series adds fence instruction generation support to TCG. The current work has been rebased on-top of Richard's patch series. This has been tested and confirmed to fix ordering issues on a x86 host with MTTCG enabled ARMv7 guest using KVM unit tests. Pranith Kumar (13

[Qemu-devel] [RFC v2 PATCH 06/13] tcg/mips: Add support for fence

Signed-off-by: Richard Henderson <r...@twiddle.net> Signed-off-by: Pranith Kumar <bobby.pr...@gmail.com> --- tcg/mips/tcg-target.inc.c | 6 ++ 1 file changed, 6 insertions(+) diff --git a/tcg/mips/tcg-target.inc.c b/tcg/mips/tcg-target.inc.c index b2a839a..fc9c7fb 100644 --- a/

[Qemu-devel] [RFC v2 PATCH 07/13] tcg/ppc: Add support for fence

Signed-off-by: Richard Henderson <r...@twiddle.net> Signed-off-by: Pranith Kumar <bobby.pr...@gmail.com> --- tcg/ppc/tcg-target.inc.c | 8 1 file changed, 8 insertions(+) diff --git a/tcg/ppc/tcg-target.inc.c b/tcg/ppc/tcg-target.inc.c index 1039407..45a667f 100644 --- a

Re: [Qemu-devel] [RFC 01/10] exec: Introduce tcg_exclusive_{lock, unlock}()

false. From what I can see, a thread should either take the exclusive lock or wait spinning for it in lock(). So unlock() should always see cpu_have_exclusive_lock as true. It is a good place to find locking bugs. -- Pranith

Re: [Qemu-devel] [PATCH v2 10/12] tcg/tci: Add support for fence

t; > A bit of bike-shedding. While there's no common ISA term for "memory > barrier" (also known as a "membar", "memory fence", etc.), we already > refer to it as a "memory barrier" (or "mb") in include/qemu/atomic.h and > docs/atomics.txt. Why don't be consistent and avoid introducing yet > another term for the same thing? > Fair point. Do you think tcg_out_mb() is better then? Thanks, -- Pranith

Re: [Qemu-devel] [PATCH v2 01/12] Introduce TCGOpcode for fence instruction

I have a version with this fixed. I will post my patches(v3) with this changed. Thanks, -- Pranith

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