Re: [Qemu-devel] [PATCH RFC v2 2/9] hw/pci: add pci wrappers for allocating and asserting irqs

2013-10-02 Thread Marcel Apfelbaum
On Wed, 2013-10-02 at 17:21 +0200, Paolo Bonzini wrote: > Il 02/10/2013 14:41, Marcel Apfelbaum ha scritto: > > +static inline void pci_irq_pulse(PCIDevice *pci_dev) > > +{ > > +pci_irq_lower(pci_dev); > > +pci_irq_raise(pci_dev); > > +} > > + > > Why is this in the opposite order, compare

Re: [Qemu-devel] [PATCH RFC v2 2/9] hw/pci: add pci wrappers for allocating and asserting irqs

2013-10-02 Thread Paolo Bonzini
Il 02/10/2013 14:41, Marcel Apfelbaum ha scritto: > +static inline void pci_irq_pulse(PCIDevice *pci_dev) > +{ > +pci_irq_lower(pci_dev); > +pci_irq_raise(pci_dev); > +} > + Why is this in the opposite order, compared to qemu_irq_pulse? Paolo

Re: [Qemu-devel] [PATCH RFC v2 2/9] hw/pci: add pci wrappers for allocating and asserting irqs

2013-10-02 Thread Marcel Apfelbaum
On Wed, 2013-10-02 at 15:54 +0300, Michael S. Tsirkin wrote: > On Wed, Oct 02, 2013 at 03:41:27PM +0300, Marcel Apfelbaum wrote: > > Interrupt pin is selected and saved into PCI_INTERRUPT_PIN > > register during device initialization. Devices should not call > > directly qemu_set_irq and specify th

Re: [Qemu-devel] [PATCH RFC v2 2/9] hw/pci: add pci wrappers for allocating and asserting irqs

2013-10-02 Thread Michael S. Tsirkin
On Wed, Oct 02, 2013 at 03:41:27PM +0300, Marcel Apfelbaum wrote: > Interrupt pin is selected and saved into PCI_INTERRUPT_PIN > register during device initialization. Devices should not call > directly qemu_set_irq and specify the INTx pin on each call. > > Added pci_* wrappers to replace qemu_se

[Qemu-devel] [PATCH RFC v2 2/9] hw/pci: add pci wrappers for allocating and asserting irqs

2013-10-02 Thread Marcel Apfelbaum
Interrupt pin is selected and saved into PCI_INTERRUPT_PIN register during device initialization. Devices should not call directly qemu_set_irq and specify the INTx pin on each call. Added pci_* wrappers to replace qemu_set_irq, qemu_irq_raise, qemu_irq_lower and qemu_irq_pulse, setting the irq ba