Re: [Qemu-devel] [PATCH v5 2/8] target/mips: Support R5900 specific three-operand MULT and MULTU

2018-09-28 Thread Maciej W. Rozycki
On Fri, 28 Sep 2018, Philippe Mathieu-Daudé wrote: > > What's wrong with `gen_mul_r5900' anyway? > > I plan to use this function (adding MADD/MADDU) for R3900 based cores > (which don't seemt related to Emotion Engine). Fair enough. I reached for documentation and these instructions seem to

Re: [Qemu-devel] [PATCH v5 2/8] target/mips: Support R5900 specific three-operand MULT and MULTU

2018-09-28 Thread Philippe Mathieu-Daudé
On Fri, Sep 28, 2018 at 5:59 PM Maciej W. Rozycki wrote: > > On Fri, 28 Sep 2018, Philippe Mathieu-Daudé wrote: > > > > > Note, these instructions are also valid on the R3900 (which also has > > > > MADD/MADDU). > > > > > > > > Would gen_mul_toshiba() be a better common name? I don't like it but >

Re: [Qemu-devel] [PATCH v5 2/8] target/mips: Support R5900 specific three-operand MULT and MULTU

2018-09-28 Thread Maciej W. Rozycki
On Fri, 28 Sep 2018, Philippe Mathieu-Daudé wrote: > > > Note, these instructions are also valid on the R3900 (which also has > > > MADD/MADDU). > > > > > > Would gen_mul_toshiba() be a better common name? I don't like it but > > > can't think of another. > > > > I propose gen_mul_3op, since its d

Re: [Qemu-devel] [PATCH v5 2/8] target/mips: Support R5900 specific three-operand MULT and MULTU

2018-09-28 Thread Philippe Mathieu-Daudé
On Fri, Sep 28, 2018 at 5:16 PM Fredrik Noring wrote: > > Hi Philippe, > > > Can you copy/paste some info regarding those instructions from the ISA > > here, to note how they differ? ... > > Yes. Other corresponding functions typically do not seem to have such ISA > notes, but I can certainly writ

Re: [Qemu-devel] [PATCH v5 2/8] target/mips: Support R5900 specific three-operand MULT and MULTU

2018-09-28 Thread Fredrik Noring
Hi Philippe, > Can you copy/paste some info regarding those instructions from the ISA > here, to note how they differ? ... Yes. Other corresponding functions typically do not seem to have such ISA notes, but I can certainly write one for it. > Since we have acc = 0 we can directly use cpu_LO[0]

Re: [Qemu-devel] [PATCH v5 2/8] target/mips: Support R5900 specific three-operand MULT and MULTU

2018-09-26 Thread Maciej W. Rozycki
On Thu, 27 Sep 2018, Philippe Mathieu-Daudé wrote: > > +static void gen_mul_r5900(DisasContext *ctx, uint32_t opc, > > + int acc, int rd, int rs, int rt) > > Since we have acc = 0 we can directly use cpu_LO[0] and cpu_HI[0], > removing needs for an 'acc' argument. Corre

Re: [Qemu-devel] [PATCH v5 2/8] target/mips: Support R5900 specific three-operand MULT and MULTU

2018-09-26 Thread Philippe Mathieu-Daudé
On 9/15/18 11:25 AM, Fredrik Noring wrote: Can you copy/paste some info regarding those instructions from the ISA here, to note how they differ? ... > Signed-off-by: Fredrik Noring > --- > target/mips/translate.c | 53 > + > 1 file changed, 53 in

Re: [Qemu-devel] [PATCH v5 2/8] target/mips: Support R5900 specific three-operand MULT and MULTU

2018-09-26 Thread Philippe Mathieu-Daudé
On 9/26/18 11:59 PM, Philippe Mathieu-Daudé wrote: > On 9/25/18 2:20 PM, Philippe Mathieu-Daudé wrote: >> Hi Fredrik, >> >> On 9/15/18 11:25 AM, Fredrik Noring wrote: >>> Signed-off-by: Fredrik Noring >>> --- >>> target/mips/translate.c | 53 >>> +

Re: [Qemu-devel] [PATCH v5 2/8] target/mips: Support R5900 specific three-operand MULT and MULTU

2018-09-26 Thread Philippe Mathieu-Daudé
On 9/25/18 2:20 PM, Philippe Mathieu-Daudé wrote: > Hi Fredrik, > > On 9/15/18 11:25 AM, Fredrik Noring wrote: >> Signed-off-by: Fredrik Noring >> --- >> target/mips/translate.c | 53 >> + >> 1 file changed, 53 insertions(+) >> >> diff --git a/tar

Re: [Qemu-devel] [PATCH v5 2/8] target/mips: Support R5900 specific three-operand MULT and MULTU

2018-09-25 Thread Philippe Mathieu-Daudé
Hi Fredrik, On 9/15/18 11:25 AM, Fredrik Noring wrote: > Signed-off-by: Fredrik Noring > --- > target/mips/translate.c | 53 > + > 1 file changed, 53 insertions(+) > > diff --git a/target/mips/translate.c b/target/mips/translate.c > index ab16cdb

[Qemu-devel] [PATCH v5 2/8] target/mips: Support R5900 specific three-operand MULT and MULTU

2018-09-19 Thread Fredrik Noring
Signed-off-by: Fredrik Noring --- target/mips/translate.c | 53 + 1 file changed, 53 insertions(+) diff --git a/target/mips/translate.c b/target/mips/translate.c index ab16cdb911..fb571e278e 100644 --- a/target/mips/translate.c +++ b/target/mips/tr