Re: [PATCH] memory: Make 'info mtree' not display disabled regions by default

On Fri, May 29, 2020 at 02:53:25PM +0200, Philippe Mathieu-Daudé wrote: > @@ -2920,35 +2916,46 @@ static void mtree_print_mr(const MemoryRegion *mr, > unsigned int level, > ml->mr = mr->alias; > QTAILQ_INSERT_TAIL(alias_print_queue, ml, mrqueue); > } > -

Re: [PATCH] memory: Make 'info mtree' not display disabled regions by default

On 29/05/20 16:34, Peter Xu wrote: > On Fri, May 29, 2020 at 02:53:25PM +0200, Philippe Mathieu-Daudé wrote: >> @@ -2920,35 +2916,46 @@ static void mtree_print_mr(const MemoryRegion *mr, >> unsigned int level, >> ml->mr = mr->alias; >>

Re: [PATCH v7 32/32] iotests: Add tests for qcow2 images with extended L2 entries

On Wed 27 May 2020 08:30:06 PM CEST, Eric Blake wrote: >> +offset=$(($offset + 8)) >> +bitmap=`peek_file_be "$TEST_IMG" $offset 8` >> + >> +expected_bitmap=0 >> +for bit in $expected_alloc; do >> +expected_bitmap=$(($expected_bitmap | (1 << $bit))) >> +done >> +for

Re: [PATCH] virtio-pci: fix queue_enable write

On Fri, May 29, 2020 at 11:07:28AM +0800, Jason Wang wrote: > Spec said: The driver uses this to selectively prevent the device from > executing requests from this virtqueue. 1 - enabled; 0 - disabled. > > Though write 0 to queue_enable is forbidden by the sepc, we should not > assume that the

[PATCH 3/3] numa: Initialize node initiator with respect to .has_cpu

The initiator attribute of a NUMA node is documented as the 'NUMA node that has best performance to given NUMA node'. If a NUMA node has at least one CPU there can hardly be a different node with better performace and thus all NUMA nodes which have a CPU are initiators to themselves. Reflect this

[PATCH 0/3] Couple of HMAT fixes

I've started working on libvirt side of this feature. WIP patches can be found here: https://github.com/zippy2/libvirt/commits/hmat I've gotten to a point where libvirt generates cmd line but QEMU refuses it. Problem is that I was looking into qemu-options.hx instead of qapi/machine.json and

[PATCH 2/3] numa: Allow HMAT cache to be defined before HMAT latency/bandwidth

Currently, when defining a HMAT cache for a NUMA node (in parse_numa_hmat_cache()) there is this check that forces users to define HMAT latency/bandwidth first. There is no real need for this, because nothing in the parse function relies on that and the HMAT table is constructed way later - when

[PATCH v2 19/58] isa: Convert uses of isa_create() with Coccinelle

Replace dev = isa_create(bus, type_name); ... qdev_init_nofail(dev); by dev = isa_new(type_name); ... isa_realize_and_unref(dev, bus, _fatal); Recent commit "qdev: New qdev_new(), qdev_realize(), etc." explains why. Coccinelle script: @@ expression dev, bus,

[PATCH v2 25/58] ssi: ssi_create_slave_no_init() is now unused, drop

Cc: Alistair Francis Signed-off-by: Markus Armbruster Reviewed-by: Alistair Francis --- include/hw/ssi/ssi.h | 1 - hw/ssi/ssi.c | 5 - 2 files changed, 6 deletions(-) diff --git a/include/hw/ssi/ssi.h b/include/hw/ssi/ssi.h index 1725b13c32..93f2b8b0be 100644 ---

[PATCH v2 39/58] sysbus: Drop useless OBJECT() in sysbus_init_child_obj() calls

OBJECT(child) expands to ((Object *)(child)). sysbus_init_child_obj() parameter @child is void *. Pass child instead of OBJECT(child). Signed-off-by: Markus Armbruster Reviewed-by: Philippe Mathieu-Daudé --- hw/arm/allwinner-a10.c | 4 ++-- hw/arm/aspeed_ast2600.c | 40

[PATCH v2 22/58] ssi: ssi_auto_connect_slaves() never does anything, drop

ssi_auto_connect_slaves(parent, cs_line, bus) iterates over @parent's QOM children @dev of type TYPE_SSI_SLAVE. It puts these on @bus, and sets cs_line[] to qdev_get_gpio_in_named(dev, SSI_GPIO_CS, 0). Suspicious: there is no protection against overrunning cs_line[]. Turns out it's safe because

[PATCH v2 12/58] qdev: Convert uses of qdev_set_parent_bus() manually

Same transformation as in the previous commit. Manual, because convincing Coccinelle to transform these cases is somewhere between not worthwhile and infeasible (at least for me). Signed-off-by: Markus Armbruster --- hw/pci-host/prep.c | 3 +-- hw/ppc/pnv.c | 6 ++ hw/s390x/sclp.c

[PATCH v2 38/58] macio: Eliminate macio_init_child_obj()

macio_init_child_obj() has become a trivial wrapper around object_initialize_child_with_props(). Eliminate it, since the general convenience wrapper object_initialize_child() is just as convenient already. Cc: Mark Cave-Ayland Cc: David Gibson Signed-off-by: Markus Armbruster ---

[PATCH v2 37/58] macio: Convert use of qdev_set_parent_bus()

Convert qdev_set_parent_bus()/realize to qdev_realize(); recent commit "qdev: New qdev_new(), qdev_realize(), etc." explains why. Cc: Mark Cave-Ayland Cc: David Gibson Signed-off-by: Markus Armbruster --- hw/misc/macio/macio.c | 13 ++--- 1 file changed, 6 insertions(+), 7

[PATCH v2 23/58] ssi: Convert uses of ssi_create_slave_no_init() with Coccinelle

Replace dev = ssi_create_slave_no_init(bus, type_name); ... qdev_init_nofail(dev); by dev = qdev_new(type_name); ... qdev_realize_and_unref(dev, bus, _fatal); Recent commit "qdev: New qdev_new(), qdev_realize(), etc." explains why. @@ type SSIBus;

[PATCH v2 50/58] sysbus: Convert qdev_set_parent_bus() use with Coccinelle, part 4

This is still the same transformation as in the previous commits, but here the sysbus_init_child_obj() and its matching realize in are in separate files. Fortunately, there's just one realize left to convert. Signed-off-by: Markus Armbruster --- hw/arm/aspeed_ast2600.c | 9 -

[PATCH v2 56/58] qdev: Convert bus-less devices to qdev_realize() with Coccinelle

All remaining conversions to qdev_realize() are for bus-less devices. Coccinelle script: // only correct for bus-less @dev! @@ expression errp; expression dev; @@ -qdev_init_nofail(dev); +qdev_realize(dev, NULL, _fatal); @ depends on !(file in

Re: [PATCH v2 00/58] qdev: Rework how we plug into the parent bus

Markus Armbruster writes: > Paolo recently suggested "to move the bus argument (and thus > qdev_set_parent_bus) to qdev_init"[1], and that it "would be quite > large but hopefully scriptable"[2]. Nerd sniped! > > The series is big, but at least the bigger patches are all mechanical. > > It is

[PATCH v2 58/58] MAINTAINERS: Make section QOM cover hw/core/*bus.c as well

Signed-off-by: Markus Armbruster --- MAINTAINERS | 2 ++ 1 file changed, 2 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index bb9861f33b..e6957dac1a 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2279,6 +2279,8 @@ R: Eduardo Habkost S: Supported F: docs/qdev-device-use.txt F:

Re: [Libguestfs] Provide NBD via Browser over Websockets

On 5/29/20 8:50 AM, Daniel P. Berrangé wrote: (2) You need to persuade qemu's NBD client to read from a WebSocket. I didn't really know anything about WebSockets until today but it seems as if they are a full-duplex protocol layered on top of HTTP [a]. Is there a WebSocket proxy that turns WS

[RFC v3 2/8] vhost_net: use the function qemu_get_peer

user the qemu_get_peer to replace the old process Signed-off-by: Cindy Lu --- hw/net/vhost_net.c | 14 +- 1 file changed, 9 insertions(+), 5 deletions(-) diff --git a/hw/net/vhost_net.c b/hw/net/vhost_net.c index 6b82803fa7..d1d421e3d9 100644 --- a/hw/net/vhost_net.c +++

[RFC v3 5/8] vhost: introduce vhost_set_vring_ready method

From: Jason Wang Vhost-vdpa introduces VHOST_VDPA_SET_VRING_ENABLE which complies the semantic of queue_enable defined in virtio spec. This method can be used for preventing device from executing request for a specific virtqueue. This patch introduces the vhost_ops for this. Note that, we've

[RFC v3 4/8] virtio-pci: implement queue_enabled method

From: Jason Wang With version 1, we can detect whether a queue is enabled via queue_enabled. Signed-off-by: Jason Wang --- hw/virtio/virtio-pci.c | 13 + 1 file changed, 13 insertions(+) diff --git a/hw/virtio/virtio-pci.c b/hw/virtio/virtio-pci.c index 4cb784389c..2c82ed5246

Re: [PATCH v7 32/32] iotests: Add tests for qcow2 images with extended L2 entries

On 5/29/20 10:07 AM, Alberto Garcia wrote: On Wed 27 May 2020 08:30:06 PM CEST, Eric Blake wrote: +offset=$(($offset + 8)) +bitmap=`peek_file_be "$TEST_IMG" $offset 8` + +expected_bitmap=0 +for bit in $expected_alloc; do +expected_bitmap=$(($expected_bitmap | (1 <<

Re: [PATCH 3/3] numa: Initialize node initiator with respect to .has_cpu

On 5/29/20 5:09 PM, Igor Mammedov wrote: On Fri, 29 May 2020 15:33:48 +0200 Michal Privoznik wrote: The initiator attribute of a NUMA node is documented as the 'NUMA node that has best performance to given NUMA node'. If a NUMA node has at least one CPU there can hardly be a different node

Re: [PATCH 5/5] virtio: enable VIRTIO_F_RING_PACKED for all devices

On Fri, May 29, 2020 at 03:15:59PM +0800, Jason Wang wrote: > > On 2020/5/23 上午1:17, Stefan Hajnoczi wrote: > > The packed virtqueue layout was introduced in VIRTIO 1.1. It is a single > > ring instead of a split avail/used ring design. There are CPU cache > > advantages to this layout and it is

RE: [Bug 1881231] Re: colo: Can not recover colo after svm failover twice

Hi Ye, Thank you for your test and report, I will try to fix this issue. Thanks Zhang Chen > -Original Message- > From: Qemu-devel bounces+chen.zhang=intel@nongnu.org> On Behalf Of ye.zou > Sent: Friday, May 29, 2020 5:47 PM > To: qemu-devel@nongnu.org > Subject: [Bug 1881231] Re:

Re: [PATCH v7 28/32] qcow2: Add subcluster support to qcow2_co_pwrite_zeroes()

On Thu 28 May 2020 09:11:07 PM CEST, Eric Blake wrote: >> I think the problem also exists in the current code (without my >> patches). If you zeroize 10 clusters and the last one is compressed >> you have to repeat the request after having zeroized 9 clusters. > > Hmm. In the pre-patch code,

[PATCH] libvhost-user: advertise vring features

libvhost-user implements several vring features without advertising them. There is no way for the vhost-user master to detect support for these features. Things more or less work today because QEMU assumes the vhost-user backend always implements certain feature bits like VIRTIO_RING_F_EVENT_IDX.

Re: [PATCH] or1k: Fix compilation hiccup

On 2020-05-26 at 20:51 CEST, Eric Blake wrote... > On my Fedora 32 machine, gcc 10.1.1 at -O2 (the default for a bare > './configure') has a false-positive complaint: > > CC or1k-softmmu/hw/openrisc/openrisc_sim.o > /home/eblake/qemu/hw/openrisc/openrisc_sim.c: In function

Re: [PULL 00/21] Vga 20200528 patches

On Fri, 29 May 2020 at 17:15, Philippe Mathieu-Daudé wrote: > On 5/29/20 12:29 PM, Peter Maydell wrote: > > Could somebody send a followup patch to fix the indentation > > error checkpatch notices, please? > > If this is part of your scripts, this is a nice feature :) No, I just noticed the

Re: [PATCH 2/3] numa: Allow HMAT cache to be defined before HMAT latency/bandwidth

On 5/29/20 4:59 PM, Igor Mammedov wrote: On Fri, 29 May 2020 15:33:47 +0200 Michal Privoznik wrote: Currently, when defining a HMAT cache for a NUMA node (in parse_numa_hmat_cache()) there is this check that forces users to define HMAT latency/bandwidth first. There is no real need for this,

Re: [PATCH v3 1/2] PCI: vmd: Filter resource type bits from shadow register

On Fri, 2020-05-29 at 11:33 +0100, Lorenzo Pieralisi wrote: > On Wed, May 27, 2020 at 11:02:39PM -0400, Jon Derrick wrote: > > Versions of VMD with the Host Physical Address shadow register use this > > register to calculate the bus address offset needed to do guest > > passthrough of the domain.

Re: [PULL 00/21] Vga 20200528 patches

Hi Peter, On 5/29/20 12:29 PM, Peter Maydell wrote: > On Thu, 28 May 2020 at 13:36, Gerd Hoffmann wrote: >> >> The following changes since commit 06539ebc76b8625587aa78d646a9d8d5fddf84f3: >> >> Merge remote-tracking branch >> 'remotes/philmd-gitlab/tags/mips-hw-next-20200526' into staging

Re: [PULL 00/21] Vga 20200528 patches

On 5/29/20 6:36 PM, Peter Maydell wrote: > On Fri, 29 May 2020 at 17:15, Philippe Mathieu-Daudé wrote: >> On 5/29/20 12:29 PM, Peter Maydell wrote: >>> Could somebody send a followup patch to fix the indentation >>> error checkpatch notices, please? >> >> If this is part of your scripts, this is

Re: [PATCH 3/3] numa: Initialize node initiator with respect to .has_cpu

On Fri, 29 May 2020 15:33:48 +0200 Michal Privoznik wrote: > The initiator attribute of a NUMA node is documented as the 'NUMA > node that has best performance to given NUMA node'. If a NUMA > node has at least one CPU there can hardly be a different node > with better performace and thus all

Re: [PATCH 2/5] vhost: involve device backends in feature negotiation

On Wed, May 27, 2020 at 04:28:41PM +0200, Marc-André Lureau wrote: > Hi Stefan > > On Fri, May 22, 2020 at 7:18 PM Stefan Hajnoczi wrote: > > > > Many vhost devices in QEMU currently do not involve the device backend > > in feature negotiation. This seems fine at first glance for device types >

RE: Re:RE: GDB get wrong debug infos on TI DSP architecture extension

To figure out which register gdb is complaining about, you could step through the code in gdb or selectively remove parts of the xml file until the error goes away. The unaligned start address sounds like a problem with the executable you are trying to debug, not qemu or gdb. Taylor From:

Re: [PATCH 1/3] qapi: Make @associativity, @policy and @line of NumaHmatCacheOptions optional

On Fri, 29 May 2020 15:33:46 +0200 Michal Privoznik wrote: > The documentation to `-numa hmat-cache` says that @node-id, @size > and @level are the only required attributes. The rest > (@associativity, @policy and @line) is optional. Well, not quite > - if I try to start QEMU with only the three

Re: [PATCH v3 1/2] PCI: vmd: Filter resource type bits from shadow register

On Fri, May 29, 2020 at 03:53:37PM +, Derrick, Jonathan wrote: > On Fri, 2020-05-29 at 11:33 +0100, Lorenzo Pieralisi wrote: > > On Wed, May 27, 2020 at 11:02:39PM -0400, Jon Derrick wrote: > > > Versions of VMD with the Host Physical Address shadow register use this > > > register to

Re: [PATCH] or1k: Fix compilation hiccup

On Fri, 29 May 2020 at 17:23, Christophe de Dinechin wrote: > On 2020-05-26 at 20:51 CEST, Eric Blake wrote... > > diff --git a/hw/openrisc/openrisc_sim.c b/hw/openrisc/openrisc_sim.c > > index d08ce6181199..95011a8015b4 100644 > > --- a/hw/openrisc/openrisc_sim.c > > +++

Re: [PATCH 1/2] sev: add sev-inject-launch-secret

On 2020-05-28 17:00, James Bottomley wrote: On Thu, 2020-05-28 at 16:51 -0400, Tobin Feldman-Fitzthum wrote: --- a/qapi/misc-target.json +++ b/qapi/misc-target.json @@ -200,6 +200,26 @@ { 'command': 'query-sev-capabilities', 'returns': 'SevCapability', 'if': 'defined(TARGET_I386)' } +## +#

Re: [PULL 00/12] testing and plugin fixes

On Wed, 27 May 2020 at 15:54, Alex Bennée wrote: > > The following changes since commit ddc760832fa8cf5e93b9d9e6e854a5114ac63510: > > Merge remote-tracking branch 'remotes/gkurz/tags/9p-next-2020-05-26' into > staging (2020-05-26 14:05:53 +0100) > > are available in the Git repository at: > >

Re: [PATCH 0/2] HMP: qom-get and set

* Dr. David Alan Gilbert (git) (dgilb...@redhat.com) wrote: > From: "Dr. David Alan Gilbert" > > HMP has had a qom-set for a long time, but not a matching qom-get; > various attempts have been made to add one over the last 5 years. > Here's another go. > > It's got simpler due to a suggestion

[PATCH] hw/display/cirrus_vga: Fix code mis-indentation

While replacing fprintf() by qemu_log_mask() in commit 2b55f4d3504, we incorrectly used a 'tab = 4 spaces' alignment, leading to misindented new code. Fix now. Reported-by: Peter Maydell Signed-off-by: Philippe Mathieu-Daudé --- hw/display/cirrus_vga.c | 6 +++--- 1 file changed, 3

[PATCH v2 2/2] fuzz: Add support for logging QTest commands

Signed-off-by: Alexander Bulekov --- tests/qtest/fuzz/fuzz.c | 8 1 file changed, 8 insertions(+) diff --git a/tests/qtest/fuzz/fuzz.c b/tests/qtest/fuzz/fuzz.c index cf76a6636f..4842fbe7c7 100644 --- a/tests/qtest/fuzz/fuzz.c +++ b/tests/qtest/fuzz/fuzz.c @@ -95,6 +95,9 @@ static void

Re: [PATCH 1/2] sev: add sev-inject-launch-secret

On 2020-05-28 17:42, Eric Blake wrote: On 5/28/20 3:51 PM, Tobin Feldman-Fitzthum wrote: From: Tobin Feldman-Fitzthum AMD SEV allows a guest owner to inject a secret blob into the memory of a virtual machine. The secret is encrypted with the SEV Transport Encryption Key and integrity is

[PATCH 1/2] fuzz: skip QTest serialization

The QTest server usually parses ASCII commands from clients. Since we fuzz within the QEMU process, skip the QTest serialization and server for most QTest commands. Leave the option to use the ASCII protocol, to generate readable traces for crash reproducers. Inspired-by: Philippe Mathieu-Daudé

[PATCH 2/2] fuzz: Add support for logging QTest commands

Signed-off-by: Alexander Bulekov --- tests/qtest/fuzz/fuzz.c | 9 - 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/tests/qtest/fuzz/fuzz.c b/tests/qtest/fuzz/fuzz.c index ea630ddb9b..2c9e2ee7b7 100644 --- a/tests/qtest/fuzz/fuzz.c +++ b/tests/qtest/fuzz/fuzz.c @@ -94,7

Re: [PULL 0/5] Qcrypto next patches

On Fri, May 29, 2020 at 11:35:50AM +0100, Daniel P. Berrangé wrote: > The following changes since commit b8bee16e94df0fcd03bdad9969c30894418b0e6e: > > Merge remote-tracking branch 'remotes/kraxel/tags/vga-20200528-pull-request= > ' into staging (2020-05-28 18:13:20 +0100) > > are available in

[PATCH 0/2] fuzz: Skip QTest serialization

In the same vein as Philippe's patch: https://patchew.org/QEMU/20200528165303.1877-1-f4...@amsat.org/ This uses linker trickery to wrap calls to libqtest functions and directly call the corresponding read/write functions, rather than relying on the ASCII-serialized QTest protocol. Alexander

Re: [PATCH 1/2] migration/rdma: fix potential nullptr access in rdma_start_incoming_migration

* Juan Quintela (quint...@redhat.com) wrote: > Pan Nengyuan wrote: > > 'rdma' is NULL when taking the first error branch in > > rdma_start_incoming_migration. > > And it will cause a null pointer access in label 'err'. Fix that. > > > > Fixes: 59c59c67ee6b0327ae932deb303caa47919aeb1e > >

Re: [PATCH 2/2] migration/rdma: cleanup rdma context before g_free to avoid memleaks

* Pan Nengyuan (pannengy...@huawei.com) wrote: > When error happen in initializing 'rdma_return_path', we should cleanup rdma > context > before g_free(rdma) to avoid some memleaks. This patch fix that. > > Reported-by: Euler Robot > Signed-off-by: Pan Nengyuan Queued. > --- >

ia-32/ia-64 fxsave64 instruction behavior when saving mmx

Background: The ia-32/ia-64 fxsave64 instruction saves fp80 or legacy SSE mmx registers. The mmx registers are saved as if they were fp80 values. The lower 64 bits of the constructed fp80 value is the mmx register. The upper 16 bits of the constructed fp80 value are reserved; see the last row

Re: [PATCH Kernel v22 0/8] Add UAPIs to support migration for VFIO devices

On 5/29/2020 4:29 AM, Alex Williamson wrote: On Wed, 27 May 2020 09:48:22 +0100 "Dr. David Alan Gilbert" wrote: * Yan Zhao (yan.y.z...@intel.com) wrote: BTW, for viommu, the downtime data is as below. under the same network condition and guest memory size, and no running dirty data/memory

[PATCH] hw/net/imx_fec.c: Convert debug fprintf() to trace event

Signed-off-by: Jean-Christophe Dubois --- hw/net/imx_fec.c| 101 ++-- hw/net/trace-events | 18 2 files changed, 58 insertions(+), 61 deletions(-) diff --git a/hw/net/imx_fec.c b/hw/net/imx_fec.c index 7adcc9df654..823dac0603b 100644 ---

[PATCH] hw/misc/imx6ul_ccm.c: Implement non writable bits in CCM registers

Some bits of the CCM registers are non writable. This was left undone in the initial commit (all bits of registers were writable). This patch add the required code to protect non writable bits. Signed-off-by: Jean-Christophe Dubois --- hw/misc/imx6ul_ccm.c | 81

[PATCH v2 0/2] fuzz: Skip QTest serialization

In the same vein as Philippe's patch: https://patchew.org/QEMU/20200528165303.1877-1-f4...@amsat.org/ This uses linker trickery to wrap calls to libqtest functions and directly call the corresponding read/write functions, rather than relying on the ASCII-serialized QTest protocol. v2: applies

[PATCH v2 1/2] fuzz: skip QTest serialization

The QTest server usually parses ASCII commands from clients. Since we fuzz within the QEMU process, skip the QTest serialization and server for most QTest commands. Leave the option to use the ASCII protocol, to generate readable traces for crash reproducers. Inspired-by: Philippe Mathieu-Daudé

[Bug 1877418] Re: qemu-nbd freezes access to VDI file

I agree, the program doesn't stop you from doing such things. It should work without error, but it might be slow. Just offering some advice you may not want to use it like this. Try to reproduce with qcow2 and qemu-nbd to see if the problem is with our support of the disk image format or if it's

Re: [PATCH v1 2/2] Sample mtty: Add migration capability to mtty module

On Mon, 4 May 2020 23:24:20 +0530 Kirti Wankhede wrote: > This patch makes mtty device migration capable. Purpose od this code is > to test migration interface. Only stop-and-copy phase is implemented. > Postcopy migration is not supported. > > Actual data for mtty device migration is very

Re: [PATCH v2 04/58] qdev: New qdev_new(), qdev_realize(), etc.

On Fri, May 29, 2020 at 7:03 AM Markus Armbruster wrote: > > We commonly plug devices into their bus right when we create them, > like this: > > dev = qdev_create(bus, type_name); > > Note that @dev is a weak reference. The reference from @bus to @dev > is the only strong one. > > We realize

Re: [Virtio-fs] [PATCH] virtiofsd: remove symlink fallbacks

* Vivek Goyal (vgo...@redhat.com) wrote: > On Thu, May 14, 2020 at 04:07:36PM +0200, Miklos Szeredi wrote: > > Path lookup in the kernel has special rules for looking up magic symlinks > > under /proc. If a filesystem operation is instructed to follow symlinks > > (e.g. via AT_SYMLINK_FOLLOW or

Re: [PATCH 2/2] sev: scan guest ROM for launch secret address

On 5/28/20 3:51 PM, Tobin Feldman-Fitzthum wrote: From: Tobin Feldman-Fitzthum In addition to using QMP to provide the guest memory address that the launch secret blob will be injected into, the secret address can also be specified in the guest ROM. This patch adds sev_find_secret_gpa, which

[PATCH] acpi: tpm: Do not build TCPA table for TPM 2

From: Stefan Berger Do not build a TCPA table for TPM 2 anymore but create the log area when building the TPM2 table. The TCPA table is only needed for TPM 1.2. Signed-off-by: Stefan Berger --- hw/i386/acpi-build.c | 12 1 file changed, 8 insertions(+), 4 deletions(-) diff --git

Re: [PATCH v4 9/9] iotests: rename and move 169 and 199 tests

On 5/27/20 2:50 PM, Vladimir Sementsov-Ogievskiy wrote: > > Hmm. Actually, I think, it's not a problem to continue support ranges of > tests for number test names, if you need it. > > Note a new paramter --start-from, which is here to re-run failed  > ./check run from the middle of the

Re: [PATCH] acpi: tpm: Do not build TCPA table for TPM 2

On Fri, May 29, 2020 at 9:28 PM Stefan Berger wrote: > From: Stefan Berger > > Do not build a TCPA table for TPM 2 anymore but create the log area when > building the TPM2 table. The TCPA table is only needed for TPM 1.2. > > Signed-off-by: Stefan Berger > Reviewed-by: Marc-André Lureau ---

Re: [PATCH v8 30/62] target/riscv: Update fp_status when float rounding mode changes

On Thu, May 21, 2020 at 3:45 AM LIU Zhiwei wrote: > > For scalar float instruction, round mode is encoded in instruction, > so fp_status is updating dynamiclly. > > For vector float instruction, round mode is always frm, so > update fp_status when frm changes is enough. > > Signed-off-by: LIU

[PATCH v2 4/4] check-block: enable iotests with SafeStack

SafeStack is a stack protection technique implemented in llvm. It is enabled with a -fsanitize flag. iotests are currently disabled when any -fsanitize option is used, because such options tend to produce additional warnings and false positives. While common -fsanitize options are used to verify

Re: [PATCH Kernel v24 0/8] Add UAPIs to support migration for VFIO devices

On Fri, 29 May 2020 02:00:46 +0530 Kirti Wankhede wrote: > Hi, > > This patch set adds: > * IOCTL VFIO_IOMMU_DIRTY_PAGES to get dirty pages bitmap with > respect to IOMMU container rather than per device. All pages pinned by > vendor driver through vfio_pin_pages external API has to be

Re: [PATCH 0/3] Couple of HMAT fixes

Patchew URL: https://patchew.org/QEMU/cover.1590753455.git.mpriv...@redhat.com/ Hi, This series failed the docker-quick@centos7 build test. Please find the testing commands and their output below. If you have Docker installed, you can probably reproduce it locally. === TEST SCRIPT BEGIN ===

[PATCH v8 04/12] tests/vm: Pass --debug through for vm-boot-ssh.

This helps debug issues that occur during the boot sequence. Signed-off-by: Robert Foley Reviewed-by: Peter Puhov Reviewed-by: Alex Bennée --- tests/vm/Makefile.include | 1 + 1 file changed, 1 insertion(+) diff --git a/tests/vm/Makefile.include b/tests/vm/Makefile.include index

[PATCH v8 05/12] tests/vm: Add ability to select QEMU from current build.

Added a new special variable QEMU_LOCAL=1, which will indicate to take the QEMU binary from the current build. Signed-off-by: Robert Foley Reviewed-by: Peter Puhov Reviewed-by: Alex Bennée --- tests/vm/Makefile.include | 4 tests/vm/basevm.py| 23 --- 2 files

Re: [PATCH v8 42/62] target/riscv: vector floating-point merge instructions

On Thu, May 21, 2020 at 4:09 AM LIU Zhiwei wrote: > > Signed-off-by: LIU Zhiwei Reviewed-by: Alistair Francis Alistair > --- > target/riscv/helper.h | 4 +++ > target/riscv/insn32.decode | 2 ++ > target/riscv/insn_trans/trans_rvv.inc.c | 38

Re: [PATCH v2 1/2] fuzz: skip QTest serialization

This is missing the actual wrapper functions... Sending v3 On 200529 1402, Alexander Bulekov wrote: > The QTest server usually parses ASCII commands from clients. Since we > fuzz within the QEMU process, skip the QTest serialization and server > for most QTest commands. Leave the option to use

Re: [PATCH] acpi: tpm: Do not build TCPA table for TPM 2

On 5/29/20 3:28 PM, Stefan Berger wrote: From: Stefan Berger Do not build a TCPA table for TPM 2 anymore but create the log area when building the TPM2 table. The TCPA table is only needed for TPM 1.2. Specs are here:

Re: [RFC v3 0/8] vDPA support in qemu

Patchew URL: https://patchew.org/QEMU/20200529140620.28759-1-l...@redhat.com/ Hi, This series failed the docker-mingw@fedora build test. Please find the testing commands and their output below. If you have Docker installed, you can probably reproduce it locally. === TEST SCRIPT BEGIN === #!

[PATCH v8 06/12] tests/vm: allow wait_ssh() to specify command

This allows for waiting for completion of arbitrary commands. Signed-off-by: Robert Foley Reviewed-by: Peter Puhov Reviewed-by: Alex Bennée --- tests/vm/basevm.py | 14 +++--- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/tests/vm/basevm.py b/tests/vm/basevm.py index

[PATCH v8 09/12] tests/vm: Added a new script for centos.aarch64.

centos.aarch64 creates a CentOS 8 image. Also added a new kickstart script used to build the centos.aarch64 image. Signed-off-by: Robert Foley Reviewed-by: Peter Puhov Reviewed-by: Alex Bennée --- tests/vm/Makefile.include| 3 +- tests/vm/centos-8-aarch64.ks | 51

Re: [PATCH v8 43/62] target/riscv: vector floating-point/integer type-convert instructions

On Thu, May 21, 2020 at 4:11 AM LIU Zhiwei wrote: > > Signed-off-by: LIU Zhiwei > Reviewed-by: Richard Henderson Reviewed-by: Alistair Francis Alistair > --- > target/riscv/helper.h | 13 ++ > target/riscv/insn32.decode | 4 +++ >

Re: [PATCH v8 46/62] target/riscv: vector single-width integer reduction instructions

On Thu, May 21, 2020 at 4:17 AM LIU Zhiwei wrote: > > Signed-off-by: LIU Zhiwei > Reviewed-by: Richard Henderson Reviewed-by: Alistair Francis Alistair > --- > target/riscv/helper.h | 33 +++ > target/riscv/insn32.decode | 8 +++ >

Re: [PATCH] libvhost-user: advertise vring features

Hi On Fri, May 29, 2020 at 6:13 PM Stefan Hajnoczi wrote: > > libvhost-user implements several vring features without advertising > them. There is no way for the vhost-user master to detect support for > these features. > > Things more or less work today because QEMU assumes the vhost-user >

[PATCH v8 08/12] tests/vm: Added a new script for ubuntu.aarch64.

ubuntu.aarch64 provides a script to create an Ubuntu 18.04 VM. Another new file is also added aarch64vm.py, which is a module with common methods used by aarch64 VMs, such as how to create the flash images. Signed-off-by: Robert Foley Reviewed-by: Peter Puhov --- configure |

[PATCH v8 10/12] tests/vm: change scripts to use self._config

This change converts existing scripts to using for example self.ROOT_PASS, to self._config['root_pass']. We made similar changes for GUEST_USER, and GUEST_PASS. This allows us also to remove the change in basevm.py, which adds __getattr__ for backwards compatibility. Signed-off-by: Robert Foley

Re: [RFC v2 00/18] Refactor configuration of guest memory protection

On Thu, May 21, 2020 at 01:42:46PM +1000, David Gibson wrote: > A number of hardware platforms are implementing mechanisms whereby the > hypervisor does not have unfettered access to guest memory, in order > to mitigate the security impact of a compromised hypervisor. > > AMD's SEV implements

Re: [PATCH 0/3] Couple of HMAT fixes

Patchew URL: https://patchew.org/QEMU/cover.1590753455.git.mpriv...@redhat.com/ Hi, This series failed the asan build test. Please find the testing commands and their output below. If you have Docker installed, you can probably reproduce it locally. === TEST SCRIPT BEGIN === #!/bin/bash

[PATCH v8 00/12] tests/vm: Add support for aarch64 VMs

This is version 8 of the patch series to add support for aarch64 VMs in the vm-build infrastructure. - Ubuntu 18.04 aarch64 VM - CentOS 8 aarch64 VM v7: https://lists.gnu.org/archive/html/qemu-devel/2020-05/msg05286.html Changes in v8: - Added Ubuntu common module in tests/vm. - Changed

[PATCH v8 01/12] tests/vm: pass args through to BaseVM's __init__

Adding the args parameter to BaseVM's __init__. We will shortly need to pass more parameters to the class so let's just pass args rather than growing the parameter list. Signed-off-by: Robert Foley Reviewed-by: Alex Bennée --- tests/vm/basevm.py | 13 ++--- 1 file changed, 6

[PATCH v8 07/12] tests/vm: Add common Ubuntu python module

Add a common Ubuntu python module and make use of it with the ubuntu.i386 script. This is preparation for adding an Ubuntu script ubuntu.aarch64. Splitting out the common logic such as build_image() will reduce duplication. Signed-off-by: Robert Foley --- tests/vm/ubuntu.i386 | 46

[PATCH v3 2/2] fuzz: Add support for logging QTest commands

Signed-off-by: Alexander Bulekov --- tests/qtest/fuzz/fuzz.c | 9 - 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/tests/qtest/fuzz/fuzz.c b/tests/qtest/fuzz/fuzz.c index 88ac88bca9..21cdee53db 100644 --- a/tests/qtest/fuzz/fuzz.c +++ b/tests/qtest/fuzz/fuzz.c @@ -94,7

[PATCH v3 0/2] fuzz: Skip QTest serialization

In the same vein as Philippe's patch: https://patchew.org/QEMU/20200528165303.1877-1-f4...@amsat.org/ This uses linker trickery to wrap calls to libqtest functions and directly call the corresponding read/write functions, rather than relying on the ASCII-serialized QTest protocol. v2: applies

[Bug 1878255] Re: Assertion failure in bdrv_aio_cancel, through ide

outl 0xcf8 0x8000fa24 outl 0xcfc 0xe106c000 (Writes e106c00 to BAR5 for 0:31:2) outl 0xcf8 0x8000fa04 outw 0xcfc 0x7 (Enables BM, Memory IO and PIO for 0:31:2) outl 0xcf8 0x8000fb20 (Enables 0:31:3, I guess? My PCI knowledge is iffy. We set the enable bit and select BAR4, but then we don't

[PATCH] target/arm: Init GIC CPU IF regs for A15/A7

Initialize the CPU interface registers also for Cortex-A15 and Cortex-A7 CPU models, in the same way as done for 64bit CPU models. This fixes usage of GICv3 in virtualization contexts in 32bit configurations. Signed-off-by: Adam Lackorzynski --- target/arm/cpu.c | 6 ++ 1 file changed, 6

Re: [PATCH v3 0/2] fuzz: Skip QTest serialization

Patchew URL: https://patchew.org/QEMU/20200529221450.26673-1-alx...@bu.edu/ Hi, This series seems to have some coding style problems. See output below for more information: Message-id: 20200529221450.26673-1-alx...@bu.edu Subject: [PATCH v3 0/2] fuzz: Skip QTest serialization Type: series

Re: [PATCH v8 41/62] target/riscv: vector floating-point classify instructions

On Thu, May 21, 2020 at 4:07 AM LIU Zhiwei wrote: > > Signed-off-by: LIU Zhiwei > Reviewed-by: Richard Henderson Reviewed-by: Alistair Francis Alistair > --- > target/riscv/fpu_helper.c | 33 + > target/riscv/helper.h | 4 ++ >

Re: [RFC v3 0/8] vDPA support in qemu

Patchew URL: https://patchew.org/QEMU/20200529140620.28759-1-l...@redhat.com/ Hi, This series failed the docker-quick@centos7 build test. Please find the testing commands and their output below. If you have Docker installed, you can probably reproduce it locally. === TEST SCRIPT BEGIN ===

[PATCH v2 3/4] configure: add flags to support SafeStack

This patch adds a flag to enable/disable the SafeStack instrumentation provided by LLVM. On enable, make sure that the compiler supports the flags, and that we are using the proper coroutine implementation (coroutine-ucontext). On disable, explicitly disable the option if it was enabled by

[PATCH v2 1/4] coroutine: support SafeStack in ucontext backend

LLVM's SafeStack instrumentation does not yet support programs that make use of the APIs in ucontext.h With the current implementation of coroutine-ucontext, the resulting binary is incorrect, with different coroutines sharing the same unsafe stack and producing undefined behavior at runtime. This

[PATCH v8 12/12] tests/vm: Add workaround to consume console

This adds support to basevm.py so that we always drain the console chars. This makes use of support added in an earlier commit that allows QEMUMachine to use the ConsoleSocket. This is a workaround we found was needed since there is a known issue where QEMU will hang waiting for console

Re: [PATCH v8 47/62] target/riscv: vector wideing integer reduction instructions

On Thu, May 21, 2020 at 4:19 AM LIU Zhiwei wrote: > > Signed-off-by: LIU Zhiwei > Reviewed-by: Richard Henderson Reviewed-by: Alistair Francis Alistair > --- > target/riscv/helper.h | 7 +++ > target/riscv/insn32.decode | 2 ++ >

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