On 2020/6/8 23:50, Alex Bennée wrote:
LIU Zhiwei writes:
Hi Richard,
I am doing bfloat16 support on QEMU.
Once I tried to reuse float32 interface, but I couldn't properly process
rounding in some insns like fadd.
What do you mean by re-use the float32 interface? Isn't bfloat16 going
to be
On 6/17/20 8:50 AM, Philippe Mathieu-Daudé wrote:
> On 6/17/20 6:37 AM, Richard Henderson wrote:
>> On aarch64, gcc 9.3 is generating
>>
>> qemu/exec.c: In function ‘address_space_translate_iommu’:
>> qemu/exec.c:431:28: note: parameter passing for argument of type \
>> ‘MemTxAttrs’ {aka ‘struct
On 6/17/20 6:37 AM, Richard Henderson wrote:
> Use a helper function to tidy the assembly of gcc_flags.
> Separate flags that disable warnings from those that enable,
> and sort the disable warnings to the end.
>
> Suggested-by: Eric Blake
> Signed-off-by: Richard Henderson
> ---
> configure |
Makes it easier to create good commit messages from the logs.
Signed-off-by: Gerd Hoffmann
---
tests/qtest/bios-tables-test.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tests/qtest/bios-tables-test.c b/tests/qtest/bios-tables-test.c
index b482f76c03d4..c315156858f4 10064
Add helper function to add fw_cfg device,
also move code to hw/i386/fw_cfg.c.
Signed-off-by: Gerd Hoffmann
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Igor Mammedov
---
hw/i386/fw_cfg.h | 1 +
hw/i386/acpi-build.c | 24 +---
hw/i386/fw_cfg.c | 28 +
First batch of microvm patches, some generic acpi stuff.
Split the acpi-build.c monster, specifically split the
pc and q35 and pci bits into a separate file which we
can skip building at some point in the future.
v2 changes: leave acpi-build.c largely as-is, move useful
bits to other places to all
DSDT change: isa device order changes in case MI1 (ipmi) is present.
Signed-off-by: Gerd Hoffmann
Reviewed-by: Igor Mammedov
---
hw/block/fdc.c | 83
hw/i386/acpi-build.c| 83
stubs/cmos.c
acpi aml generator needs this, but it is in floppy code now
so we can make the function static.
Signed-off-by: Gerd Hoffmann
Reviewed-by: Igor Mammedov
Reviewed-by: Philippe Mathieu-Daudé
Acked-by: John Snow
---
include/hw/block/fdc.h | 2 --
hw/block/fdc.c | 4 ++--
2 files changed,
The _STA methods for COM+LPT used to reference them,
but that isn't the case any more.
piix4 DSDT changes:
Scope (_SB.PCI0)
{
Device (ISA)
{
Name (_ADR, 0x0001) // _ADR: Address
OperationRegion (P40C, PCI_Config, 0x60, 0x04)
-
x86 machines can have a single ISA bus only.
Signed-off-by: Gerd Hoffmann
Reviewed-by: Igor Mammedov
Reviewed-by: Philippe Mathieu-Daudé
---
hw/i386/acpi-build.c | 16 ++--
1 file changed, 6 insertions(+), 10 deletions(-)
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
in
Signed-off-by: Gerd Hoffmann
Reviewed-by: Philippe Mathieu-Daudé
Acked-by: John Snow
---
include/hw/block/fdc.h | 1 +
include/hw/i386/pc.h | 1 -
hw/block/fdc.c | 26 +-
hw/i386/pc.c | 25 -
4 files changed, 26 insertions(+)
Seems to be unused.
ich9 DSDT changes:
Scope (_SB.PCI0)
{
Device (ISA)
{
Name (_ADR, 0x001F) // _ADR: Address
OperationRegion (PIRQ, PCI_Config, 0x60, 0x0C)
-OperationRegion (LPCD, PCI_Config, 0x80, 0x02)
-Field (L
The _SB.PCI0.PX13.P13C opregion (holds isa device enable bits)
is not used any more, remove it from DSDT.
piix4 DSDT changes:
Scope (_SB.PCI0)
{
-Device (PX13)
-{
-Name (_ADR, 0x00010003) // _ADR: Address
-OperationRegion (P13C, PCI_Config, Zero,
DSDT change: isa device order changes in case MI1 (ipmi) is present.
Signed-off-by: Gerd Hoffmann
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Igor Mammedov
---
hw/i386/acpi-build.c| 39
hw/input/pckbd.c| 31 +++
By using the TYPE_* definitions for devices, we can:
- quickly find where devices are used with 'git-grep'
- easily rename a device (one-line change).
Signed-off-by: Philippe Mathieu-Daudé
---
hw/arm/realview.c| 3 ++-
hw/arm/versatilepb.c | 3 ++-
hw/arm/vexpress.c| 3 ++-
3 files cha
Few patches while playing with Zephyr on the MPS2:
- clean 'versatile_i2c' a bit,
- describe it as 'ARM SBCon two-wire serial bus interface'
which is common on the ARM documentation,
- add watchdog
- added fpgaio with correct prescale clk
- added i2c and spi
- added gpio/i2s as unimp
- dropped t
Patchew URL: https://patchew.org/QEMU/20200617071138.11159-1-kra...@redhat.com/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Subject: [PATCH v9 00/10] acpi: i386 tweaks
Type: series
Message-id: 20200617071138.11159-1-kra...@redhat.com
=== TE
Signed-off-by: Philippe Mathieu-Daudé
---
v2: 25MHz prescale-clk property
---
hw/arm/mps2.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/hw/arm/mps2.c b/hw/arm/mps2.c
index c66c595d4a..e106123225 100644
--- a/hw/arm/mps2.c
+++ b/hw/arm/mps2.c
@@ -38,8 +38,10 @@
#include "hw/timer
Add a trace event to see when a guest disable/enable the watchdog.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/watchdog/cmsdk-apb-watchdog.c | 1 +
hw/watchdog/trace-events | 1 +
2 files changed, 2 insertions(+)
diff --git a/hw/watchdog/cmsdk-apb-watchdog.c b/hw/watchdog/cmsdk-apb-wat
Use self-explicit definitions instead of magic values.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/i2c/versatile_i2c.c | 14 ++
1 file changed, 10 insertions(+), 4 deletions(-)
diff --git a/hw/i2c/versatile_i2c.c b/hw/i2c/versatile_i2c.c
index 1ac2a6f59a..040139d701 100644
--- a/hw
To differenciate with the CMSDK APB peripheral region,
rename this region 'CMSDK AHB peripheral region'.
Reviewed-by: Peter Maydell
Signed-off-by: Philippe Mathieu-Daudé
---
hw/arm/mps2.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/hw/arm/mps2.c b/hw/arm/mps2.c
index e
Use self-explicit definitions instead of magic values.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/i2c/versatile_i2c.c | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/hw/i2c/versatile_i2c.c b/hw/i2c/versatile_i2c.c
index 040139d701..0ce10a1bcc 100644
--- a/hw/i2c/vers
>From 'Application Note AN521', chapter 4.7:
The SMM implements four SBCon serial modules:
One SBCon module for use by the Color LCD touch interface.
One SBCon module to configure the audio controller.
Two general purpose SBCon modules, that connect to the
Expansion headers J7 and J8, a
>From 'Application Note AN385', chapter 3.9, SPI:
The SMM implements five PL022 SPI modules.
Two pairs of modules share the same OR-gated IRQ.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/arm/mps2.c | 24
hw/arm/Kconfig | 6 +++---
2 files changed, 27 insertions(+)
'ARM SBCon two-wire serial bus interface' is the official
name describing the pair of registers used to bitbanging
I2C in the Versatile boards.
Make the private VersatileI2CState structure as public
ArmSbconI2CState.
Add the TYPE_ARM_SBCON_I2C, alias to our current
TYPE_VERSATILE_I2C model.
Rename
>From 'Application Note AN385', chapter 3.14:
The SMM implements a simple SBCon interface based on I2C.
There are 4 SBCon interfaces on the FPGA APB subsystem.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/arm/mps2.c | 8
hw/arm/Kconfig | 1 +
2 files changed, 9 insertions(+)
diff
On 6/17/20 9:11 AM, Gerd Hoffmann wrote:
> Makes it easier to create good commit messages from the logs.
>
> Signed-off-by: Gerd Hoffmann
> ---
> tests/qtest/bios-tables-test.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/tests/qtest/bios-tables-test.c b/tests/qtest/
Signed-off-by: Philippe Mathieu-Daudé
---
hw/arm/mps2.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/hw/arm/mps2.c b/hw/arm/mps2.c
index daa55f730b..ee555f919d 100644
--- a/hw/arm/mps2.c
+++ b/hw/arm/mps2.c
@@ -65,7 +65,9 @@ typedef struct {
MemoryRegion blockram_m
We already model the CMSDK APB watchdog device, let's use it!
Suggested-by: Peter Maydell
Signed-off-by: Philippe Mathieu-Daudé
---
v2: Use existing TYPE_CMSDK_APB_WATCHDOG (pm215)
---
hw/arm/mps2.c | 7 +++
hw/arm/Kconfig | 1 +
2 files changed, 8 insertions(+)
diff --git a/hw/arm/mps2.c
On Wed, Jun 17, 2020 at 12:57 AM Stefan Berger
wrote:
>
> From: Stefan Berger
>
> This patch fixes a bug that occurs when using interrupts. It
> allows to lower the IRQ also when a locality is not active.
>
> Signed-off-by: Stefan Berger
> Reviewed-by: Eric Auger
Reviewed-by: Marc-André Lureau
Register the GPIO peripherals as unimplemented to better
follow their accesses, for example booting Zephyr:
IN: arm_mps2_pinmux_init
0x1160: f64f 0231 movw r2, #0xf831
0x1164: 4b06 ldr r3, [pc, #0x18]
0x1166: 2000 movs r0, #0
0x
On Wed, Jun 17, 2020 at 12:57 AM Stefan Berger
wrote:
>
> Ignore DSDT table differences before enabling IRQ support for TPM.
>
> Signed-off-by: Stefan Berger
> CC: Michael S. Tsirkin
> Reviewed-by: Eric Auger
Reviewed-by: Marc-André Lureau
> ---
> tests/qtest/bios-tables-test-allowed-diff.h
On Wed, Jun 17, 2020 at 12:57 AM Stefan Berger
wrote:
>
> From: Stefan Berger
>
> Implement get_irqnum() as part of the TPMIfClass to get the assigned IRQ
> number or TPM_IRQ_DISABLED (-1) in case IRQs cannot be used.
>
> Signed-off-by: Stefan Berger
Reviewed-by: Marc-André Lureau
> ---
> hw
Signed-off-by: Philippe Mathieu-Daudé
---
hw/arm/mps2.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/hw/arm/mps2.c b/hw/arm/mps2.c
index 2f6acbf2c2..d1653a7e6e 100644
--- a/hw/arm/mps2.c
+++ b/hw/arm/mps2.c
@@ -373,6 +373,7 @@ static void mps2_common_init(MachineState *machine)
On Wed, Jun 17, 2020 at 12:58 AM Stefan Berger
wrote:
>
> Before the enablement of interrupts on PCs, split the TPM_TIS_IRQ
> into TPM_TIS_ISA_IRQ for PCs and TPM_TIS_SYSBUS_IRQ for ARM.
>
> Signed-off-by: Stefan Berger
Reviewed-by: Marc-André Lureau
> ---
> hw/tpm/tpm_tis_isa.c| 2 +-
>
On 6/17/20 7:39 AM, P J P wrote:
> From: Prasad J Pandit
>
> Add vfio quirk device mmio write method to avoid NULL pointer
> dereference issue.
>
> Reported-by: Lei Sun
> Signed-off-by: Prasad J Pandit
> ---
> hw/vfio/pci-quirks.c | 8
> 1 file changed, 8 insertions(+)
>
> diff --gi
On Wed, Jun 17, 2020 at 12:58 AM Stefan Berger
wrote:
>
> Disable interrupt support for the TIS on sysbus.
>
> Signed-off-by: Stefan Berger
Reviewed-by: Marc-André Lureau
> ---
> include/hw/acpi/tpm.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/include/hw/acpi/tpm
On 6/17/20 7:39 AM, P J P wrote:
> From: Prasad J Pandit
>
> Add nrf51_soc mmio read method to avoid NULL pointer dereference
> issue.
>
> Reported-by: Lei Sun
> Signed-off-by: Prasad J Pandit
> ---
> hw/nvram/nrf51_nvm.c | 7 +++
> 1 file changed, 7 insertions(+)
>
> diff --git a/hw/nvr
On 6/17/20 8:47 AM, Philippe Mathieu-Daudé wrote:
> Example booting obmc-phosphor-image:
>
> $ qemu-system-arm -M witherspoon-bmc -trace pca\*
> 26033@1592376001.873828:pca9552_led_state 0x5594a9f57560 LEDs [
> ]
> 26033@1592376001.874169:pca9552_led_state 0x5594a9f57560 LED
On Wed, Jun 17, 2020 at 12:57 AM Stefan Berger
wrote:
>
> Add the updated DSDT following the interrupt enablement.
>
> @@ -5,13 +5,13 @@
> *
> * Disassembling to symbolic ASL+ operators
> *
> - * Disassembly of tests/data/acpi/q35/DSDT.tis, Mon Jun 15 09:57:05 2020
> + * Disassembly of /tmp/
On Wed, Jun 17, 2020 at 12:57 AM Stefan Berger
wrote:
>
> From: Stefan Berger
>
> Move the TPM TIS IRQ to unused IRQ 13, which is the only one accepted by
> Windows. Query for the TPM's irq number and enable the TPM IRQ unless
> TPM_IRQ_DISABLED is returned.
>
> Signed-off-by: Stefan Berger
> CC
Patchew URL: https://patchew.org/QEMU/20200617071138.11159-1-kra...@redhat.com/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Subject: [PATCH v9 00/10] acpi: i386 tweaks
Type: series
Message-id: 20200617071138.11159-1-kra...@redhat.com
=== TE
On 6/17/20 7:39 AM, P J P wrote:
> From: Prasad J Pandit
>
> Add spapr msi mmio read method to avoid NULL pointer dereference
> issue.
>
> Reported-by: Lei Sun
> Signed-off-by: Prasad J Pandit
> ---
> hw/ppc/spapr_pci.c | 9 -
> 1 file changed, 8 insertions(+), 1 deletion(-)
>
> diff
Patchew URL: https://patchew.org/QEMU/20200617071138.11159-1-kra...@redhat.com/
Hi,
This series failed the asan build test. Please find the testing commands and
their output below. If you have Docker installed, you can probably reproduce it
locally.
=== TEST SCRIPT BEGIN ===
#!/bin/bash
export
On 6/17/20 7:39 AM, P J P wrote:
> From: Prasad J Pandit
>
> Add ppc-parity mmio write method to avoid NULL pointer dereference
> issue.
>
> Reported-by: Lei Sun
> Signed-off-by: Prasad J Pandit
> ---
> hw/ppc/prep_systemio.c | 8
> 1 file changed, 8 insertions(+)
>
> diff --git a/h
On 6/17/20 9:39 AM, Cédric Le Goater wrote:
> On 6/17/20 8:47 AM, Philippe Mathieu-Daudé wrote:
>> Example booting obmc-phosphor-image:
>>
>> $ qemu-system-arm -M witherspoon-bmc -trace pca\*
>> 26033@1592376001.873828:pca9552_led_state 0x5594a9f57560 LEDs [
>> ]
>> 26033@159
On 6/17/20 9:52 AM, Philippe Mathieu-Daudé wrote:
> On 6/17/20 9:39 AM, Cédric Le Goater wrote:
>> On 6/17/20 8:47 AM, Philippe Mathieu-Daudé wrote:
>>> Example booting obmc-phosphor-image:
>>>
>>> $ qemu-system-arm -M witherspoon-bmc -trace pca\*
>>> 26033@1592376001.873828:pca9552_led_state 0
** Changed in: qemu (Ubuntu)
Assignee: Richard Henderson (rth) => Christian Ehrhardt (paelzer)
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1749393
Title:
sbrk() not working under qemu-user
Hi Lureau,
When will this patch be merged?
Thanks, Feng Li.
-- Forwarded message -
发件人： Dima Stepanov
Date: 2020年6月15日周一 下午4:43
Subject: Re: [PATCH v5] char-socket: initialize reconnect timer only
when the timer doesn't start
To: Li Feng
Hi,
I don't see this change merged to
Hi Stefan,
On 6/16/20 10:57 PM, Stefan Berger wrote:
> Before the enablement of interrupts on PCs, split the TPM_TIS_IRQ
> into TPM_TIS_ISA_IRQ for PCs and TPM_TIS_SYSBUS_IRQ for ARM.
>
> Signed-off-by: Stefan Berger
> ---
> hw/tpm/tpm_tis_isa.c| 2 +-
> hw/tpm/tpm_tis_sysbus.c | 3 ++-
> i
> Le 16 Jun 2020 à 18:50, Gerd Hoffmann a écrit :
>
> Hi,
>
>> (a) We could rely in the guest physbits to calculate the PCI64 aperture.
>
> I'd love to do that. Move the 64-bit I/O window as high as possible and
> use -- say -- 25% of the physical address space for it.
>
> Problem is we c
> Le 16 Jun 2020 à 19:10, Eduardo Habkost a écrit :
>
> On Tue, Jun 16, 2020 at 05:57:46PM +0100, Dr. David Alan Gilbert wrote:
>> * Gerd Hoffmann (kra...@redhat.com) wrote:
>>> Hi,
>>>
(a) We could rely in the guest physbits to calculate the PCI64 aperture.
>>>
>>> I'd love to do that.
Patchew URL: https://patchew.org/QEMU/20200617072539.32686-1-f4...@amsat.org/
Hi,
This series failed the asan build test. Please find the testing commands and
their output below. If you have Docker installed, you can probably reproduce it
locally.
=== TEST SCRIPT BEGIN ===
#!/bin/bash
export A
Hi
On Wed, Jun 17, 2020 at 12:09 PM Li Feng wrote:
> Hi Lureau,
>
> When will this patch be merged?
>
>
Paolo, can you queue it?
thanks
Thanks, Feng Li.
>
> -- Forwarded message -
> 发件人： Dima Stepanov
> Date: 2020年6月15日周一 下午4:43
> Subject: Re: [PATCH v5] char-socket: initialize
Hi Stefan,
On 6/16/20 10:57 PM, Stefan Berger wrote:
> From: Stefan Berger
>
> Move the TPM TIS IRQ to unused IRQ 13, which is the only one accepted by
> Windows. Query for the TPM's irq number and enable the TPM IRQ unless
> TPM_IRQ_DISABLED is returned.
>
> Signed-off-by: Stefan Berger
> CC:
On 6/11/20 11:14 AM, Andrew Jones wrote:
> On Thu, Jun 11, 2020 at 04:46:45PM +0800, Haibo Xu wrote:
>> Hi,
>>
>> I met a qemu core dump issue when starting a VM with cpu feature
>> "pmu=on" on an arm server.
>> The commands to start the machine is:
>>
>> ./qemu-system-aarch64 \
>>-cp
The Transmitter Reset (XRES) command is used for clearing the the
transmit FIFO of any data. When the controller has completed the
command, an XPR interrupt is generated (if this interrupt is enabled).
Signed-off-by: Jasper Lowell
---
hw/char/escc2.c | 5 +
1 file changed, 5 insertions(+)
d
The Transmit Frame (XF) command is an alternative to using the TIC
register for transmitting. This command allows the guest to transmit the
contents of the transmit FIFO rather than a single character.
Signed-off-by: Jasper Lowell
---
hw/char/escc2.c | 24
1 file changed
The Ultra 5 (Darwin) machine that is emulated for the Sun4u architecture
ships with a SAB 82532 ESCC2 device that is used for providing the
default ttya/ttyb serial consoles. This device is introduced to
increment Sun4u emulation towards being hardware faithful. ISA support
is included so that the
Signed-off-by: Jasper Lowell
---
hw/char/escc2.c | 234
1 file changed, 234 insertions(+)
diff --git a/hw/char/escc2.c b/hw/char/escc2.c
index 926346482f..e16049ce4d 100644
--- a/hw/char/escc2.c
+++ b/hw/char/escc2.c
@@ -7,6 +7,8 @@
*/
#inclu
Signed-off-by: Jasper Lowell
---
hw/char/escc2.c | 88
hw/char/trace-events | 1 +
2 files changed, 89 insertions(+)
diff --git a/hw/char/escc2.c b/hw/char/escc2.c
index 94528b8a4c..926346482f 100644
--- a/hw/char/escc2.c
+++ b/hw/char/escc2.c
@
Each channel on the controller has dedicated pins for providing receive
and transmit clock sources, a baud rate generator, and a DPLL.
Additionally, the controller has two pins, XTAL1 and XTAL2, that can be
used with a crystal and oscillator for providing a clock source.
Alternatively, XTAL1 can si
Commands are initiated by setting certain bits in the CMDR register. The
Receiver Reset (RRES) command clears the receiver FIFO (RFIFO).
Signed-off-by: Jasper Lowell
---
hw/char/escc2.c | 24
hw/char/trace-events | 1 +
2 files changed, 25 insertions(+)
diff --git
The Receive FIFO Read Enable command is used to request access to the
receive FIFO. When the command is finished, the controller will issue a
TCD interrupt and the number of available bytes will be available in tthe
RBCL register. Given that the visible receive FIFO window is used to
store characte
I've been working on improving Solaris 10 emulation for the SPARC64
Sun4u architecture with the goal of a working shell. Currently, Solaris
10 boots with a number of errors before displaying the prompt of an
otherwise unresponsive installer shell. It's been mentioned that this
problem may not be is
Did you try to run it in a qemu-system-ppc64 guest?
It would help to know if it is a tcg or a linux-user bug.
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1883784
Title:
[ppc64le] qemu behavior di
On 17/06/2020 09.11, Gerd Hoffmann wrote:
> DSDT change: isa device order changes in case MI1 (ipmi) is present.
>
> Signed-off-by: Gerd Hoffmann
> Reviewed-by: Igor Mammedov
> ---
> hw/block/fdc.c | 83
> hw/i386/acpi-build.c| 83
On Tue, Jun 16, 2020 at 01:10:21PM -0400, Eduardo Habkost wrote:
> On Tue, Jun 16, 2020 at 05:57:46PM +0100, Dr. David Alan Gilbert wrote:
> > * Gerd Hoffmann (kra...@redhat.com) wrote:
> > > Hi,
> > >
> > > > (a) We could rely in the guest physbits to calculate the PCI64 aperture.
> > >
> > >
On Wed, Jun 17, 2020 at 11:09:27AM +0530, P J P wrote:
> From: Prasad J Pandit
>
> Hello,
>
> This series adds various undefined MMIO read/write functions
> to avoid potential guest crash via a NULL pointer dereference.
Hrm. If this is such a common problem, maybe we should just add a
NULL che
Patchew URL:
https://patchew.org/QEMU/20200617082402.242631-1-jasper.low...@bt.com/
Hi,
This series failed the asan build test. Please find the testing commands and
their output below. If you have Docker installed, you can probably reproduce it
locally.
=== TEST SCRIPT BEGIN ===
#!/bin/bash
e
On Thu, Jun 11, 2020 at 05:12:06PM +0200, Eric Auger wrote:
> This patch implements the PROBE request. At the moment,
> only THE RESV_MEM property is handled. The first goal is
> to report iommu wide reserved regions such as the MSI regions
> set by the machine code. On x86 this will be the IOAPIC
On Thu, Jun 11, 2020 at 05:12:07PM +0200, Eric Auger wrote:
> When translating an address we need to check if it belongs to
> a reserved virtual address range. If it does, there are 2 cases:
>
> - it belongs to a RESERVED region: the guest should neither use
> this address in a MAP not instruct
On Thu, Jun 11, 2020 at 05:12:09PM +0200, Eric Auger wrote:
> At the moment the virtio-iommu translates MSI transactions.
> This behavior is inherited from ARM SMMU. The virt machine
> code knows where the guest MSI doorbells are so we can easily
> declare those regions as VIRTIO_IOMMU_RESV_MEM_T_M
* Max Reitz (mre...@redhat.com) wrote:
> lo_setattr() invokes fchmod() in a rarely used code path, so it should
> be whitelisted or virtiofsd will crash with EBADSYS.
>
> Said code path can be triggered for example as follows:
>
> On the host, in the shared directory, create a file with the stick
* David Hildenbrand (da...@redhat.com) wrote:
> On 10.06.20 12:39, Dr. David Alan Gilbert wrote:
> > * David Hildenbrand (da...@redhat.com) wrote:
> >> On 10.06.20 09:51, David Hildenbrand wrote:
> >>> Commit 7d2ef6dcc1cf ("hmp: Simplify qom-set") switched to the json
> >>> parser, making it possib
Bastian Koppelmann writes:
> On Tue, Jun 16, 2020 at 05:22:42PM +0100, Alex Bennée wrote:
>>
>> Bastian Koppelmann writes:
>>
>> > when trying to run successful short tests from the Makefile timeout would
>> > no
>> > terminate. Rather it would wait until the time runs out. Excerpt from the
On Wed, Jun 17, 2020 at 10:16:55AM +0200, Christophe de Dinechin wrote:
>
>
> > Le 16 Jun 2020 à 18:50, Gerd Hoffmann a écrit :
> >
> > Hi,
> >
> >> (a) We could rely in the guest physbits to calculate the PCI64 aperture.
> >
> > I'd love to do that. Move the 64-bit I/O window as high as
On 6/17/20 6:37 AM, Richard Henderson wrote:
> From: Wei Wang
>
> It's reported an error of implicit conversion from "unsigned long" to
> "double" when compiling with Clang 10. Simply make the encoding rate 0
> when the encoded_size is 0.
There is a similar error in tests/qht-bench.c, see the as
Signed-off-by: Lin Ma
---
block/block-backend.c | 38 ++
include/sysemu/block-backend.h | 2 ++
2 files changed, 40 insertions(+)
diff --git a/block/block-backend.c b/block/block-backend.c
index 6936b25c83..6d08dd5e0d 100644
--- a/block/block-backend.c
+
v2->v1:
Follow Claudio's suggestions and the docker test result, Fix the dereferencing
'void *' pointer issues and the coding style issues.
In this current design, The GET LBA STATUS parameter data only contains
an eight-byte header + one LBA status descriptor.
How to test:
host:~ # qemu-system-
The get lba status wrapper based on the bdrv_block_status. The following
patches will add GET LBA STATUS 16 support for scsi emulation layer.
Signed-off-by: Lin Ma
---
block/io.c| 43 +++
include/block/block_int.h | 5 +
2 files changed, 4
Signed-off-by: Lin Ma
---
hw/scsi/scsi-disk.c| 90 ++
include/block/accounting.h | 1 +
include/scsi/constants.h | 1 +
3 files changed, 92 insertions(+)
diff --git a/hw/scsi/scsi-disk.c b/hw/scsi/scsi-disk.c
index 387503e11b..9e3002ddaf 100644
---
* Daniel P. Berrangé (berra...@redhat.com) wrote:
> On Tue, Jun 16, 2020 at 01:10:21PM -0400, Eduardo Habkost wrote:
> > On Tue, Jun 16, 2020 at 05:57:46PM +0100, Dr. David Alan Gilbert wrote:
> > > * Gerd Hoffmann (kra...@redhat.com) wrote:
> > > > Hi,
> > > >
> > > > > (a) We could rely in th
Signed-off-by: Lin Ma
---
block/block-backend.c | 38 ++
include/sysemu/block-backend.h | 2 ++
2 files changed, 40 insertions(+)
diff --git a/block/block-backend.c b/block/block-backend.c
index 6936b25c83..6d08dd5e0d 100644
--- a/block/block-backend.c
+
The get lba status wrapper based on the bdrv_block_status. The following
patches will add GET LBA STATUS 16 support for scsi emulation layer.
Signed-off-by: Lin Ma
---
block/io.c| 43 +++
include/block/block_int.h | 5 +
2 files changed, 4
On 6/17/20 10:23 AM, Philippe Mathieu-Daudé wrote:
> On 6/11/20 11:14 AM, Andrew Jones wrote:
>> On Thu, Jun 11, 2020 at 04:46:45PM +0800, Haibo Xu wrote:
>>> Hi,
>>>
>>> I met a qemu core dump issue when starting a VM with cpu feature
>>> "pmu=on" on an arm server.
>>> The commands to start the ma
Signed-off-by: Lin Ma
---
hw/scsi/scsi-disk.c| 90 ++
include/block/accounting.h | 1 +
include/scsi/constants.h | 1 +
3 files changed, 92 insertions(+)
diff --git a/hw/scsi/scsi-disk.c b/hw/scsi/scsi-disk.c
index 387503e11b..9e3002ddaf 100644
---
On Fri, Jun 05, 2020 at 12:30:39PM -, timsoft wrote:
> Public bug reported:
>
> qemu 4.0 compiled fom source.
> vm called by
> qemu-system-x86_64 -cpu qemu64 -smp 4 -m 4G -drive
> file=/data/images/slack14.2_64bit_test.qcow2,format=qcow2 -cdrom
> /mnt/smb1/slackware/iso/slackware64-14.2-inst
Richard Henderson writes:
> From: Philippe Mathieu-Daudé
>
> When building with clang version 10.0.0-4ubuntu1, we get:
>
> CC lm32-softmmu/fpu/softfloat.o
> fpu/softfloat.c:3365:13: error: bitwise negation of a boolean expression;
> did you mean logical negation? [-Werror,-Wbool-op
On 17/06/2020 12.32, Philippe Mathieu-Daudé wrote:
> On 6/17/20 10:23 AM, Philippe Mathieu-Daudé wrote:
>> On 6/11/20 11:14 AM, Andrew Jones wrote:
>>> On Thu, Jun 11, 2020 at 04:46:45PM +0800, Haibo Xu wrote:
Hi,
I met a qemu core dump issue when starting a VM with cpu feature
v2->v1:
Follow Claudio's suggestions and the docker test result, Fix the dereferencing
'void *' pointer issues and the coding style issues.
In this current design, The GET LBA STATUS parameter data only contains
an eight-byte header + one LBA status descriptor.
How to test:
host:~ # qemu-system-
libusb seems to no allways call the completion callback for requests
canceled (which it is supposed to do according to the docs). So add
a limit to avoid qemu waiting forever.
Tested-by: BALATON Zoltan
Signed-off-by: Gerd Hoffmann
Message-Id: <20200529072225.3195-1-kra...@redhat.com>
---
hw/us
The new property allows to specify usb host device name. Uses standard
qemu_open(), so both file system path (/dev/bus/usb/$bus/$dev on linux)
and file descriptor passing can be used.
Requires libusb 1.0.23 or newer. The hostdevice property is only
present in case qemu is compiled against a new
Am 16.06.2020 um 22:01 hat Nir Soffer geschrieben:
> On Tue, Jun 16, 2020 at 8:39 PM Nir Soffer wrote:
> >
> > On Tue, Jun 16, 2020 at 6:32 PM Kevin Wolf wrote:
> > >
> > > Am 15.06.2020 um 21:32 hat Nir Soffer geschrieben:
> > > > We can zero 2.3 g/s:
> > > >
> > > > # time blkdiscard -z test-lv
Sometimes, we want to skip some test methods for certain formats. This
decorator allows that.
Signed-off-by: Max Reitz
---
tests/qemu-iotests/118| 7 +++
tests/qemu-iotests/iotests.py | 13 +
2 files changed, 16 insertions(+), 4 deletions(-)
diff --git a/tests/qemu-iot
qed does not support shrinking images, so the test_small_target method
should be skipped to keep 041 passing.
Fixes: 16cea4ee1c8e5a69a058e76f426b2e17974d8d7d
Signed-off-by: Max Reitz
---
tests/qemu-iotests/041 | 2 ++
1 file changed, 2 insertions(+)
diff --git a/tests/qemu-iotests/041 b/tests/q
The following changes since commit 5c24bce3056ff209a1ecc50ff4b7e65b85ad8e74:
Merge remote-tracking branch
'remotes/stsquad/tags/pull-testing-and-plugin-160620-2' into staging
(2020-06-16 14:57:15 +0100)
are available in the Git repository at:
git://git.kraxel.org/qemu tags/us
Fixes: e4d7019e1a81c61de6a925c3ac5bb6e62ea21b29
Signed-off-by: Max Reitz
---
tests/qemu-iotests/292 | 5 +
1 file changed, 5 insertions(+)
diff --git a/tests/qemu-iotests/292 b/tests/qemu-iotests/292
index a2de27cca4..83ab19231d 100755
--- a/tests/qemu-iotests/292
+++ b/tests/qemu-iotests/29
Fixes: 5d72c68b49769c927e90b78af6d90f6a384b26ac
Fixes: cf2d1203dcfc2bf964453d83a2302231ce77f2dc
Signed-off-by: Max Reitz
---
tests/qemu-iotests/190 | 2 ++
tests/qemu-iotests/291 | 2 ++
2 files changed, 4 insertions(+)
diff --git a/tests/qemu-iotests/190 b/tests/qemu-iotests/190
index fe630918e
Hi,
Thomas’s report
(https://lists.nongnu.org/archive/html/qemu-block/2020-06/msg00791.html)
has given me a nice excuse to write this series.
There are some iotests that have recently start to fail in rarely
exercised test environments (qed, qcow2 with data_file, qcow2 v2), and
this series fixes
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