[PATCH v3 1/2] QSLIST: add atomic replace operation

Replace a queue with another atomicly. It's useful when we need to transfer queues between threads. Signed-off-by: wanghonghao --- include/qemu/queue.h | 4 1 file changed, 4 insertions(+) diff --git a/include/qemu/queue.h b/include/qemu/queue.h index e029e7bf66..1f0cbdf87e 100644 ---

[Bug 1900122] [NEW] Unsupported ioctl: cmd=0xffffffff80685600 when accessing /dev/video* in aarch64 guest

Public bug reported: **Description:** Any attempt to work with video in aarch64 architecture emulated on x86_64 leads currently to the error "Function not implemented". For example: ``` # v4l2-ctl -l --verbose Failed to open /dev/video0: Function not implemented root@12dd9b6fcfcb:/# ll

Re: [PATCH] ci: include configure and meson logs in all jobs if configure fails

Le ven. 16 oct. 2020 12:05, Paolo Bonzini a écrit : > Signed-off-by: Paolo Bonzini > Reviewed-by: Philippe Mathieu-Daudé --- > .cirrus.yml| 6 +++--- > .gitlab-ci.yml | 6 +++--- > .travis.yml| 8 > 3 files changed, 10 insertions(+), 10 deletions(-) > > diff --git

Re: [RFC PATCH 00/12] hw/arm/virt: Introduce cpu and cache topology support

On Fri, Oct 16, 2020 at 05:40:02PM +0800, Ying Fang wrote: > > > On 10/15/2020 3:59 PM, Andrew Jones wrote: > > On Thu, Oct 15, 2020 at 10:07:16AM +0800, Ying Fang wrote: > > > > > > > > > On 10/14/2020 2:08 AM, Andrew Jones wrote: > > > > On Tue, Oct 13, 2020 at 12:11:20PM +, Zengtao (B)

[PATCH] ci: include configure and meson logs in all jobs if configure fails

Signed-off-by: Paolo Bonzini --- .cirrus.yml| 6 +++--- .gitlab-ci.yml | 6 +++--- .travis.yml| 8 3 files changed, 10 insertions(+), 10 deletions(-) diff --git a/.cirrus.yml b/.cirrus.yml index e099da0fec..81a2960b1a 100644 --- a/.cirrus.yml +++ b/.cirrus.yml @@ -13,7 +13,7 @@

Re: [PATCH v8 0/5] Mac Old World ROM experiment (ppc/mac_* clean ups and loading binary ROM)

On 16/10/2020 00:47, BALATON Zoltan via wrote: This is the cut down version of the earlier series omitting unfinished patches that I plan to rework later and rebased to Mark's qemu-macppc branch. Compared to v7 the only change is the cast to (target_ulong) from (uint32_t) as requested by Mark

Re: [PATCH v2 0/2] hw/rtc/m48t59: Simplify m48t59_init()

Le ven. 16 oct. 2020 11:39, Mark Cave-Ayland a écrit : > On 15/10/2020 20:46, Philippe Mathieu-Daudé wrote: > > > Since v1: > > - Do not remove mem_base in patch 1 (Laurent) > > - Pass MemoryRegion* (new patch) > > - Run check-qtest > > > > Philippe Mathieu-Daudé (2): > >hw/rtc/m48t59:

Re: [PATCH v10 10/10] vfio: Don't issue full 2^64 unmap

Hi Jean, On 10/8/20 7:15 PM, Jean-Philippe Brucker wrote: > IOMMUs may declare memory regions spanning from 0 to UINT64_MAX. When > attempting to deal with such region, vfio_listener_region_del() passes a > size of 2^64 to int128_get64() which throws an assertion failure. Even > ignoring this,

Re: [PATCH v2 04/10] softfloat: Add float_cmask and constants

Richard Henderson writes: > Testing more than one class at a time is better done with masks. > This reduces the static branch count. > > Reviewed-by: David Hildenbrand > Signed-off-by: Richard Henderson Reviewed-by: Alex Bennée -- Alex Bennée

Re: [PATCH v2 03/10] softfloat: Tidy a * b + inf return

Richard Henderson writes: > No reason to set values in 'a', when we already > have float_class_inf in 'c', and can flip that sign. > > Reviewed-by: David Hildenbrand > Signed-off-by: Richard Henderson Reviewed-by: Alex Bennée -- Alex Bennée

Re: [RFC PATCH 00/12] hw/arm/virt: Introduce cpu and cache topology support

On 10/15/2020 3:59 PM, Andrew Jones wrote: On Thu, Oct 15, 2020 at 10:07:16AM +0800, Ying Fang wrote: On 10/14/2020 2:08 AM, Andrew Jones wrote: On Tue, Oct 13, 2020 at 12:11:20PM +, Zengtao (B) wrote: Cc valentin -Original Message- From: Qemu-devel

Re: [PATCH v2 0/2] hw/rtc/m48t59: Simplify m48t59_init()

On 15/10/2020 20:46, Philippe Mathieu-Daudé wrote: Since v1: - Do not remove mem_base in patch 1 (Laurent) - Pass MemoryRegion* (new patch) - Run check-qtest Philippe Mathieu-Daudé (2): hw/rtc/m48t59: Simplify m48t59_init() removing 'io_base' argument hw/rtc/m48t59: Simplify

Re: [PATCH 0/7] build: replace ninjatool with ninja

On 15/10/2020 22:41, Paolo Bonzini wrote: Il gio 15 ott 2020, 20:49 Mark Cave-Ayland > ha scritto: Is there any reason why https://lists.gnu.org/archive/html/qemu-devel/2020-09/msg06997.html

Re: [PATCH v10 08/10] vfio: Set IOMMU page size as per host supported page size

Hi Jean, On 10/8/20 7:15 PM, Jean-Philippe Brucker wrote: > From: Bharat Bhushan > > Set IOMMU supported page size mask same as host Linux supported page > size mask. > > Signed-off-by: Bharat Bhushan > Signed-off-by: Jean-Philippe Brucker Reviewed-by: Eric Auger Thanks Eric > --- >

Re: [PATCH] meson: move SPHINX_ARGS references within "if build_docs"

Le ven. 16 oct. 2020 11:15, Paolo Bonzini a écrit : > Signed-off-by: Paolo Bonzini > Reviewed-by: Philippe Mathieu-Daudé --- > tests/qapi-schema/meson.build | 88 +-- > 1 file changed, 44 insertions(+), 44 deletions(-) > > diff --git

Re: [PATCH v10 07/10] memory: Add interface to set iommu page size mask

Hi Jean, On 10/8/20 7:15 PM, Jean-Philippe Brucker wrote: > From: Bharat Bhushan > > Allow to set the page size mask supported by an iommu memory region. > This enables a vIOMMU to communicate the page size granule supported by > an assigned device, on hosts that use page sizes greater than

[PATCH] meson: move SPHINX_ARGS references within "if build_docs"

Signed-off-by: Paolo Bonzini --- tests/qapi-schema/meson.build | 88 +-- 1 file changed, 44 insertions(+), 44 deletions(-) diff --git a/tests/qapi-schema/meson.build b/tests/qapi-schema/meson.build index 1f222a7a13..66c7f04cf8 100644 ---

Re: [PATCH v10 05/10] virtio-iommu: Add replay() memory region callback

Hi Jean, On 10/8/20 7:15 PM, Jean-Philippe Brucker wrote: > From: Bharat Bhushan > > Implement the replay callback to setup all mappings for a new memory > region. > > Signed-off-by: Bharat Bhushan > Signed-off-by: Jean-Philippe Brucker > --- > v10: Homogenize tracepoint arguments > --- >

Re: [PATCH v5 2/2] hw/arm/sbsa-ref: add SBSA watchdog device

On Thu, Oct 15, 2020 at 06:21:09PM +0300, Maxim Uvarov wrote: > On Thu, 15 Oct 2020 at 17:12, Graeme Gregory wrote: > > > > On Wed, Oct 14, 2020 at 01:04:43PM -0400, Shashi Mallela wrote: > > > This was added as a placeholder for the virt requirement suggested by > > > Maxim > > > earlier.Agreed

Re: [PATCH] meson: Only install icons and qemu.desktop if have_system

Le jeu. 15 oct. 2020 22:22, Bruce Rogers a écrit : > These files are not needed for a linux-user only install. > Signed-off-by: Bruce Rogers > --- > ui/meson.build | 7 +-- > 1 file changed, 5 insertions(+), 2 deletions(-) > > diff --git a/ui/meson.build b/ui/meson.build > index

Re: [PATCH] hax: unbreak accelerator cpu code after cpus.c split

Le ven. 16 oct. 2020 10:03, Claudio Fontana a écrit : > during my split of cpus.c, code line > "current_cpu = cpu" > was removed by mistake, causing hax to break. > > This commit fixes the situation restoring it. > > Reported-by: Volker Rümelin > Fixes: e92558e4bf8059ce4f0b310afe218802b72766bc

Re: [PATCH v10 06/10] virtio-iommu: Add notify_flag_changed() memory region callback

Hi Jean, On 10/8/20 7:15 PM, Jean-Philippe Brucker wrote: > From: Bharat Bhushan > > Add notify_flag_changed() to notice when memory listeners are added and > removed. > > Signed-off-by: Bharat Bhushan > Signed-off-by: Jean-Philippe Brucker > --- > v10: > * Use notifier flags instead of

[PATCH v5 4/4] cirrus: Enable doc build on msys2/mingw

Currently rST depends on old version sphinx-2.x. Install it by downloading it. Remove the need of university mirror, the main repo are recovered. Signed-off-by: Yonggang Luo --- .cirrus.yml | 6 +- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/.cirrus.yml b/.cirrus.yml index

[PATCH v5 0/4] Fixes docs building on msys2/mingw

V4-V5 Revise * docs: Fixes build docs on msys2/mingw For easier to review. Revise * meson: Move the detection logic for sphinx to meson According Paolo's suggestion with fixes. V3-V4 Quic fixes of python style if xxx: tested locally V2-V3 No need convert perl trick to python script anymore

[PATCH v5 2/4] configure: the docdir option should passed to meson as is.

Signed-off-by: Yonggang Luo --- configure | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/configure b/configure index 78062fb091..432ea124e1 100755 --- a/configure +++ b/configure @@ -968,7 +968,7 @@ for opt do ;; --with-suffix=*) qemu_suffix="$optarg" ;; -

[PATCH v5 3/4] meson: Move the detection logic for sphinx to meson

Signed-off-by: Yonggang Luo --- configure | 59 +++ docs/meson.build | 4 +-- meson.build | 52 ++ meson_options.txt | 5 ++- tests/qapi-schema/meson.build | 2 +- 5

[PATCH v5 1/4] docs: Fixes build docs on msys2/mingw

meson didn't support running ../scripts/kernel-do directly Add the perl as the first parameter Signed-off-by: Yonggang Luo --- docs/sphinx/kerneldoc.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/docs/sphinx/kerneldoc.py b/docs/sphinx/kerneldoc.py index

Re: [PATCH v4 3/4] meson: Move the detection logic for sphinx to meson

On Fri, Oct 16, 2020 at 4:05 PM Paolo Bonzini wrote: > > On 16/10/20 09:57, Paolo Bonzini wrote: > > On 16/10/20 09:52, 罗勇刚(Yonggang Luo) wrote: > >> > >>> build_docs = false > >>> if sphinx_build.found() > >>> # This is a bit awkward but works: create a trivial document and > >>> # try to

Re: [PATCH] hax: unbreak accelerator cpu code after cpus.c split

On 16/10/20 10:00, Claudio Fontana wrote: > during my split of cpus.c, code line > "current_cpu = cpu" > was removed by mistake, causing hax to break. > > This commit fixes the situation restoring it. > > Reported-by: Volker Rümelin > Fixes: e92558e4bf8059ce4f0b310afe218802b72766bc >

Re: [PATCH v4 3/4] meson: Move the detection logic for sphinx to meson

On 16/10/20 09:57, Paolo Bonzini wrote: > On 16/10/20 09:52, 罗勇刚(Yonggang Luo) wrote: >> >>> build_docs = false >>> if sphinx_build.found() >>>   # This is a bit awkward but works: create a trivial document and >>>   # try to run it with our configuration file (which enforces a >>>   # version

Re: [PATCH v10 04/10] virtio-iommu: Call memory notifiers in attach/detach

Hi jean, On 10/8/20 7:15 PM, Jean-Philippe Brucker wrote: > From: Bharat Bhushan > > Call the memory notifiers when attaching an endpoint to a domain, to > replay existing mappings, and when detaching the endpoint, to remove all > mappings. > > Signed-off-by: Bharat Bhushan > Signed-off-by:

Re: [PULL 07/37] cpus: extract out hax-specific code to target/i386/

On 10/16/20 8:48 AM, Volker Rümelin wrote: >> From: Claudio Fontana >> >> register a "CpusAccel" interface for HAX as well. >> > >> diff --git a/softmmu/cpus.c b/softmmu/cpus.c >> index 9fa73735a2..900fff827a 100644 >> --- a/softmmu/cpus.c >> +++ b/softmmu/cpus.c >> @@ -416,35 +403,6 @@ void

Re: [PATCH v4 3/4] meson: Move the detection logic for sphinx to meson

On Fri, Oct 16, 2020 at 3:57 PM Paolo Bonzini wrote: > > On 16/10/20 09:52, 罗勇刚(Yonggang Luo) wrote: > > > >> build_docs = false > >> if sphinx_build.found() > >> # This is a bit awkward but works: create a trivial document and > >> # try to run it with our configuration file (which enforces

[PATCH] hax: unbreak accelerator cpu code after cpus.c split

during my split of cpus.c, code line "current_cpu = cpu" was removed by mistake, causing hax to break. This commit fixes the situation restoring it. Reported-by: Volker Rümelin Fixes: e92558e4bf8059ce4f0b310afe218802b72766bc Signed-off-by: Claudio Fontana --- target/i386/hax-cpus.c | 1 + 1

Re: [PATCH v10 03/10] virtio-iommu: Add memory notifiers for map/unmap

Hi Jean, On 10/8/20 7:15 PM, Jean-Philippe Brucker wrote: > From: Bharat Bhushan > > Extend VIRTIO_IOMMU_T_MAP/UNMAP request to notify memory listeners. It > will call VFIO notifier to map/unmap regions in the physical IOMMU. > > Signed-off-by: Bharat Bhushan > Signed-off-by: Eric Auger >

Re: [PATCH v4 3/4] meson: Move the detection logic for sphinx to meson

On Fri, Oct 16, 2020 at 3:57 PM Paolo Bonzini wrote: > > On 16/10/20 09:52, 罗勇刚(Yonggang Luo) wrote: > > > >> build_docs = false > >> if sphinx_build.found() > >> # This is a bit awkward but works: create a trivial document and > >> # try to run it with our configuration file (which enforces

Re: [PATCH v4 3/4] meson: Move the detection logic for sphinx to meson

On 16/10/20 09:52, 罗勇刚(Yonggang Luo) wrote: > >> build_docs = false >> if sphinx_build.found() >>   # This is a bit awkward but works: create a trivial document and >>   # try to run it with our configuration file (which enforces a >>   # version requirement). This will fail if sphinx-build is

Re: [PATCH v4 3/4] meson: Move the detection logic for sphinx to meson

On Fri, Oct 16, 2020 at 3:46 PM Paolo Bonzini wrote: > > Here is a better way to write the meson test: > > if get_option('sphinx_build') == '' > sphinx_build = find_program(['sphinx-build-3', 'sphinx-build'], > required: get_option('docs')) > else > sphinx_build

Re: [PATCH v4 3/4] meson: Move the detection logic for sphinx to meson

Here is a better way to write the meson test: if get_option('sphinx_build') == '' sphinx_build = find_program(['sphinx-build-3', 'sphinx-build'], required: get_option('docs')) else sphinx_build = find_program(get_option('sphinx_build'),

Re: [PATCH v10 02/10] virtio-iommu: Store memory region in endpoint struct

Hi Jean, On 10/8/20 7:15 PM, Jean-Philippe Brucker wrote: > Store the memory region associated to each endpoint into the endpoint > structure, to allow efficient memory notification on map/unmap. > > Signed-off-by: Jean-Philippe Brucker Acked-by: Eric Auger > --- > Not super confident about

Re: [PATCH v10 01/10] virtio-iommu: Fix virtio_iommu_mr()

Hi Jean, On 10/8/20 7:15 PM, Jean-Philippe Brucker wrote: > Due to an invalid mask, virtio_iommu_mr() may return the wrong memory > region. It hasn't been too problematic so far because the function was > only used to test existence of an endpoint, but that is about to change. > > Fixes:

Re: [PATCH] meson: Only install icons and qemu.desktop if have_system

On 15/10/20 22:18, Bruce Rogers wrote: > These files are not needed for a linux-user only install. > > Signed-off-by: Bruce Rogers > --- > ui/meson.build | 7 +-- > 1 file changed, 5 insertions(+), 2 deletions(-) > > diff --git a/ui/meson.build b/ui/meson.build > index

Re: [PATCH V14 0/8] mips: Add Loongson-3 machine support

Patchew URL: https://patchew.org/QEMU/1602831120-3377-1-git-send-email-che...@lemote.com/ Hi, This series seems to have some coding style problems. See output below for more information: Type: series Message-id: 1602831120-3377-1-git-send-email-che...@lemote.com Subject: [PATCH V14 0/8]

[PATCH V14 5/8] hw/mips: Implement fw_cfg_arch_key_name()

Implement fw_cfg_arch_key_name(), which returns the name of a mips-specific key. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Huacai Chen Co-developed-by: Jiaxun Yang --- hw/mips/fw_cfg.c| 35 +++ hw/mips/fw_cfg.h| 19 +++

Re: [PATCH v2 1/3] macio: don't reference serial_hd() directly within the device

On 16/10/2020 01:16, David Gibson wrote: On Tue, Oct 13, 2020 at 12:49:20PM +0100, Mark Cave-Ayland wrote: Instead use qdev_prop_set_chr() to configure the ESCC serial chardevs at the Mac Old World and New World machine level. Also remove the now obsolete comment referring to the use of

[PATCH V14 4/8] target/mips: Add loongson-ext lsdc2 group of instructions

From: Jiaxun Yang LDC2/SDC2 opcodes have been rewritten as "load & store with offset" group of instructions by loongson-ext ASE. This patch add implementation of these instructions: gslbx: load 1 bytes to GPR gslhx: load 2 bytes to GPR gslwx: load 4 bytes to GPR gsldx: load 8 bytes to GPR

[PATCH V14 8/8] docs/system: Update MIPS machine documentation

Add Loongson-3A CPU models and Loongson-3 based machine description. Signed-off-by: Huacai Chen --- docs/system/cpu-models-mips.rst.inc | 10 -- docs/system/target-mips.rst | 10 ++ 2 files changed, 18 insertions(+), 2 deletions(-) diff --git

[PATCH V14 3/8] target/mips: Add loongson-ext lswc2 group of instructions (Part 2)

From: Jiaxun Yang LWC2 & SWC2 have been rewritten by Loongson EXT vendor ASE as "load/store quad word" and "shifted load/store" groups of instructions. This patch add implementation of these instructions: gslwlc1: similar to lwl but RT is FPR instead of GPR gslwrc1: similar to lwr but RT is FPR

[PATCH V14 6/8] hw/mips: Add Loongson-3 boot parameter helpers

Preparing to add Loongson-3 machine support, add Loongson-3's LEFI (a UEFI-like interface for BIOS-Kernel boot parameters) helpers first. Signed-off-by: Huacai Chen Co-developed-by: Jiaxun Yang --- hw/mips/loongson3_bootp.c | 162 +++ hw/mips/loongson3_bootp.h | 225

[PATCH V14 7/8] hw/mips: Add Loongson-3 machine support

Add Loongson-3 based machine support, it use liointc as the interrupt controler and use GPEX as the pci controller. Currently it can work with both TCG and KVM. As the machine model is not based on any exiting physical hardware, the name of the machine is "loongson3-virt". It may be superseded in

[PATCH V14 2/8] target/mips: Add loongson-ext lswc2 group of instructions (Part 1)

From: Jiaxun Yang LWC2 & SWC2 have been rewritten by Loongson EXT vendor ASE as "load/store quad word" and "shifted load/store" groups of instructions. This patch add implementation of these instructions: gslq: load 16 bytes to GPR gssq: store 16 bytes from GPR gslqc1: load 16 bytes to FPR

Re: [PATCH v2 2/3] grackle: use qdev gpios for PCI IRQs

On 16/10/2020 07:45, Howard Spoelstra wrote: Hi, I see compilation of the current ppc-for-5.2 branch fail with: ../hw/pci-host/grackle.c: In function ‘grackle_realize’: ../hw/pci-host/grackle.c:68:11: error: ‘GrackleState’ has no member named ‘pic’    68 |     if (!s->pic) {       |        

[PATCH V14 0/8] mips: Add Loongson-3 machine support

Loongson-3 CPU family include Loongson-3A R1/R2/R3/R4 and Loongson-3B R1/R2. Loongson-3A R1 is the oldest and its ISA is the smallest, while Loongson-3A R4 is the newest and its ISA is almost the superset of all others. To reduce complexity, in QEMU we just define two CPU types: 1,

[PATCH V14 1/8] target/mips: Fix PageMask with variable page size

From: Jiaxun Yang Our current code assumed the target page size is always 4k when handling PageMask and VPN2, however, variable page size was just added to mips target and that's no longer true. Fixes: ee3863b9d414 ("target/mips: Support variable page size") Signed-off-by: Jiaxun Yang

Re: [PULL 07/37] cpus: extract out hax-specific code to target/i386/

> From: Claudio Fontana > > register a "CpusAccel" interface for HAX as well. > > diff --git a/softmmu/cpus.c b/softmmu/cpus.c > index 9fa73735a2..900fff827a 100644 > --- a/softmmu/cpus.c > +++ b/softmmu/cpus.c > @@ -416,35 +403,6 @@ void qemu_wait_io_event(CPUState *cpu) >

Re: [PATCH v2 2/3] grackle: use qdev gpios for PCI IRQs

On Fri, Oct 16, 2020 at 2:30 AM David Gibson wrote: > On Tue, Oct 13, 2020 at 12:49:21PM +0100, Mark Cave-Ayland wrote: > > Currently an object link property is used to pass a reference to the > Heathrow > > PIC into the PCI host bridge so that grackle_init_irqs() can connect the > PCI > > IRQs

[Bug 1856834] Re: PCI broken in qemu ppc e500 in v2.12.0 and other versions

Not even reverting the patch worked for me, and it's still broken on qemu 5.1. For example: ~/OSS/qemu/ppc-softmmu/qemu-system-ppc -machine mpc8544ds -nographic -cpu e500mc -serial mon:stdio -kernel zImage -initrd rootfs.ird -append 'console=ttyS0,115200' -device e1000,netdev=main -netdev

[PATCH V2 10/10] net/colo-compare.c: Increase default queued packet scan frequency

From: Zhang Chen In my test, use this default parameter looks better. Signed-off-by: Zhang Chen --- net/colo-compare.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/net/colo-compare.c b/net/colo-compare.c index 0c87fd9e33..337025b44f 100644 --- a/net/colo-compare.c +++

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