Re: [PATCH v2] gitlab-ci.yml: Add openSUSE Leap 15.2 for gitlab CI/CD

Hi Thomas, Sorry for late reply, Thomas Huth 於 2020年12月18日 週五 下午7:14寫道： > > On 11/12/2020 14.09, Thomas Huth wrote: > > On 10/12/2020 10.32, AL Yu-Chen Cho wrote: > >> Hi Thomas, > >> > >> I try to reproduce this failed in my repo, but it seems works fine. > >> Would you please give it a try

Deprecation of the LM32 target

Hello! I was just browsing through the QEMU Christmas Calendar [1] and noticed the announcement for the deprecation of the LM32 target. I'm not sure what the motivation of the deprecation is, but isn't one of the big selling points of QEMU to support deprecated targets? If QEMU eventually ends

Re: [PATCH v3 3/8] hw/pci-host/bonito: Fixup IRQ mapping

On Thu, 24 Dec 2020, Jiaxun Yang wrote: Accroading to arch/mips/pci/fixup-fuloong2e.c in kernel, Typo: According How come, you say you can boot to Debian installer but don't need any IDE changes when the kernel you submitted as test was shown not working with current IDE emulation? Which

Re: [PATCH v3 6/7] qapi: Use QAPI_LIST_APPEND in trivial cases

24.12.2020 01:11, Eric Blake wrote: The easiest spots to use QAPI_LIST_APPEND are where we already have an obvious pointer to the tail of a list. While at it, consistently use the variable name 'tail' for that purpose. Signed-off-by: Eric Blake --- [..] --- a/monitor/qmp-cmds-control.c

Re: Problems with irq mapping in qemu v5.2

On Wed, 23 Dec 2020, Guenter Roeck wrote: On Thu, Dec 24, 2020 at 02:34:07AM +0100, BALATON Zoltan wrote: [ ... ] If we need legacy mode then we may be able to emulate that by setting BARs to legacy ports ignoring what values are written to them if legacy mode config is set (which may be what

Re: [PATCH v3 5/8] hw/mips/fuloong2e: Remove unused env entry

On Thu, 24 Dec 2020, Jiaxun Yang wrote: modetty is not handled by kernel and the parameter here seems unreasonable. Signed-off-by: Jiaxun Yang --- v3: Bring busclock back --- hw/mips/fuloong2e.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/hw/mips/fuloong2e.c b/hw/mips/fuloong2e.c index

Re: [PATCH v3 3/8] hw/pci-host/bonito: Fixup IRQ mapping

On Thu, 24 Dec 2020, BALATON Zoltan via wrote: On Thu, 24 Dec 2020, Jiaxun Yang wrote: Accroading to arch/mips/pci/fixup-fuloong2e.c in kernel, Typo: According How come, you say you can boot to Debian installer but don't need any IDE changes when the kernel you submitted as test was shown

[PATCH v3] gitlab-ci.yml: Add openSUSE Leap 15.2 for gitlab CI/CD

Add build-system-opensuse jobs and opensuse-leap.docker dockerfile. Use openSUSE Leap 15.2 container image in the gitlab-CI. Signed-off-by: Cho, Yu-Chen --- v3: Drop the "acceptance-system-opensuse" job part of the patch for now to get at least the basic compile-coverage v2: Drop some package

Re: [PATCH v2 1/2] ppc: Fix build with --without-default-devices

On 12/23/20 8:26 PM, Greg Kurz wrote: > Linking of the qemu-system-ppc64 fails on a POWER9 host when > --without-default-devices is passed to configure: > > $ ./configure --without-default-devices \ > --target-list=ppc64-softmmu && make > > ... > >

Re: [RFC v7 12/26] vfio: Set up nested stage mappings

Hi Eric, On 2020/11/17 2:13, Eric Auger wrote: In nested mode, legacy vfio_iommu_map_notify cannot be used as there is no "caching" mode and we do not trap on map. On Intel, vfio_iommu_map_notify was used to DMA map the RAM through the host single stage. With nested mode, we need to setup the

Re: Problems with irq mapping in qemu v5.2

On Thu, 24 Dec 2020, Philippe Mathieu-Daudé wrote: On Thu, Dec 24, 2020 at 9:11 AM BALATON Zoltan wrote: On Wed, 23 Dec 2020, Guenter Roeck wrote: On Thu, Dec 24, 2020 at 02:34:07AM +0100, BALATON Zoltan wrote: [ ... ] If we need legacy mode then we may be able to emulate that by setting

[PATCH 00/15] tcg/arm: host neon support

Based-on: 20201217145215.534637-1-richard.hender...@linaro.org ("tcg: Better handling of constants") Based-on: 20201223060204.576856-1-richard.hender...@linaro.org ("tcg: backend constraints cleanup") Generate NEON instructions for tcg vector operations. r~ Richard Henderson (15): tcg/arm:

[PATCH 05/15] tcg: Change parameters for tcg_target_const_match

Change the return value to bool, because that's what is should have been from the start. Pass the ct mask instead of the whole TCGArgConstraint, as that's the only part that's relevant. Change the value argument to int64_t. We will need the extra width for 32-bit hosts wanting to match vector

[PATCH 02/15] tcg/arm: Implement tcg_out_ld/st for vector types

Signed-off-by: Richard Henderson --- tcg/arm/tcg-target.c.inc | 70 1 file changed, 64 insertions(+), 6 deletions(-) diff --git a/tcg/arm/tcg-target.c.inc b/tcg/arm/tcg-target.c.inc index 48966da12f..7122d5f390 100644 --- a/tcg/arm/tcg-target.c.inc +++

[PATCH 01/15] tcg/arm: Add host vector framework

Add registers and function stubs. The functionality is disabled via use_neon_instructions defined to 0. We must still include results for the mandatory opcodes in tcg_target_op_def, as all opcodes are checked during tcg init. Signed-off-by: Richard Henderson --- tcg/arm/tcg-target-conset.h |

[PATCH 06/15] tcg/arm: Implement minimal vector operations

Implementing dup2, add, sub, and, or, xor as the minimal set. This allows us to actually enable neon in the header file. Signed-off-by: Richard Henderson --- tcg/arm/tcg-target-conset.h | 3 + tcg/arm/tcg-target-constr.h | 2 + tcg/arm/tcg-target.h| 6 +- tcg/arm/tcg-target.c.inc

[PATCH 03/15] tcg/arm: Implement tcg_out_mov for vector types

Signed-off-by: Richard Henderson --- tcg/arm/tcg-target.c.inc | 50 +++- 1 file changed, 44 insertions(+), 6 deletions(-) diff --git a/tcg/arm/tcg-target.c.inc b/tcg/arm/tcg-target.c.inc index 7122d5f390..acc8f2c44a 100644 --- a/tcg/arm/tcg-target.c.inc +++

[PATCH 04/15] tcg/arm: Implement tcg_out_dup*_vec

Most of dupi is copied from tcg/aarch64, which has the same encoding for AdvSimdExpandImm. Signed-off-by: Richard Henderson --- tcg/arm/tcg-target.c.inc | 282 +-- 1 file changed, 274 insertions(+), 8 deletions(-) diff --git a/tcg/arm/tcg-target.c.inc

[PATCH 07/15] tcg/arm: Implement andc, orc, abs, neg, not vector operations

These logical and arithmetic operations are optional, but are trivial to accomplish with the existing infrastructure. Signed-off-by: Richard Henderson --- tcg/arm/tcg-target-conset.h | 1 + tcg/arm/tcg-target.h| 10 +- tcg/arm/tcg-target.c.inc| 38

[PATCH 08/15] tcg/arm: Implement TCG_TARGET_HAS_shi_vec

This consists of the three immediate shifts: shli, shri, sari. Signed-off-by: Richard Henderson --- tcg/arm/tcg-target.h | 2 +- tcg/arm/tcg-target.c.inc | 27 +++ 2 files changed, 28 insertions(+), 1 deletion(-) diff --git a/tcg/arm/tcg-target.h

[PATCH 10/15] tcg/arm: Implement TCG_TARGET_HAS_sat_vec

This is saturating add and subtract, signed and unsigned. Signed-off-by: Richard Henderson --- tcg/arm/tcg-target.h | 2 +- tcg/arm/tcg-target.c.inc | 24 2 files changed, 25 insertions(+), 1 deletion(-) diff --git a/tcg/arm/tcg-target.h b/tcg/arm/tcg-target.h

[PATCH 09/15] tcg/arm: Implement TCG_TARGET_HAS_mul_vec

Signed-off-by: Richard Henderson --- tcg/arm/tcg-target.h | 2 +- tcg/arm/tcg-target.c.inc | 6 ++ 2 files changed, 7 insertions(+), 1 deletion(-) diff --git a/tcg/arm/tcg-target.h b/tcg/arm/tcg-target.h index 344b0d3199..8e5b304a5a 100644 --- a/tcg/arm/tcg-target.h +++

[PATCH 12/15] tcg/arm: Implement TCG_TARGET_HAS_bitsel_vec

NEON has 3 instructions implementing this 4 argument operation, with each insn overlapping a different logical input onto the destination register. Signed-off-by: Richard Henderson --- tcg/arm/tcg-target-conset.h | 1 + tcg/arm/tcg-target.h| 2 +- tcg/arm/tcg-target.c.inc| 22

[PATCH 11/15] tcg/arm: Implement TCG_TARGET_HAS_minmax_vec

This is minimum and maximu, signed and unsigned. Signed-off-by: Richard Henderson --- tcg/arm/tcg-target.h | 2 +- tcg/arm/tcg-target.c.inc | 24 2 files changed, 25 insertions(+), 1 deletion(-) diff --git a/tcg/arm/tcg-target.h b/tcg/arm/tcg-target.h index

[PATCH 13/15] tcg/arm: Implement TCG_TARGET_HAS_shv_vec

The three vector shift by vector operations are all implemented via expansion. Therefore do not actually set TCG_TARGET_HAS_shv_vec, as none of shlv_vec, shrv_vec, sarv_vec may actually appear in the instruction stream, and therefore also do not appear in tcg_target_op_def. Signed-off-by:

[PATCH 14/15] tcg/arm: Implement TCG_TARGET_HAS_roti_vec

Implement via expansion, so don't actually set TCG_TARGET_HAS_roti_vec. For NEON, this is shift-right followed by shift-left-and-insert. Signed-off-by: Richard Henderson --- tcg/arm/tcg-target-conset.h | 1 + tcg/arm/tcg-target.opc.h| 1 + tcg/arm/tcg-target.c.inc| 15 +++

[PATCH 15/15] tcg/arm: Implement TCG_TARGET_HAS_rotv_vec

Implement via expansion, so don't actually set TCG_TARGET_HAS_rotv_vec. Signed-off-by: Richard Henderson --- tcg/arm/tcg-target.c.inc | 33 - 1 file changed, 32 insertions(+), 1 deletion(-) diff --git a/tcg/arm/tcg-target.c.inc b/tcg/arm/tcg-target.c.inc index

[PATCH 2/2] via-ide: Fix fuloong2e support

From: Guenter Roeck Fuloong2e needs to use legacy mode for IDE support to work with Linux. Add property to via-ide driver to make the mode configurable, and set legacy mode for Fuloong2e. Signed-off-by: Guenter Roeck [balaton: Use bit in flags for property, add comment for missing BAR4]

[PATCH 0/2] Fix via-ide for fuloong2e

This implements the legacy-mode emulation option for via-ide which is needed for Linux on fuloong2e. I've tested that the Debian kernel now finds CD ROM and MorphOS on pegasos2 is not affected by this. BALATON Zoltan (1): ide: Make room for flags in PCIIDEState and add one for legacy mode

[PATCH 1/2] ide: Make room for flags in PCIIDEState and add one for legacy mode

We'll need a flag for implementing some device specific behaviour in via-ide but we already have a currently CMD646 specific field that can be repurposed for this and leave room for furhter flags if needed in the future. This patch changes the "secondary" field to "flags" and change CMD646 and its

Re: [PATCH v2 1/2] ppc: Fix build with --without-default-devices

On 12/24/20 11:29 AM, Paolo Bonzini wrote: > On 24/12/20 09:26, Cédric Le Goater wrote: >> In hw/ppc/Kconfig : >> >>    config POWERNV >>    ... >>    select XICS >>    select XIVE >> >>    config PSERIES >>    ... >>    select XICS_SPAPR >>    select XIVE_SPAPR >> >> and

Re: [PATCH v2 1/2] ppc: Fix build with --without-default-devices

Why? It's all KVM. Paolo Il gio 24 dic 2020, 11:58 Philippe Mathieu-Daudé ha scritto: > On 12/23/20 8:26 PM, Greg Kurz wrote: > > Linking of the qemu-system-ppc64 fails on a POWER9 host when > > --without-default-devices is passed to configure: > > > > $ ./configure --without-default-devices \

Re: [PATCH v2 2/2] pnv: Fix reverse dependency on PCI express root ports

On 23/12/20 20:26, Greg Kurz wrote: This is done through a new PCI_POWERNV config in hw/pci-host/Kconfig Yes, this is cleaner. Thanks! Paolo

Re: [PATCH v2 2/2] pnv: Fix reverse dependency on PCI express root ports

On 12/23/20 8:26 PM, Greg Kurz wrote: > qemu-system-ppc64 built with --without-default-devices crashes: > > Type 'pnv-phb4-root-port' is missing its parent 'pcie-root-port-base' > Aborted (core dumped) > > Have POWERNV to select PCIE_PORT. This is done through a > new PCI_POWERNV config in

Re: [PATCH v2 1/2] ppc: Fix build with --without-default-devices

On 12/23/20 8:26 PM, Greg Kurz wrote: > Linking of the qemu-system-ppc64 fails on a POWER9 host when > --without-default-devices is passed to configure: > > $ ./configure --without-default-devices \ > --target-list=ppc64-softmmu && make > > ... > >

Re: [RFC PATCH v2] x86/cpu: initialize the CPU concurrently

Hi Eduardo, Sorry for the delay. On 2020/12/22 5:36, Eduardo Habkost wrote: > On Mon, Dec 21, 2020 at 07:36:18PM +0800, Zhenyu Ye wrote: >> Providing a optional mechanism to wait for all VCPU threads be >> created out of qemu_init_vcpu(), then we can initialize the cpu >> concurrently on the x86

Re: [PATCH v2 1/2] ppc: Fix build with --without-default-devices

On 24/12/20 09:26, Cédric Le Goater wrote: In hw/ppc/Kconfig : config POWERNV ... select XICS select XIVE config PSERIES ... select XICS_SPAPR select XIVE_SPAPR and in hw/intc/meson.build : specific_ss.add(when: 'CONFIG_POWERNV', if_true:

Re: [PATCH v3 7/7] qapi: More complex uses of QAPI_LIST_APPEND

24.12.2020 01:11, Eric Blake wrote: These cases require a bit more thought to review; in each case, the code was appending to a list, but not with a FOOList **tail variable. Signed-off-by: Eric Blake --- [..] diff --git a/migration/migration.c b/migration/migration.c index

Re: Problems with irq mapping in qemu v5.2

On Thu, Dec 24, 2020 at 9:11 AM BALATON Zoltan wrote: > On Wed, 23 Dec 2020, Guenter Roeck wrote: > > On Thu, Dec 24, 2020 at 02:34:07AM +0100, BALATON Zoltan wrote: > > [ ... ] > >> > >> If we need legacy mode then we may be able to emulate that by setting BARs > >> to legacy ports ignoring what

Re: [PATCH v2 1/2] ppc: Fix build with --without-default-devices

On 12/24/20 3:42 PM, Paolo Bonzini wrote: > Why? It's all KVM. I find it not obvious to figure out by simply looking at this diff. I'm probably too tired. Anyway Cédric already reviewed it. > > Paolo > > Il gio 24 dic 2020, 11:58 Philippe Mathieu-Daudé > ha scritto: >

[PATCH v3 1/3] ppc: Fix build with --without-default-devices

Linking of the qemu-system-ppc64 fails on a POWER9 host when --without-default-devices is passed to configure: $ ./configure --without-default-devices \ --target-list=ppc64-softmmu && make ... libqemu-ppc64-softmmu.fa.p/hw_ppc_e500.c.o: In function `ppce500_init_mpic_kvm':

[PATCH v3 2/3] ppc: Simplify reverse dependencies of POWERNV and PSERIES on XICS and XIVE

Have PSERIES to select XICS and XIVE, and directly check PSERIES in hw/intc/meson.build to enable build of the XICS and XIVE sPAPR backends, like POWERNV already does. This allows to get rid of the intermediate XICS_SPAPR and XIVE_SPAPR. Signed-off-by: Greg Kurz --- hw/intc/Kconfig |4

[PATCH v3 3/3] pnv: Fix reverse dependency on PCI express root ports

qemu-system-ppc64 built with --without-default-devices crashes: Type 'pnv-phb4-root-port' is missing its parent 'pcie-root-port-base' Aborted (core dumped) Have POWERNV to select PCIE_PORT. This is done through a new PCI_POWERNV config in hw/pci-host/Kconfig since POWERNV doesn't have a direct

Re: [RFC PATCH v2] x86/cpu: initialize the CPU concurrently

On Thu, Dec 24, 2020 at 09:41:10PM +0800, Zhenyu Ye wrote: > Hi Eduardo, > > Sorry for the delay. > > On 2020/12/22 5:36, Eduardo Habkost wrote: > > On Mon, Dec 21, 2020 at 07:36:18PM +0800, Zhenyu Ye wrote: > >> Providing a optional mechanism to wait for all VCPU threads be > >> created out of

[Bug 1909256] [NEW] compile failure if gnutls headers not on default include path

Public bug reported: If the gnutls headers are not on the default compiler include path, then configure correctly finds them and config-host.mak sets up the variables: GNUTLS_CFLAGS=-I/opt/homebrew/Cellar/gnutls/3.6.15/include -I/opt/homebrew/Cellar/nettle/3.6/include

[Bug 1909247] [NEW] QEMU: use after free vulnerability in esp_do_dma() in hw/scsi/esp.c

*** This bug is a security vulnerability *** Public security bug reported: A use-after-free vulnerability was found in the am53c974 SCSI host bus adapter emulation of QEMU. It could occur in the esp_do_dma() function in hw/scsi/esp.c while handling the 'Information Transfer' command (CMD_TI). A

[Bug 1909247] Re: QEMU: use after free vulnerability in esp_do_dma() in hw/scsi/esp.c

RHBZ: https://bugzilla.redhat.com/show_bug.cgi?id=1909996 -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. https://bugs.launchpad.net/bugs/1909247 Title: QEMU: use after free vulnerability in esp_do_dma() in hw/scsi/esp.c Status

[PATCH] hw/scsi/megasas: check for NULL frame in megasas_command_cancelled()

Ensure that 'cmd->frame' is not NULL before accessing the 'header' field. This check prevents a potential NULL pointer dereference issue. RHBZ: https://bugzilla.redhat.com/show_bug.cgi?id=1910346 Signed-off-by: Mauro Matteo Cascella Reported-by: Cheolwoo Myung --- hw/scsi/megasas.c | 2 +- 1

[Bug 1909261] [NEW] [OSS-Fuzz] Issue 28929 xhci: ASSERT: xfer->packet.status != USB_RET_NAK

Public bug reported: === Reproducer === ./qemu-system-i386 -m 512M -machine q35,accel=qtest \ -drive file=null-co://,if=none,format=raw,id=disk0 \ -device qemu-xhci,id=xhci -device usb-tablet,bus=xhci.0 \ -device usb-bot -device usb-storage,drive=disk0 \ -chardev null,id=cd0 -chardev

[Bug 1909261] Re: [OSS-Fuzz] Issue 28929 xhci: ASSERT: xfer->packet.status != USB_RET_NAK

Full reproducer: ./qemu-system-i386 -m 512M -machine q35,accel=qtest \ -drive file=null-co://,if=none,format=raw,id=disk0 \ -device qemu-xhci,id=xhci -device usb-tablet,bus=xhci.0 \ -device usb-bot -device usb-storage,drive=disk0 \ -chardev null,id=cd0 -chardev null,id=cd1 \ -device

Re: [PATCH 1/2] ide: Make room for flags in PCIIDEState and add one for legacy mode

On Fri, Dec 25, 2020 at 12:23:37AM +0100, BALATON Zoltan wrote: > We'll need a flag for implementing some device specific behaviour in > via-ide but we already have a currently CMD646 specific field that can > be repurposed for this and leave room for furhter flags if needed in further > the

Re: [PATCH 4/4] fuzz: delay IO until they can't trigger the crash

On 201223 0920, Qiuhao Li wrote: > On Tue, 2020-12-22 at 13:30 -0500, Alexander Bulekov wrote: > > On 201222 1922, Qiuhao Li wrote: > > > On Mon, 2020-12-21 at 16:17 -0500, Alexander Bulekov wrote: > > > > On 201220 0256, Qiuhao Li wrote: > > > > > Since programmers usually trigger an IO just

Re: [PATCH 2/2] via-ide: Fix fuloong2e support

On Fri, Dec 25, 2020 at 12:23:37AM +0100, BALATON Zoltan wrote: > From: Guenter Roeck > > Fuloong2e needs to use legacy mode for IDE support to work with Linux. > Add property to via-ide driver to make the mode configurable, and set > legacy mode for Fuloong2e. > > Signed-off-by: Guenter Roeck

Re: [PATCH v3 3/8] hw/pci-host/bonito: Fixup IRQ mapping

在 2020/12/24 16:40, BALATON Zoltan 写道: On Thu, 24 Dec 2020, BALATON Zoltan via wrote: On Thu, 24 Dec 2020, Jiaxun Yang wrote: Accroading to arch/mips/pci/fixup-fuloong2e.c in kernel, Typo: According How come, you say you can boot to Debian installer but don't need any IDE changes when

Re: [PATCH 1/3] qapi/net: Add new QMP command for COLO passthrough

On 2020/12/24 上午9:09, Zhang Chen wrote: From: Zhang Chen Since the real user scenario does not need to monitor all traffic. Add colo-passthrough-add and colo-passthrough-del to maintain a COLO network passthrough list. Signed-off-by: Zhang Chen --- net/net.c | 12

Re: [PATCH 0/3] Bypass specific network traffic in COLO

On 2020/12/24 上午9:09, Zhang Chen wrote: From: Zhang Chen Since the real user scenario does not need to monitor all traffic. Hi Chen: It would be better to elaborate more on this. E.g what scenario and who will use those new QMP/HMP commands. Thanks This series give user ability to