Switch the sam460ex board to directly creating and configuring the
UIC, rather than doing it via the old ppcuic_init() helper function.
Signed-off-by: Peter Maydell
---
v1->v2 changes:
* fix typo in UIC 0 CINT wiring
* move local var declarations up
* drop unnecessary TODO comment
* improve c
KVM dirty ring is a new interface to pass over dirty bits from kernel to the
userspace. Instead of using a bitmap for each memory region, the dirty ring
contains an array of dirtied GPAs to fetch (in the form of offset in slots).
For each vcpu there will be one dirty ring that binds to it.
kvm_di
Now we've converted all the callsites to directly create the QOM UIC
device themselves, the ppcuic_init() function is unused and can be
removed. The enum defining PPCUIC symbolic constants can be moved
to the ppc-uic.h header where it more naturally belongs.
Signed-off-by: Peter Maydell
Reviewed-
This patchseries converts the PPC UIC "Universal Interrupt
Controller" to a QOM device. My main reason for doing it is that
this fixes a couple of long-standing trivial Coverity issues -- the
current ppcuic_init() function allocates an array of qemu_irqs which
the callers then leak. (The leak is
Switch the ppc405_uc boards to directly creating and configuring the
UIC, rather than doing it via the old ppcuic_init() helper function.
We retain the API feature of ppc405ep_init() where it passes back
something allowing the callers to wire up devices to the UIC if
they need to, even though neit
Commit 9d7bd0826f introduced a new 'use-disabled-flag' property
set to true by default.
To allow the migration, we set this property to false in the hw_compat,
but in the wrong place (hw_compat_4_1).
Since commit 9d7bd0826f was released with QEMU 5.0, we move
'use-disabled-flag' property to hw_com
On Fri, 8 Jan 2021 at 16:44, Philippe Mathieu-Daudé wrote:
>
> On 1/8/21 4:38 PM, Peter Maydell wrote:
> > Should we also be opening the output file explicitly as
> > utf-8 ? (How do we say "write to sys.stdout as utf-8" for
> > the case where we're doing that?)
>
> I have been wondering about it,
On Mon, 21 Dec 2020 at 16:01, Guenter Roeck wrote:
> Something like the following should do.
>
> qemu-system-arm -M z2 -kernel arch/arm/boot/zImage -no-reboot \
> -initrd rootfs-armv5.cpio \
> --append "rdinit=/sbin/init console=ttyS0" \
> -nographic -monitor null -serial stdio
>
> whe
On Thu, 7 Jan 2021 at 22:02, Richard Henderson
wrote:
>
> On 1/7/21 7:39 AM, Peter Maydell wrote:
> >> +if (align > MO_ALIGN_8) {
> >> +t0 = tcg_temp_new_i64();
> >> +tcg_gen_qemu_ld_i64(t0, clean_addr, midx, MO_LEQ | align);
> >> +tcg_gen_addi_i64(clean
Since commit 1e8b5b1aa16b ("spapr: Allow memory unplug to always succeed")
trying to unplug memory from a guest that doesn't support it (eg. rhel6)
no longer generates an error like it used to. Instead, it leaves the
memory around : only a subsequent reboot or manual use of drmgr within
the guest c
Do you have a test case that will reproduce this bug ?
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https://bugs.launchpad.net/bugs/1904954
Title:
lan9118 bug peeked received message size not equal to actual received
message s
(The line of code you point out is pretty clearly wrong; it would just
be nice to have a test case to confirm that the obvious fix works.)
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https://bugs.launchpad.net/bugs/1904954
Title:
If mremap() is called without the MREMAP_MAYMOVE flag with a start address
just before the end of memory (reserved_va) where new_size would exceed
it (and GUEST_ADDR_MAX), the assert(end - 1 <= GUEST_ADDR_MAX) in
page_set_flags() would trigger.
Add an extra guard to the guest_range_valid() check
When using qemu-i386 to run gobject introspection parts of a webkitgtk
build using musl as libc on a 64 bit host, it sits in an infinite loop
of mremap calls of ever decreasing/increasing addresses.
I suspect something in the musl memory allocation code loops indefinitely
if it only sees ENOMEM
otes/rth-gitlab/tags/pull-tcg-20210107'
> into staging (2021-01-07 20:34:05 +)
>
> are available in the Git repository at:
>
> https://git.linaro.org/people/pmaydell/qemu-arm.git
> tags/pull-target-arm-20210108
>
> for you to fetch changes up to c9f8511ea8d2b80723af0
On 21-01-08 12:19:35, Alex Bennée wrote:
> GNU Global is another tags engine which is more like cscope in being
> able to support finding both references and definitions. You will be
> un-surprised to know it also integrates well with Emacs.
>
> The main benefit of integrating it into find-src-pat
On 1/8/21 6:14 PM, Peter Maydell wrote:
> On Fri, 8 Jan 2021 at 16:44, Philippe Mathieu-Daudé wrote:
>>
>> On 1/8/21 4:38 PM, Peter Maydell wrote:
>>> Should we also be opening the output file explicitly as
>>> utf-8 ? (How do we say "write to sys.stdout as utf-8" for
>>> the case where we're doin
A copy-and-paste error meant that the return value for register offset 0x44
(the RX Status FIFO PEEK register) returned a byte from a bogus offset in
the rx status FIFO. Fix the typo.
Cc: qemu-sta...@nongnu.org
Fixes: https://bugs.launchpad.net/qemu/+bug/1904954
Signed-off-by: Peter Maydell
---
This patchset fixes https://bugs.launchpad.net/bugs/1904954 :
we give a bogus value for the RX Status FIFO peek register,
because of a copy-and-paste error. (This bug has been present since
2009 when the device model was first added.)
Patch 1 fixes the bug; patch 2 does a little bit of tidyup whil
The lan9118 code mostly uses symbolic constants for register offsets;
the exceptions are those which the datasheet doesn't give an official
symbolic name to.
Add some names for the registers which don't already have them, based
on the longer names they are given in the memory map.
Signed-off-by:
When decodetree.py was added in commit 568ae7efae7, QEMU was
using Python 2 which happily reads UTF-8 files in text mode.
Python 3 requires either UTF-8 locale or an explicit encoding
passed to open(). Now that Python 3 is required, explicit
UTF-8 encoding for decodetree source files.
To avoid fur
On 1/8/21 7:04 PM, Peter Maydell wrote:
> A copy-and-paste error meant that the return value for register offset 0x44
> (the RX Status FIFO PEEK register) returned a byte from a bogus offset in
> the rx status FIFO. Fix the typo.
Wow, nice catch :)
Reviewed-by: Philippe Mathieu-Daudé
> Cc: qemu
On 1/8/21 7:04 PM, Peter Maydell wrote:
> The lan9118 code mostly uses symbolic constants for register offsets;
> the exceptions are those which the datasheet doesn't give an official
> symbolic name to.
>
> Add some names for the registers which don't already have them, based
> on the longer name
This patchset should fix this bug:
https://patchew.org/QEMU/20210108180401.2263-1-peter.mayd...@linaro.org/
PS: this isn't a security issue because the lan9118 is used only on
board models that can't run under KVM and so it is not on QEMU's
security boundary.
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Peter Maydell writes:
> In commit 1982e1602d15 we added a new qemu-storage-daemon(1) manpage.
> At the moment new manpages have to be listed both in the conf.py for
> Sphinx and also in docs/meson.build for Meson. We forgot the second
> of those -- correct the omission.
>
> Signed-off-by: Peter
On 1/8/21 1:25 AM, Thomas Huth wrote:
On 07/01/2021 22.38, Joshua Watt wrote:
There are two cases that need to be accounted for when compiling QEMU
for MinGW32:
1) A standalone distribution, where QEMU is self contained and
extracted by the user, such as a user would download from the Q
> Indeed, we can remove this warning for block devices.
Couldn't you simply remove the entire size check logic for block
devices?
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https://bugs.launchpad.net/bugs/1910586
Title:
SD ca
Dear QEMU devs,
I'm Martin, Director of Software at https://ine.com/. At INE we are
developing a very ambisius online platform for Networking and Cyber
Security interactive labs. We will be heavily using QEMU and KVM.
I hate spamming this mailing list with this kind of information, but truly
beli
On Tue, 5 Jan 2021 08:52:51 -0800
Ben Widawsky wrote:
> Fixes since v1 [1]:
> * Defer introducing some commands/registers not yet used (Ben)
> * Add stubbed device_reg_init_common() (Ben)
> * Improve assertions in DVSEC creation (Jonathan)
> * Use 'n' for HDM register offsets (Jonathan)
> *
On 1/8/21 5:22 AM, 罗勇刚(Yonggang Luo) wrote:
>>> UnicodeDecodeError: 'ascii' codec can't decode byte 0xc3 in position
>>> 80: ordinal not in range(128)
> Can we always reading file in decodetree with utf8 encoding
> And convert all decodetree to utf8 encoding, and the problem should resolved.
> ```
On 21-01-08 18:44:04, Jonathan Cameron wrote:
> On Tue, 5 Jan 2021 08:52:51 -0800
> Ben Widawsky wrote:
>
> > Fixes since v1 [1]:
> > * Defer introducing some commands/registers not yet used (Ben)
> > * Add stubbed device_reg_init_common() (Ben)
> > * Improve assertions in DVSEC creation (Jona
SBSS -> SSBS
Signed-off-by: Leif Lindholm
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Peter Maydell
Reviewed-by: Laurent Desnogues
---
target/arm/cpu.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index 7e6c881a7e..5e3cf77ec7 100
The AArch64 view of CLIDR_EL1 extends the ICB field to include also bit
32, as well as adding a Ttype field when FEAT_MTE is implemented.
Extend the clidr field to be able to hold this context.
Signed-off-by: Leif Lindholm
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Peter Maydell
Reviewed-
Add entries present in ARM DDI 0487F.c (August 2020).
Signed-off-by: Leif Lindholm
Reviewed-by: Peter Maydell
Reviewed-by: Laurent Desnogues
---
target/arm/cpu.h | 15 +++
1 file changed, 15 insertions(+)
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index 18c1cb02bb..8300341a2
First, fix a typo in ID_AA64PFR1 (SBSS -> SSBS).
Second, turn clidr in the ARMCPU struct 64-bit, to support all fields defined
by the ARM ARM.
Third, add field definitions for CLIDR (excepting the Ttype fields, since
I was unsure of prefererred naming - Ttype7-Ttype1?).
Fourth add all ID_AA64 re
When FEAT_MTE is implemented, the AArch64 view of CTR_EL0 adds the
TminLine field in bits [37:32].
Extend the ctr field to be able to hold this context.
Signed-off-by: Leif Lindholm
---
target/arm/cpu.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/arm/cpu.h b/target
Signed-off-by: Leif Lindholm
---
target/arm/cpu.h | 31 +++
1 file changed, 31 insertions(+)
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index 063228de2a..18c1cb02bb 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -1736,6 +1736,37 @@ FIELD(V7M_FPCCR, ASPE
Add entries present in ARM DDI 0487F.c (August 2020).
Signed-off-by: Leif Lindholm
Reviewed-by: Peter Maydell
Reviewed-by: Laurent Desnogues
---
target/arm/cpu.h | 28
1 file changed, 28 insertions(+)
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index 8300341a
There was a race condition in the first test where there was already the
"crw" output in the dmesg, but the "0.0.4711" entry has not been created
in the /sys fs yet. Fix it by waiting until it is there.
The second test has even more problems on gitlab-CI. Even after adding some
more synchronizatio
On Fri, Jan 08, 2021 at 07:09:52PM +0100, Philippe Mathieu-Daudé wrote:
> When decodetree.py was added in commit 568ae7efae7, QEMU was
> using Python 2 which happily reads UTF-8 files in text mode.
> Python 3 requires either UTF-8 locale or an explicit encoding
> passed to open(). Now that Python 3
On Fri, Jan 8, 2021 at 5:21 AM David Hildenbrand wrote:
>
> This series fixes booting current upstream Linux kernel compiled by
> clang-11 and clang-12 under TCG.
>
> Decided to pull in already separatly sent patches. The last patch is
> not required to fix the boot issues, but related to patch #3
On Fri, Jan 8, 2021 at 10:54 AM Leif Lindholm wrote:
> When FEAT_MTE is implemented, the AArch64 view of CTR_EL0 adds the
> TminLine field in bits [37:32].
> Extend the ctr field to be able to hold this context.
>
> Signed-off-by: Leif Lindholm
>
Reviewed-by: Hao Wu
> ---
> target/arm/cpu.h |
This patch series include a few more NPCM7XX devices including
- Analog Digital Converter (ADC)
- Pulse Width Modulation (PWM)
We also modified the CLK module to generate clock values using qdev_clock.
These clocks are used to determine various clocks in NPCM7XX devices.
Thank you for your revie
This patch makes NPCM7XX Timer to use a the timer clock generated by the
CLK module instead of the magic number TIMER_REF_HZ.
Reviewed-by: Havard Skinnemoen
Reviewed-by: Tyrone Ting
Signed-off-by: Hao Wu
---
hw/arm/npcm7xx.c | 5
hw/timer/npcm7xx_timer.c | 39
This patch allows NPCM7XX CLK module to compute clocks that are used by
other NPCM7XX modules.
Add a new struct NPCM7xxClockConverterState which represents a
single converter. Each clock converter in CLK module represents one
converter in NPCM7XX CLK Module(PLL, SEL or Divider). Each converter
ta
The ADC is part of NPCM7XX Module. Its behavior is controled by the
ADC_CON register. It converts one of the eight analog inputs into a
digital input and stores it in the ADC_DATA register when enabled.
Users can alter input value by using qom-set QMP command.
Reviewed-by: Havard Skinnemoen
Revi
A device shouldn't access its parent object which is QOM internal.
Instead it should use type cast for this purporse. This patch fixes this
issue for all NPCM7XX Devices.
Signed-off-by: Hao Wu
Reviewed-by: Peter Maydell
---
hw/arm/npcm7xx_boards.c | 2 +-
hw/mem/npcm7xx_mc.c | 2 +-
hw/misc
We add a qtest for the PWM in the previous patch. It proves it works as
expected.
Reviewed-by: Havard Skinnemoen
Reviewed-by: Tyrone Ting
Signed-off-by: Hao Wu
Reviewed-by: Peter Maydell
---
tests/qtest/meson.build| 1 +
tests/qtest/npcm7xx_pwm-test.c | 490 +
QEMU enable the dirty ring feature by specifing the "-accel" sub-parameter.
https://lore.kernel.org/qemu-devel/20210108165050.406906-10-pet...@redhat.com/
Libvirt use "-machine accel=kvm" option to specify the accelerator by default,
which is incompatible with above option.
This patch introduce th
On Fri, Jan 8, 2021 at 1:45 AM David Hildenbrand wrote:
>
> On 08.01.21 03:20, Nick Desaulniers wrote:
> > On Thu, Jan 7, 2021 at 3:27 PM David Hildenbrand
> > wrote:
> >>
> >>
> >>> Am 08.01.2021 um 00:21 schrieb Nick Desaulniers :
> >>>
> >>> On Thu, Jan 7, 2021 at 3:13 PM David Hildenbrand
The PWM module is part of NPCM7XX module. Each NPCM7XX module has two
identical PWM modules. Each module contains 4 PWM entries. Each PWM has
two outputs: frequency and duty_cycle. Both are computed using inputs
from software side.
This module does not model detail pulse signals since it is expens
** Changed in: qemu
Status: New => In Progress
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https://bugs.launchpad.net/bugs/1904954
Title:
lan9118 bug peeked received message size not equal to actual received
message si
On 1/8/21 3:20 AM, David Hildenbrand wrote:
> Looks like something went wrong whiel touching that line. Instead of "r1"
> we need a new temporary. Also, we have to pass MO_TEQ, to indicate that
> we are working with 64-bit values. Let's revert these changes.
>
> Fixes: ff26d287bddc ("target/s390x:
On 1/8/21 3:20 AM, David Hildenbrand wrote:
> RISBHG is broken and currently hinders clang-11 builds of upstream kernels
> from booting: the kernel crashes early, while decompressing the image.
>
> [...]
>Kernel fault: interruption code 0005 ilc:2
>Kernel random base:
>
The FreeBSD project has rewritten bsd-user. We've been working on this for
quite some time (the earliest commits date from 2013). Maybe a dozen people
have worked on this over time, and there's 3 or 4 active developers focused
on FreeBSD changes at the moment.
For a while, we'd merge in upstream c
On 1/8/21 3:20 AM, David Hildenbrand wrote:
> Using get_address() with register identifiers comming from an "r" field
> is wrong: if the "r" field designates "r0", we don't read the content
> and instead assume 0 - which should only be applied when the register
> was specified via "b" or "x".
>
>
On 1/8/21 3:20 AM, David Hildenbrand wrote:
> In our EXECUTE fast path, we have to ignore the content of r0, if
> specified by b1 or b2.
>
> Fixes: d376f123c7de ("target/s390x: Re-implement a few EXECUTE target insns
> directly")
> Signed-off-by: David Hildenbrand
> ---
> target/s390x/mem_helpe
On 1/8/21 5:20 AM, David Hildenbrand wrote:
> This series fixes booting current upstream Linux kernel compiled by
> clang-11 and clang-12 under TCG.
>
> Decided to pull in already separatly sent patches. The last patch is
> not required to fix the boot issues, but related to patch #3.
>
> Latest
On Thu, Jan 07, 2021 at 08:41:50PM +0100, Paolo Bonzini wrote:
> Il gio 7 gen 2021, 20:36 Roman Bolshakov ha scritto:
>
> > > No I think that Meson should simply explode link_whole libraries to their
> > > constituent objects. This way duplicates are avoided.
> > >
> >
> > Ok. I've looked throug
In commit cd8be50e58f63413c0 we converted the A32 coprocessor
insns to decodetree. This accidentally broke XScale/iWMMXt insns,
because it moved the handling of "cp insns which are handled
by looking up the cp register in the hashtable" from after the
call to the legacy disas_xscale_insn() decode t
On Fri, 8 Jan 2021 at 18:56, Guenter Roeck wrote:
>
> On 1/8/21 9:25 AM, Peter Maydell wrote:
> > On Mon, 21 Dec 2020 at 16:01, Guenter Roeck wrote:
> >> Something like the following should do.
> >>
> >> qemu-system-arm -M z2 -kernel arch/arm/boot/zImage -no-reboot \
> >> -initrd rootfs-armv5
Adding the people to the CC list who were on the previous discussion thread...
-- PMM
On Fri, 8 Jan 2021 at 19:43, Warner Losh wrote:
>
> The FreeBSD project has rewritten bsd-user. We've been working on this for
> quite some time (the earliest commits date from 2013). Maybe a dozen people
>
On Mon, 21 Dec 2020 at 15:24, Philippe Mathieu-Daudé wrote:
> On 12/21/20 6:28 AM, Guenter Roeck wrote:
> > 84: ec432000mar acc0, r2, r3
> >
> >
> > This is supposed to be a DSP or iWMMXt coprocessor instruction.
> > I did notice that the
On 08/01/21 20:29, Roman Bolshakov wrote:
Paolo,
I tried to use extract_all_objects() to get all object files directly
but it doesn't work on dependency objects defined via
declare_dependency(). It works only on regular targets (libs and
executables). And as far as I understand the intention to
On 1/8/21 9:51 AM, Peter Maydell wrote:
> In commit cd8be50e58f63413c0 we converted the A32 coprocessor
> insns to decodetree. This accidentally broke XScale/iWMMXt insns,
> because it moved the handling of "cp insns which are handled
> by looking up the cp register in the hashtable" from after the
Hello,
I would really appreciate if anyone could confirm that someone is
actually taking a look at this case.
If you need more information / test, again feel free to ask!
Regards,
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htt
And add a couple of FreeBSD people I also forgot to CC.
Warner
On Fri, Jan 8, 2021 at 12:56 PM Peter Maydell
wrote:
> Adding the people to the CC list who were on the previous discussion
> thread...
>
> -- PMM
>
>
> On Fri, 8 Jan 2021 at 19:43, Warner Losh wrote:
> >
> > The FreeBSD project ha
On 08/01/21 20:08, huang...@chinatelecom.cn wrote:
QEMU enable the dirty ring feature by specifing the "-accel" sub-parameter.
https://lore.kernel.org/qemu-devel/20210108165050.406906-10-pet...@redhat.com/
Libvirt use "-machine accel=kvm" option to specify the accelerator by default,
which is inc
On Fri, Jan 08, 2021 at 03:00:07PM +, Peter Maydell wrote:
> On Fri, 8 Jan 2021 at 13:50, Peter Maydell wrote:
> >
> > On Sat, 2 Jan 2021 at 15:14, Roman Bolshakov wrote:
> > >
> > > ui/cocoa.m:1188:44: warning: 'openFile:' is deprecated: first deprecated
> > > in macOS 11.0 - Use -[NSWorksp
On Fri, Jan 8, 2021 at 3:59 PM Thomas Huth wrote:
>
> There was a race condition in the first test where there was already the
> "crw" output in the dmesg, but the "0.0.4711" entry has not been created
> in the /sys fs yet. Fix it by waiting until it is there.
>
> The second test has even more pro
QEMU documentation can't be opened if QEMU is run from build tree
because executables are placed in the top of build tree after conversion
to meson.
Signed-off-by: Roman Bolshakov
---
ui/cocoa.m | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/ui/cocoa.m b/ui/cocoa.m
index ea3
On Fri, Jan 08, 2021 at 03:05:55PM +, Peter Maydell wrote:
> On Fri, 8 Jan 2021 at 15:00, Peter Maydell wrote:
> >
> > On Fri, 8 Jan 2021 at 13:50, Peter Maydell wrote:
> > >
> > > On Sat, 2 Jan 2021 at 15:14, Roman Bolshakov
> > > wrote:
> > > >
> > > > ui/cocoa.m:1188:44: warning: 'openFi
On Fri, 8 Jan 2021, Peter Maydell wrote:
Switch the sam460ex board to directly creating and configuring the
UIC, rather than doing it via the old ppcuic_init() helper function.
Signed-off-by: Peter Maydell
Reviewed-by: BALATON Zoltan
Regards,
BALATON Zoltan
---
v1->v2 changes:
* fix typo
This reverts commit e6d5106786 which was added mistakenly. While this
change works it was suggested during review that keeping dependencies
explicit for each board may be better than listing them in a common
option so keep the previous version and revert this change.
Signed-off-by: BALATON Zoltan
Accidentally the wrong version of this series was committed, this
series fixes that up to the last version that was meant to be merged.
This v2 is rebased on Peter's UIC series and clarifies commit message
of last patch.
Based-on: <20210108171212.16500-1-peter.mayd...@linaro.org>
BALATON Zoltan (
Use the PCI_BUS type cast macro to convert result of qdev_get_child_bus().
Also remove the check for NULL afterwards which should not be needed
because sysbus_create_simple() uses error_abort and we create the PCI
host object here that's expected to have a PCI bus so this shouldn't
fail. Even if it
This reverts commit 038da2adf that was mistakenly added, this
dependency is still needed to get libfdt dependencies even if fdt.o is
not needed by sam460ex.
Signed-off-by: BALATON Zoltan
---
hw/ppc/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/hw/ppc/Kconfig b/hw/ppc/Kconfig
index
On Fri, 8 Jan 2021 at 21:47, Roman Bolshakov wrote:
>
> On Fri, Jan 08, 2021 at 03:05:55PM +, Peter Maydell wrote:
> > This menu bar breakage appears to be caused by this patch. I have
> > no idea why, because the patch looks pretty harmless. Nonetheless,
> > I'm going to have to drop it from
On Fri, 8 Jan 2021 at 22:17, BALATON Zoltan wrote:
>
> This reverts commit 038da2adf that was mistakenly added, this
> dependency is still needed to get libfdt dependencies even if fdt.o is
> not needed by sam460ex.
>
> Signed-off-by: BALATON Zoltan
> ---
> hw/ppc/Kconfig | 1 +
> 1 file changed
On Fri, 8 Jan 2021 at 22:17, BALATON Zoltan wrote:
>
> This reverts commit e6d5106786 which was added mistakenly. While this
> change works it was suggested during review that keeping dependencies
> explicit for each board may be better than listing them in a common
> option so keep the previous v
On Fri, 8 Jan 2021 at 22:17, BALATON Zoltan wrote:
>
> Use the PCI_BUS type cast macro to convert result of qdev_get_child_bus().
> Also remove the check for NULL afterwards which should not be needed
> because sysbus_create_simple() uses error_abort and we create the PCI
> host object here that's
Ben Widawsky writes:
> On 21-01-08 12:19:35, Alex Bennée wrote:
>> GNU Global is another tags engine which is more like cscope in being
>> able to support finding both references and definitions. You will be
>> un-surprised to know it also integrates well with Emacs.
>>
>> The main benefit of
Keith Packard writes:
> This series adds support for RISC-V Semihosting, version 0.2 as
> specified here:
>
> https://github.com/riscv/riscv-semihosting-spec/releases/tag/0.2
>
> This specification references the ARM semihosting release 2.0 as
> specified here:
>
> https://static.do
On 1/8/21 8:51 AM, Leif Lindholm wrote:
> When FEAT_MTE is implemented, the AArch64 view of CTR_EL0 adds the
> TminLine field in bits [37:32].
> Extend the ctr field to be able to hold this context.
>
> Signed-off-by: Leif Lindholm
> ---
> target/arm/cpu.h | 2 +-
> 1 file changed, 1 insertion(+
Public bug reported:
=== Reproducer ===
cat << EOF | ../build/qemu-system-i386 -machine q35 \
-nodefaults -device rtl8139,netdev=net0 \
-netdev user,id=net0 -display none -qtest stdio
outl 0xcf8 0x8804
outb 0xcfc 0x26
outl 0xcf8 0x8817
outb 0xcfc 0xff
write 0x1 0x1 0x42
write 0x5 0x1 0x42
On 21-01-08 22:30:59, Alex Bennée wrote:
>
> Ben Widawsky writes:
>
> > On 21-01-08 12:19:35, Alex Bennée wrote:
> >> GNU Global is another tags engine which is more like cscope in being
> >> able to support finding both references and definitions. You will be
> >> un-surprised to know it also i
Hi,
This is gathering together my maintainer trees into one place in
advance of putting together a pull request next week. There are:
- gdbstub: more tests and tweaks to SVE handling for ARM
- semihosting: common code and enabling for RiscV
- some minor test and devtool tweaks
Last chance
From: Lirong Yuan
This allows gdb to access the target’s auxiliary vector,
which can be helpful for telling system libraries important details
about the hardware, operating system, and process.
[AJB: minor tweaks to test case, update MAINTAINERS]
Signed-off-by: Lirong Yuan
Signed-off-by: Alex
Despite it's name it didn't actually clean-up so let us document
gdb_exit() better and use that.
Signed-off-by: Alex Bennée
Reviewed-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
Message-Id: <20201214153012.12723-6-alex.ben...@linaro.org>
Message-Id: <20201218112707.28348-8-alex.ben
The support of socket based debugging which we need for linux-user
testing is only really stable as of 8.3.1 so lets gate our use of GDB
on having a relatively modern version.
For direct testing you can just point to a locally compiled version of
gdb via configure, e.g.:
../../configure --gdb=$
gdb_exit() has never needed anything from env and I doubt we are going
to start now.
Signed-off-by: Alex Bennée
Reviewed-by: Richard Henderson
Reviewed-by: Laurent Vivier
Reviewed-by: Philippe Mathieu-Daudé
Message-Id: <20201214153012.12723-5-alex.ben...@linaro.org>
Message-Id: <20201218112707
From: Philippe Mathieu-Daudé
Debian 9 base container has been removed in commits
e3755276d1f and c9d78b06c06. Remove the last remnants.
Fixes: e3755276d1f ("tests/docker: Remove old Debian 9 containers")
Signed-off-by: Philippe Mathieu-Daudé
Message-Id: <20210107072933.3828450-1-f4...@amsat.org
If you kill the inferior from GDB we end up leaving our socket lying
around. Fix this by calling gdb_exit() first.
Signed-off-by: Alex Bennée
Reviewed-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
Message-Id: <20201214153012.12723-7-alex.ben...@linaro.org>
Message-Id: <2020121811270
We won't attempt to run the test now it's gated on a newer version of
gdb.
This reverts commit a930cadd83b4681a98ce72abf530a791ee2e42a6.
Signed-off-by: Alex Bennée
Message-Id: <20201218112707.28348-4-alex.ben...@linaro.org>
Signed-off-by: Alex Bennée
---
tests/tcg/multiarch/Makefile.target | 4
This helps with debugging.
Signed-off-by: Alex Bennée
Message-Id: <20201214153012.12723-2-alex.ben...@linaro.org>
Message-Id: <20201218112707.28348-2-alex.ben...@linaro.org>
Signed-off-by: Alex Bennée
---
tests/guest-debug/run-test.py | 1 +
1 file changed, 1 insertion(+)
diff --git a/tests/gu
GNU Global is another tags engine which is more like cscope in being
able to support finding both references and definitions. You will be
un-surprised to know it also integrates well with Emacs.
The main benefit of integrating it into find-src-path is it takes less
time to rebuild the database fro
This adds a new tests that allows us to test softmmu only features
including watchpoints. To do achieve this we need to:
- add _exit: labels to the boot codes
- write a memory.py test case
- plumb the test case into the build system
- tweak the run_test script to:
- re-direct output wh
From: Keith Packard
These are part of Semihosting for AArch32 and AArch64 Release 2.0
Signed-off-by: Keith Packard
Message-Id: <20210107170717.2098982-8-kei...@keithp.com>
Signed-off-by: Alex Bennée
---
include/qemu/timer.h | 2 ++
hw/semihosting/common-semi.c | 16
From: Keith Packard
Part of Semihosting for AArch32 and AArch64 Release 2.0
Signed-off-by: Keith Packard
Message-Id: <20210107170717.2098982-9-kei...@keithp.com>
Signed-off-by: Alex Bennée
---
hw/semihosting/common-semi.c | 21 +++--
1 file changed, 19 insertions(+), 2 deletio
On 1/8/21 11:51 AM, Peter Maydell wrote:
> In commit cd8be50e58f63413c0 we converted the A32 coprocessor
> insns to decodetree. This accidentally broke XScale/iWMMXt insns,
> because it moved the handling of "cp insns which are handled
> by looking up the cp register in the hashtable" from after th
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