[RFC PATCH v2 3/6] hw/arm/virt-acpi-build: Distinguish possible and present cpus

2021-04-13 Thread Yanan Wang
From: Ying Fang When building ACPI tables regarding CPUs we should always build them for the number of possible CPUs, not the number of present CPUs. We then ensure only the present CPUs are enabled in MADT. Furthermore, it is also needed if we are going to support CPU hotplug in the future.

[RFC PATCH v2 0/6] hw/arm/virt: Introduce cpu topology support

2021-04-13 Thread Yanan Wang
Hi, This series is a new version of [0] recently posted by Ying Fang to introduce cpu topology support for ARM platform. I have taken over his work about this now, thanks for his contribution. Description: An accurate cpu topology may help improve the cpu scheduler's decision making when dealing

[RFC PATCH v2 4/6] hw/acpi/aml-build: Add processor hierarchy node structure

2021-04-13 Thread Yanan Wang
Add a generic API to build Processor Hierarchy Node Structure(Type 0), which is strictly consistent with descriptions in ACPI 6.3: 5.2.29.1. This function will be used to build ACPI PPTT table for cpu topology. Signed-off-by: Ying Fang Signed-off-by: Henglong Fan Signed-off-by: Yanan Wang ---

[RFC PATCH v2 2/6] hw/arm/virt: DT: Add cpu-map

2021-04-13 Thread Yanan Wang
From: Andrew Jones Support device tree CPU topology descriptions. Signed-off-by: Andrew Jones Signed-off-by: Yanan Wang --- hw/arm/virt.c | 41 - include/hw/arm/virt.h | 1 + 2 files changed, 41 insertions(+), 1 deletion(-) diff --git

Re: [PATCH] vhost-user-fs: fix features handling

2021-04-13 Thread Stefan Hajnoczi
On Thu, Apr 08, 2021 at 10:55:34PM +0300, Anton Kuchin wrote: > Make virtio-fs take into account server capabilities. > > Just returning requested features assumes they all of then are implemented > by server and results in setting unsupported configuration if some of them > are absent. > >

Re: [PATCH 2/2] Support monitor chardev hotswap with QMP

2021-04-13 Thread Daniel P . Berrangé
On Tue, Apr 13, 2021 at 08:40:59AM +0200, Markus Armbruster wrote: > Li Zhang writes: > > > From: Li Zhang > > > > For some scenarios, it needs to hot-add a monitor device. > > But QEMU doesn't support hotplug yet. It also works by adding > > a monitor with null backend by default and then

[PATCH v5 10/14] qmp: Clarify memory backend properties returned via query-memdev

2021-04-13 Thread David Hildenbrand
We return information on the currently configured memory backends and don't configure them, so decribe what the currently set properties express. Suggested-by: Markus Armbruster Cc: Eric Blake Cc: Markus Armbruster Cc: Igor Mammedov Signed-off-by: David Hildenbrand --- qapi/machine.json | 6

[PATCH v5 12/14] hmp: Print "share" property of memory backends with "info memdev"

2021-04-13 Thread David Hildenbrand
Let's print the property. Cc: Markus Armbruster Cc: Eric Blake Cc: Igor Mammedov Signed-off-by: David Hildenbrand --- hw/core/machine-hmp-cmds.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/hw/core/machine-hmp-cmds.c b/hw/core/machine-hmp-cmds.c index 58248cffa3..004a92b3d6 100644

Re: [PATCH v2 2/3] qom: move user_creatable_add_opts logic to vl.c and QAPIfy it

2021-04-13 Thread Kevin Wolf
Am 13.04.2021 um 10:13 hat David Hildenbrand geschrieben: > On 13.04.21 06:41, Markus Armbruster wrote: > > David Hildenbrand writes: > > > > > On 12.03.21 18:35, Paolo Bonzini wrote: > > > > Emulators are currently using OptsVisitor (via user_creatable_add_opts) > > > > to parse the -object

Re: any remaining for-6.0 issues?

2021-04-13 Thread Stefan Weil
Am 13.04.21 um 07:56 schrieb Bin Meng: On Mon, Apr 12, 2021 at 11:33 PM Peter Maydell wrote: Last call to note anything we need to fix for 6.0 on https://wiki.qemu.org/Planning/6.0#Known_issues please. The schedule is to tag rc3 tomorrow, which I would ideally like to be the last rc before

Re: trace_FOO_tcg bit-rotted?

2021-04-13 Thread Stefan Hajnoczi
On Mon, Apr 12, 2021 at 08:06:57PM +0100, Alex Bennée wrote: > > Stefan Hajnoczi writes: > > > On Fri, Apr 09, 2021 at 05:29:08PM +0100, Alex Bennée wrote: > >> > >> Laurent Vivier writes: > >> > >> > Le 06/04/2021 à 18:00, Alex Bennée a écrit : > >> >> Hi, > >> >> > >> >> It's been awhile

[Bug 1923583] [NEW] colo: pvm flush failed after svm killed

2021-04-13 Thread meeho yuen
Public bug reported: Hi, Primary vm flush failed after killing svm, which leads primary vm guest filesystem unavailable. qemu versoin: 5.2.0 host/guest os: CentOS Linux release 7.6.1810 (Core) Reproduce steps: 1. create colo vm following

Re: [PATCH v2 0/2] docs/devel/qgraph: add troubleshooting information

2021-04-13 Thread Paolo Bonzini
On 12/04/21 16:34, Stefan Hajnoczi wrote: v2: * Fix "will unavailable" typo [Thomas] I recently needed to troubleshoot a case where qos-test terminated immediately with no output. In other words, qos-test decided that no tests are runnable. After lots of head scratching and some help from

[RFC PATCH v2 5/6] hw/arm/virt-acpi-build: Add PPTT table

2021-04-13 Thread Yanan Wang
Add the Processor Properties Topology Table (PPTT) to present CPU topology information to ACPI guests. Note, while a DT boot Linux guest with a non-flat CPU topology will see socket and core IDs being sequential integers starting from zero, e.g. with -smp 4,sockets=2,cores=2,threads=1 a DT boot

[PATCH-for-6.1] exec: Remove accel/tcg/ from include paths

2021-04-13 Thread Philippe Mathieu-Daudé
When TCG is enabled, the accel/tcg/ include path is added to the project global include search list. This accel/tcg/ directory contains a header named "internal.h" which, while intented to be internal to accel/tcg/, is accessible by all files compiled when TCG is enabled. This might lead to

Re: [RFC v12 27/65] target/arm: split a15 cpu model and 32bit class functions to cpu32.c

2021-04-13 Thread Claudio Fontana
On 4/8/21 12:23 PM, Claudio Fontana wrote: > On 3/28/21 6:18 PM, Richard Henderson wrote: >> On 3/26/21 1:36 PM, Claudio Fontana wrote: >>> provide helper functions there to initialize 32bit models, >>> and export the a15 cpu model. >>> >>> We still need to keep around a15 until we sort out the

Re: Better alternative to strncpy in QEMU.

2021-04-13 Thread Paolo Bonzini
On 12/04/21 06:51, Thomas Huth wrote: I think this is pretty much the same as g_strlcpy() from the glib: https://developer.gnome.org/glib/2.66/glib-String-Utility-Functions.html#g-strlcpy So I guess Paolo had something different in mind when adding this task? Yes, I did. strncpy is

Re: [PATCH 2/2] Support monitor chardev hotswap with QMP

2021-04-13 Thread Li Zhang
On Tue, Apr 13, 2021 at 8:41 AM Markus Armbruster wrote: > > Li Zhang writes: > > > From: Li Zhang > > > > For some scenarios, it needs to hot-add a monitor device. > > But QEMU doesn't support hotplug yet. It also works by adding > > a monitor with null backend by default and then change its >

[PATCH v5 14/14] hmp: Print "reserve" property of memory backends with "info memdev"

2021-04-13 Thread David Hildenbrand
Let's print the new property. Reviewed-by: Dr. David Alan Gilbert Cc: Markus Armbruster Cc: Eric Blake Cc: Igor Mammedov Signed-off-by: David Hildenbrand --- hw/core/machine-hmp-cmds.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/hw/core/machine-hmp-cmds.c

Re: trace_FOO_tcg bit-rotted?

2021-04-13 Thread Alex Bennée
Stefan Hajnoczi writes: > On Mon, Apr 12, 2021 at 08:06:57PM +0100, Alex Bennée wrote: >> >> Stefan Hajnoczi writes: >> >> > On Fri, Apr 09, 2021 at 05:29:08PM +0100, Alex Bennée wrote: >> >> >> >> Laurent Vivier writes: >> >> >> >> > Le 06/04/2021 à 18:00, Alex Bennée a écrit : >> >> >>

[RFC PATCH v2 2/4] hw/arm/virt: Parse -smp cluster parameter in virt_smp_parse

2021-04-13 Thread Yanan Wang
There is a separate function virt_smp_parse() in hw/virt/arm.c used to parse cpu topology for the ARM machines. So add parsing of -smp cluster parameter in it, then total number of logical cpus will be calculated like: max_cpus = sockets * clusters * cores * threads. In virt_smp_parse(), the

Re: [Bug 1923583] [NEW] colo: pvm flush failed after svm killed

2021-04-13 Thread no-reply
Patchew URL: https://patchew.org/QEMU/161830261172.29345.7866671962411605196.malone...@wampee.canonical.com/ Hi, This series seems to have some coding style problems. See output below for more information: Type: series Message-id:

[PATCH v5 00/14] RAM_NORESERVE, MAP_NORESERVE and hostmem "reserve" property

2021-04-13 Thread David Hildenbrand
Based-on: 20210406080126.24010-1-da...@redhat.com Some cleanups previously sent in other context (resizeable allocations), followed by RAM_NORESERVE, implementing it under Linux using MAP_NORESERVE, and letting users configure it for memory backens using the "reserve" property (default: true).

[PATCH v5 01/14] util/mmap-alloc: Factor out calculation of the pagesize for the guard page

2021-04-13 Thread David Hildenbrand
Let's factor out calculating the size of the guard page and rename the variable to make it clearer that this pagesize only applies to the guard page. Reviewed-by: Peter Xu Acked-by: Murilo Opsfelder Araujo Cc: Igor Kotrasinski Signed-off-by: David Hildenbrand --- util/mmap-alloc.c | 31

[PATCH v5 02/14] util/mmap-alloc: Factor out reserving of a memory region to mmap_reserve()

2021-04-13 Thread David Hildenbrand
We want to reserve a memory region without actually populating memory. Let's factor that out. Reviewed-by: Igor Kotrasinski Acked-by: Murilo Opsfelder Araujo Reviewed-by: Richard Henderson Reviewed-by: Peter Xu Signed-off-by: David Hildenbrand --- util/mmap-alloc.c | 58

Re: [PATCH 0/1] sphinx: qapidoc: Wrap "If" section body in a paragraph node

2021-04-13 Thread Peter Maydell
On Wed, 7 Apr 2021 at 10:41, Markus Armbruster wrote: > > Peter, do you intend to merge this yourself? I have nothing else queued > right now. If you want me to do a pull request for this patch, let me > know. I missed this email earlier. I had assumed somebody else would pick it up, but as it

Re: [PATCH 2/2] Support monitor chardev hotswap with QMP

2021-04-13 Thread Markus Armbruster
Li Zhang writes: > From: Li Zhang > > For some scenarios, it needs to hot-add a monitor device. > But QEMU doesn't support hotplug yet. It also works by adding > a monitor with null backend by default and then change its > backend to socket by QMP command "chardev-change". > > So this patch is

Re: [PATCH 1/4] target/ppc: Code motion required to build disabling tcg

2021-04-13 Thread David Gibson
On Mon, Apr 12, 2021 at 12:05:31PM +, Bruno Piazera Larsen wrote: > > A general advice for this whole series is: make sure you add in some > > words explaining why you decided to make a particular change. It will be > > much easier to review if we know what were the logical steps leading to >

Re: [PATCH 2/4] target/ppc: added solutions for building with disable-tcg

2021-04-13 Thread David Gibson
On Mon, Apr 12, 2021 at 08:40:47AM -0700, Richard Henderson wrote: > On 4/11/21 10:08 PM, David Gibson wrote: > > Not directly related to what you're trying to accomplish here, but the > > whole vscr_sat thing looks really weird. I have no idea why we're > > splitting out the storage of VSCR[SAT]

Re: [PATCH] docs: Add a QEMU Code of Conduct and Conflict Resolution Policy document

2021-04-13 Thread Paolo Bonzini
On 07/04/21 17:42, Kevin Wolf wrote: +* Publishing other's private information, such as physical or electronic +addresses, without explicit permission Yes, it's pretty clear that I'm not publishing new information about people when I'm keeping them in Cc: when replying to a thread, or even

Re: [PATCH 4/5] blkdebug: do not suspend in the middle of QLIST_FOREACH_SAFE

2021-04-13 Thread Paolo Bonzini
On 08/04/21 17:59, Emanuele Giuseppe Esposito wrote: Perhaps insert here: That would be unsafe in case a rule other than the current one is removed while the coroutine has yielded. Keep FOREACH_SAFE because suspend_request deletes the current rule. After this patch, *all* matching rules

Re: [PATCH RFC RESEND v2 3/6] hw/pci: Add pci_root_bus_max_bus

2021-04-13 Thread Auger Eric
Hi Xingang, On 3/25/21 8:22 AM, Wang Xingang wrote: > From: Xingang Wang > > This helps to find max bus number of a root bus. s/max bus number of a root bus/highest bus number of a bridge hierarchy? > > Signed-off-by: Xingang Wang > Signed-off-by: Jiahui Cen > --- > hw/pci/pci.c |

[PATCH v5 09/14] hostmem: Wire up RAM_NORESERVE via "reserve" property

2021-04-13 Thread David Hildenbrand
Let's provide a way to control the use of RAM_NORESERVE via memory backends using the "reserve" property which defaults to true (old behavior). Only Linux currently supports clearing the flag (and support is checked at runtime, depending on the setting of "/proc/sys/vm/overcommit_memory").

[PATCH v5 03/14] util/mmap-alloc: Factor out activating of memory to mmap_activate()

2021-04-13 Thread David Hildenbrand
We want to activate memory within a reserved memory region, to make it accessible. Let's factor that out. Reviewed-by: Richard Henderson Acked-by: Murilo Opsfelder Araujo Reviewed-by: Peter Xu Signed-off-by: David Hildenbrand --- util/mmap-alloc.c | 94

[PATCH v5 05/14] softmmu/memory: Pass ram_flags to memory_region_init_ram_shared_nomigrate()

2021-04-13 Thread David Hildenbrand
Let's forward ram_flags instead, renaming memory_region_init_ram_shared_nomigrate() into memory_region_init_ram_flags_nomigrate(). Forward flags to qemu_ram_alloc() and qemu_ram_alloc_internal(). Reviewed-by: Peter Xu Signed-off-by: David Hildenbrand --- backends/hostmem-ram.c

[PATCH v5 04/14] softmmu/memory: Pass ram_flags to qemu_ram_alloc_from_fd()

2021-04-13 Thread David Hildenbrand
Let's pass in ram flags just like we do with qemu_ram_alloc_from_file(), to clean up and prepare for more flags. Simplify the documentation of passed ram flags: Looking at our documentation of RAM_SHARED and RAM_PMEM is sufficient, no need to be repetitive. Reviewed-by: Peter Xu Signed-off-by:

Re: [PATCH 2/2] Support monitor chardev hotswap with QMP

2021-04-13 Thread Li Zhang
On Tue, Apr 13, 2021 at 10:58 AM Daniel P. Berrangé wrote: > > On Tue, Apr 13, 2021 at 08:40:59AM +0200, Markus Armbruster wrote: > > Li Zhang writes: > > > > > From: Li Zhang > > > > > > For some scenarios, it needs to hot-add a monitor device. > > > But QEMU doesn't support hotplug yet. It

Re: [PATCH v2 2/3] qom: move user_creatable_add_opts logic to vl.c and QAPIfy it

2021-04-13 Thread David Hildenbrand
On 13.04.21 06:41, Markus Armbruster wrote: David Hildenbrand writes: On 12.03.21 18:35, Paolo Bonzini wrote: Emulators are currently using OptsVisitor (via user_creatable_add_opts) to parse the -object command line option. This has one extra feature, compared to keyval, which is automatic

Re: [Virtio-fs] [PATCH] vhost-user-fs: fix features handling

2021-04-13 Thread Stefan Hajnoczi
On Mon, Apr 12, 2021 at 02:43:16PM -0400, Vivek Goyal wrote: > On Sun, Apr 11, 2021 at 09:21:54AM +0300, Anton Kuchin wrote: > > > > On 09/04/2021 18:56, Vivek Goyal wrote: > > > On Thu, Apr 08, 2021 at 10:55:34PM +0300, Anton Kuchin wrote: > > > > Make virtio-fs take into account server

[PATCH v5 13/14] qmp: Include "reserve" property of memory backends

2021-04-13 Thread David Hildenbrand
Let's include the new property. Cc: Eric Blake Cc: Markus Armbruster Cc: Igor Mammedov Signed-off-by: David Hildenbrand --- hw/core/machine-qmp-cmds.c | 1 + qapi/machine.json | 4 2 files changed, 5 insertions(+) diff --git a/hw/core/machine-qmp-cmds.c

[PATCH v5 07/14] memory: Introduce RAM_NORESERVE and wire it up in qemu_ram_mmap()

2021-04-13 Thread David Hildenbrand
Let's introduce RAM_NORESERVE, allowing mmap'ing with MAP_NORESERVE. The new flag has the following semantics: " RAM is mmap-ed with MAP_NORESERVE. When set, reserving swap space (or huge pages if applicable) is skipped: will bail out if not supported. When not set, the OS will do the

[PATCH v5 08/14] util/mmap-alloc: Support RAM_NORESERVE via MAP_NORESERVE under Linux

2021-04-13 Thread David Hildenbrand
Let's support RAM_NORESERVE via MAP_NORESERVE on Linux. The flag has no effect on most shared mappings - except for hugetlbfs and anonymous memory. Linux man page: "MAP_NORESERVE: Do not reserve swap space for this mapping. When swap space is reserved, one has the guarantee that it is

RE: [PATCH 00/11] Add support for Blob resources feature

2021-04-13 Thread Kasireddy, Vivek
Hi Gerd, While looking at the Qemu UI code, I noticed that there is a Blit operation performed to copy the Guest FB (texture) into a Host buffer before it is presented to the Host compositor. I was wondering if there are any elegant ways to eliminate this Blit to further the goal of absolute

Re: [PATCH 0/5] blkdebug: fix racing condition when iterating on

2021-04-13 Thread Paolo Bonzini
On 08/04/21 17:59, Emanuele Giuseppe Esposito wrote: When qemu_coroutine_enter is executed in a loop (even QEMU_FOREACH_SAFE), the new routine can modify the list, for example removing an element, causing problem when control is given back to the caller that continues iterating on the same list.

Re: [PATCH-for-6.1] exec: Remove accel/tcg/ from include paths

2021-04-13 Thread Claudio Fontana
Reviewed-by: Claudio Fontana Ciao, Claudio On 4/13/21 10:10 AM, Philippe Mathieu-Daudé wrote: > When TCG is enabled, the accel/tcg/ include path is added to the > project global include search list. This accel/tcg/ directory > contains a header named "internal.h" which, while intented to > be

[RFC PATCH v2 3/4] hw/arm/virt-acpi-build: Add cluster level for PPTT table

2021-04-13 Thread Yanan Wang
Add a Processor Hierarchy Node of cluster level between core level and package level for ARM PPTT table. Signed-off-by: Yanan Wang --- hw/arm/virt-acpi-build.c | 55 1 file changed, 33 insertions(+), 22 deletions(-) diff --git a/hw/arm/virt-acpi-build.c

[RFC PATCH v2 4/4] hw/arm/virt: Add cluster level for device tree

2021-04-13 Thread Yanan Wang
Add a cluster level between core level and package level for ARM device tree. Signed-off-by: Yanan Wang --- hw/arm/virt.c | 12 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 51797628db..4468a4734b 100644 --- a/hw/arm/virt.c +++

[RFC PATCH v2 1/4] vl.c: Add -smp, clusters=* command line support for ARM cpu

2021-04-13 Thread Yanan Wang
A cluster means a group of cores that share some resources (e.g. cache) among them under the LLC. For example, ARM64 server chip Kunpeng 920 has 6 or 8 clusters in each NUMA, and each cluster has 4 cores. All clusters share L3 cache data while cores within each cluster share the L2 cache. The

[RFC PATCH v2 0/4] hw/arm/virt: Introduce cluster cpu topology support

2021-04-13 Thread Yanan Wang
Hi, This series is a new version of [0] posted to introduce the cluster cpu topology support for ARM platform, besides now existing sockets, cores, and threads. And the code has been rewriten based on patch series [1]. [0]

Re: [PULL 0/1] NBD fix for 6.0-rc3

2021-04-13 Thread Vladimir Sementsov-Ogievskiy
12.04.2021 18:48, Peter Maydell wrote: On Mon, 12 Apr 2021 at 13:19, Vladimir Sementsov-Ogievskiy wrote: The following changes since commit 555249a59e9cdd6b58da103aba5cf3a2d45c899f: Merge remote-tracking branch 'remotes/ehabkost-gl/tags/x86-next-pull-request' into staging (2021-04-10

[RFC PATCH v2 6/6] hw/arm/virt: Replace smp_parse with one that prefers cores

2021-04-13 Thread Yanan Wang
From: Andrew Jones The virt machine type has never used the CPU topology parameters, other than number of online CPUs and max CPUs. When choosing how to allocate those CPUs the default has been to assume cores. In preparation for using the other CPU topology parameters let's use an smp_parse

[RFC PATCH v2 1/6] device_tree: Add qemu_fdt_add_path

2021-04-13 Thread Yanan Wang
From: Andrew Jones qemu_fdt_add_path() works like qemu_fdt_add_subnode(), except it also adds any missing subnodes in the path. We also tweak an error message of qemu_fdt_add_subnode(). We'll make use of this new function in a coming patch. Signed-off-by: Andrew Jones Signed-off-by: Yanan

Re: [PATCH v2 2/3] qom: move user_creatable_add_opts logic to vl.c and QAPIfy it

2021-04-13 Thread David Hildenbrand
On 13.04.21 10:13, David Hildenbrand wrote: On 13.04.21 06:41, Markus Armbruster wrote: David Hildenbrand writes: On 12.03.21 18:35, Paolo Bonzini wrote: Emulators are currently using OptsVisitor (via user_creatable_add_opts) to parse the -object command line option. This has one extra

Re: [PATCH RFC RESEND v2 4/6] hw/arm/virt-acpi-build: Add explicit idmap info in IORT table

2021-04-13 Thread Auger Eric
Hi Xingang, On 3/25/21 8:22 AM, Wang Xingang wrote: > From: Xingang Wang > > The idmap of smmuv3 and root complex covers the whole RID space for now, > this patch add explicit idmap info according to root bus number range. > This add smmuv3 idmap for certain bus which has enabled the iommu

Re: [Bug 1923497] [NEW] bios_linker_loader_add_checksum: Assertion `start_offset < file->blob->len' failed

2021-04-13 Thread Igor Mammedov
On Mon, 12 Apr 2021 20:29:04 - Ed Davison <1923...@bugs.launchpad.net> wrote: > Public bug reported: > > Trying boot/start a Windows 10 VM. Worked until recently when this > error started showing up. > > I have the following installed on Fedora 33: > qemu-kvm-5.1.0-9.fc33.x86_64 Could you

[PATCH v5 06/14] util/mmap-alloc: Pass flags instead of separate bools to qemu_ram_mmap()

2021-04-13 Thread David Hildenbrand
Let's pass flags instead of bools to prepare for passing other flags and update the documentation of qemu_ram_mmap(). Introduce new QEMU_MAP_ flags that abstract the mmap() PROT_ and MAP_ flag handling and simplify it. We expose only flags that are currently supported by qemu_ram_mmap(). Maybe,

[PATCH v5 11/14] qmp: Include "share" property of memory backends

2021-04-13 Thread David Hildenbrand
Let's include the property, which can be helpful when debugging, for example, to spot misuse of MAP_PRIVATE which can result in some ugly corner cases (e.g., double-memory consumption on shmem). Use the same description we also use for describing the property. Cc: Eric Blake Cc: Markus

[Bug 1923692] [NEW] qemu 5.2.0: Add reconnect option support for netdev socket

2021-04-13 Thread Mark Karpelès
Public bug reported: Most of qemu socket accepting options (such as chardev) accept among other things a "reconnect" option. netdev socket however returns: Invalid parameter 'reconnect' It would make sense that available options for socket links be at least partially normalized (also see issue

Re: [PATCH v2 4/9] target/riscv: Remove the hardcoded MSTATUS_SD macro

2021-04-13 Thread Richard Henderson
On 4/13/21 4:33 PM, Alistair Francis wrote: +#ifndef CONFIG_USER_ONLY +# ifdef TARGET_RISCV32 +# define is_32bit(ctx) true +# else +static inline bool is_32bit(DisasContext *ctx) +{ +return !(ctx->misa & RV64); +} +# endif +#endif It's going to be soon enough when this is used by

Re: [PATCH v2 5/9] target/riscv: Remove the hardcoded SATP_MODE macro

2021-04-13 Thread Richard Henderson
On 4/13/21 4:34 PM, Alistair Francis wrote: Signed-off-by: Alistair Francis --- target/riscv/cpu_bits.h | 11 --- target/riscv/cpu_helper.c | 24 ++-- target/riscv/csr.c| 20 target/riscv/monitor.c| 22 +- 4

[RFC PATCH 0/2] ppc: rework AIL logic, add POWER10 exception model

2021-04-13 Thread Nicholas Piggin
This applies on top of patches 1,2 from the previous series (i.e., these two patches replace patch 3). Function should be the same, but this way seems much cleaner. It does include a "cleanup" patch before the POWER10 fix, but arguably this is a better way to go even as a bug fix (backport, etc).

[RFC PATCH 2/2] target/ppc: Add POWER10 exception model

2021-04-13 Thread Nicholas Piggin
POWER10 adds a new bit that modifies interrupt behaviour, LPCR[HAIL], and it removes support for the LPCR[AIL]=0b10 mode. Signed-off-by: Nicholas Piggin --- hw/ppc/spapr_hcall.c| 7 +- target/ppc/cpu-qom.h| 2 ++ target/ppc/cpu.h| 5 ++--

Re: [PATCH v1 3/3] target/ppc: Add POWER10 exception model

2021-04-13 Thread Nicholas Piggin
Excerpts from Fabiano Rosas's message of April 14, 2021 1:53 am: > Nicholas Piggin writes: > >> POWER10 adds a new bit that modifies interrupt behaviour, LPCR[HAIL], >> and it removes support for the LPCR[AIL]=0b10 mode. >> >> Signed-off-by: Nicholas Piggin >> --- [snip] Thanks for the

Re: [PATCH v1 1/3] target/ppc: Fix POWER9 radix guest HV interrupt AIL behaviour

2021-04-13 Thread Nicholas Piggin
Excerpts from Fabiano Rosas's message of April 13, 2021 11:48 pm: > Nicholas Piggin writes: > >> ISA v3.0 radix guest execution has a quirk in AIL behaviour such that >> the LPCR[AIL] value can apply to hypervisor interrupts. >> >> This affects machines that emulate HV=1 mode (i.e., powernv9).

Re: [PATCH v2 9/9] target/riscv: Consolidate RV32/64 16-bit instructions

2021-04-13 Thread Richard Henderson
On 4/13/21 4:34 PM, Alistair Francis wrote: This patch removes the insn16-32.decode and insn16-64.decode decode files and consolidates the instructions into the general RISC-V insn16.decode decode tree. This means that all of the instructions are avaliable in both the 32-bit and 64-bit builds.

[Bug 1923693] [NEW] Lack of architecture in gdbstub makes debugging confusing

2021-04-13 Thread kallisti5
Public bug reported: I spent some quality time debugging GEF and came to a conclusion here: https://github.com/hugsy/gef/issues/598#issuecomment-819174169 tldr; * gdb_arch_name was undefined on riscv * this bug was fixed recently via

Live migration using a specified networking adapter

2021-04-13 Thread Jing-Wei Su
Hello experts, I have a network topology like this diagram. When start live migration moving a VM from Host A to B, the migration process uses either 10GbE (10.0.0.1) or 1 GbE (10.0.0.2), but the user cannot specify the source NIC by current migrate command. To solve the problem, my rough

[RFC PATCH 1/2] target/ppc: rework AIL logic in interrupt delivery

2021-04-13 Thread Nicholas Piggin
The AIL logic is becoming unmanageable spread all over powerpc_excp(), and it is slated to get even worse with POWER10 support. Move it all to a new helper function. Signed-off-by: Nicholas Piggin --- hw/ppc/spapr_hcall.c| 3 +- target/ppc/cpu.h| 8 --

Re: [PATCH v2 8/9] target/riscv: Consolidate RV32/64 32-bit instructions

2021-04-13 Thread Richard Henderson
On 4/13/21 4:34 PM, Alistair Francis wrote: -#ifndef CONFIG_USER_ONLY -# ifdef TARGET_RISCV32 -# define is_32bit(ctx) true -# else +#ifdef TARGET_RISCV32 +# define is_32bit(ctx) true +#else static inline bool is_32bit(DisasContext *ctx) { -return !(ctx->misa & RV64); +return

[PATCH RESEND v7 06/13] vfio: Support for RamDiscardManager in the !vIOMMU case

2021-04-13 Thread David Hildenbrand
Implement support for RamDiscardManager, to prepare for virtio-mem support. Instead of mapping the whole memory section, we only map "populated" parts and update the mapping when notified about discarding/population of memory via the RamDiscardListener. Similarly, when syncing the dirty bitmaps,

[PATCH RESEND v7 04/13] virtio-mem: Don't report errors when ram_block_discard_range() fails

2021-04-13 Thread David Hildenbrand
Any errors are unexpected and ram_block_discard_range() already properly prints errors. Let's stop manually reporting errors. Cc: Paolo Bonzini Cc: "Michael S. Tsirkin" Cc: Alex Williamson Cc: Dr. David Alan Gilbert Cc: Igor Mammedov Cc: Pankaj Gupta Cc: Peter Xu Cc: Auger Eric Cc: Wei

Re: [PATCH] vhost-user-fs: fix features handling

2021-04-13 Thread Dr. David Alan Gilbert
* Stefan Hajnoczi (stefa...@redhat.com) wrote: > On Thu, Apr 08, 2021 at 10:55:34PM +0300, Anton Kuchin wrote: > > Make virtio-fs take into account server capabilities. > > > > Just returning requested features assumes they all of then are implemented > > by server and results in setting

[PATCH 0/2] osdep: allow including qemu/osdep.h outside extern "C"

2021-04-13 Thread Paolo Bonzini
qemu/osdep.h is quite special in that, despite being part of QEMU sources, it is included by C++ source files as well. disas/nanomips.cpp is doing so within an 'extern "C"' block, which breaks with latest glib due to the inclusion of templates in glib.h. These patches implement Daniel Berrangé's

Re: [RFC v12 00/65] arm cleanup experiment for kvm-only build

2021-04-13 Thread Claudio Fontana
On 3/28/21 9:27 PM, Richard Henderson wrote: > On 3/26/21 1:35 PM, Claudio Fontana wrote: >> Here a new version of the series that enables kvm-only builds. >> >> The goal here is to enable the KVM-only build, but there is >> some additional cleanup too. >> >> In this iteration I mostly fixed

Re: [RFC v9 15/29] vfio: Set up nested stage mappings

2021-04-13 Thread Kunkun Jiang
Hi Eric, On 2021/4/11 20:08, Eric Auger wrote: In nested mode, legacy vfio_iommu_map_notify cannot be used as there is no "caching" mode and we do not trap on map. On Intel, vfio_iommu_map_notify was used to DMA map the RAM through the host single stage. With nested mode, we need to setup the

[PATCH v1 1/3] target/ppc: Fix POWER9 radix guest HV interrupt AIL behaviour

2021-04-13 Thread Nicholas Piggin
ISA v3.0 radix guest execution has a quirk in AIL behaviour such that the LPCR[AIL] value can apply to hypervisor interrupts. This affects machines that emulate HV=1 mode (i.e., powernv9). Signed-off-by: Nicholas Piggin --- target/ppc/excp_helper.c | 17 + 1 file changed, 13

RE: [PATCH] target/ppc: code motion from translate_init.c.inc to gdbstub.c

2021-04-13 Thread Fabiano Rosas
Bruno Piazera Larsen writes: > All the code and git related feedback as been done, with the exception of > >> > +gchar *ppc_gdb_arch_name(CPUState *cs); >> > + >> > + >> > #endif /* PPC_CPU_H */ >> > diff --git a/target/ppc/gdbstub.c b/target/ppc/gdbstub.c >> > index c28319fb97..0c016b8483

Re: [PULL 0/2] ppc-for-6.0 queue 20210412

2021-04-13 Thread Peter Maydell
On Tue, 13 Apr 2021 at 01:26, David Gibson wrote: > > The following changes since commit 555249a59e9cdd6b58da103aba5cf3a2d45c899f: > > Merge remote-tracking branch > 'remotes/ehabkost-gl/tags/x86-next-pull-request' into staging (2021-04-10 > 16:58:56 +0100) > > are available in the Git

[PATCH RESEND v7 01/13] memory: Introduce RamDiscardManager for RAM memory regions

2021-04-13 Thread David Hildenbrand
We have some special RAM memory regions (managed by virtio-mem), whereby the guest agreed to only use selected memory ranges. "unused" parts are discarded so they won't consume memory - to logically unplug these memory ranges. Before the VM is allowed to use such logically unplugged memory again,

[PATCH RESEND v7 10/13] softmmu/physmem: Don't use atomic operations in ram_block_discard_(disable|require)

2021-04-13 Thread David Hildenbrand
We have users in migration context that don't hold the BQL (when finishing migration). To prepare for further changes, use a dedicated mutex instead of atomic operations. Keep using qatomic_read ("READ_ONCE") for the functions that only extract the current state (e.g., used by virtio-balloon),

Re: [PATCH] docs: Add a QEMU Code of Conduct and Conflict Resolution Policy document

2021-04-13 Thread Peter Maydell
On Tue, 13 Apr 2021 at 11:23, Andreas Färber wrote: > Or consider the case you get a bug report not copied to the public > mailing lists from someone you don't know. Then I would still expect to > be allowed to attribute a commit via Reported-by/CC to that person, as > it seems in his/her

[PULL 1/3] hw/arm/mps2-tz: Fix MPC setting for AN524 SRAM block

2021-04-13 Thread Peter Maydell
The AN524 has three MPCs: one for the BRAM, one for the QSPI flash, and one for the DDR. We incorrectly set the .mpc field in the RAMInfo struct for the SRAM block to 1, giving it the same MPC we are using for the QSPI. The effect of this was that the QSPI didn't get mapped into the system

Re: [PATCH for-6.0] x86: acpi: use offset instead of pointer when using build_header()

2021-04-13 Thread Michael S. Tsirkin
On Tue, Apr 13, 2021 at 07:14:00AM -0400, Igor Mammedov wrote: > Do the same as in commit > (4d027afeb3a97 Virt: ACPI: fix qemu assert due to re-assigned table data > address) > for remaining tables that happen to use saved at > the beginning pointer to build header to avoid assert > when

[PATCH 1/2] block: Add BDRV_O_NO_SHARE for blk_new_open()

2021-04-13 Thread Kevin Wolf
Normally, blk_new_open() just shares all permissions. This was fine originally when permissions only protected against uses in the same process because no other part of the code would actually get to access the block nodes opened with blk_new_open(). However, since we use it for file locking now,

[PATCH] accel/tcg: Fix translation exception on invalid instruction

2021-04-13 Thread Ilya Leoshkevich
Hitting an uretprobe in a s390x TCG guest causes a SIGSEGV. What happens is: * uretprobe maps a userspace page containing an invalid instruction. * uretprobe replaces the target function's return address with the address of that page. * When tb_gen_code() is called on that page, tb->size ends

Re: [PULL 0/2] osdep.h changes for QEMU 6.0-rc3

2021-04-13 Thread no-reply
Patchew URL: https://patchew.org/QEMU/20210413124800.216095-1-pbonz...@redhat.com/ Hi, This series seems to have some coding style problems. See output below for more information: Type: series Message-id: 20210413124800.216095-1-pbonz...@redhat.com Subject: [PULL 0/2] osdep.h changes for

[PATCH v2] target/ppc: code motion from translate_init.c.inc to gdbstub.c

2021-04-13 Thread Bruno Larsen (billionai)
All the code related to gdb has been moved from translate_init.c.inc file to the gdbstub.c file, where it makes more sense. Updated version, solving some missing parts of the patch and style choices. Signed-off-by: Bruno Larsen (billionai) Suggested-by: Fabiano Rosas --- target/ppc/cpu.h

Re: [PATCH] accel/tcg: Fix translation exception on invalid instruction

2021-04-13 Thread Richard Henderson
On 4/13/21 6:23 AM, Ilya Leoshkevich wrote: * When tb_gen_code() is called on that page, tb->size ends up being 0 This is the bug, in target/s390x. Perhaps we need to add an assert that size != 0 after translation... Fix by special-casing tb->size == 0: since there is no useful code, we

Re: [PATCH for-6.0] x86: acpi: use offset instead of pointer when using build_header()

2021-04-13 Thread Michael S. Tsirkin
On Tue, Apr 13, 2021 at 03:18:16PM +0200, Igor Mammedov wrote: > On Tue, 13 Apr 2021 08:14:56 -0400 > "Michael S. Tsirkin" wrote: > > > On Tue, Apr 13, 2021 at 07:14:00AM -0400, Igor Mammedov wrote: > > > Do the same as in commit > > > (4d027afeb3a97 Virt: ACPI: fix qemu assert due to

Re: [PATCH-for-6.1] exec: Remove accel/tcg/ from include paths

2021-04-13 Thread Richard Henderson
On 4/13/21 1:10 AM, Philippe Mathieu-Daudé wrote: When TCG is enabled, the accel/tcg/ include path is added to the project global include search list. This accel/tcg/ directory contains a header named "internal.h" which, while intented to be internal to accel/tcg/, is accessible by all files

Re: [PATCH for-6.0] x86: acpi: use offset instead of pointer when using build_header()

2021-04-13 Thread Igor Mammedov
On Tue, 13 Apr 2021 09:53:17 -0400 "Michael S. Tsirkin" wrote: > On Tue, Apr 13, 2021 at 03:18:16PM +0200, Igor Mammedov wrote: > > On Tue, 13 Apr 2021 08:14:56 -0400 > > "Michael S. Tsirkin" wrote: > > > > > On Tue, Apr 13, 2021 at 07:14:00AM -0400, Igor Mammedov wrote: > > > > Do the

[Bug 1923629] [NEW] RISC-V Vector Instruction vssub.vv not saturating

2021-04-13 Thread Tony Cole
Public bug reported: I noticed doing a negate ( 0 – 0x8000 ) using vssub.vv produces an incorrect result of 0x8000 (should saturate to 0x7FFF). Here is the bit of the code: vmv.v.i v16, 0 … 8f040457vssub.vvv8,v16,v8 I believe

Re: [EXTERNAL] [PATCH v1 2/3] target/ppc: POWER10 supports scv

2021-04-13 Thread Cédric Le Goater
Nick, I really prefer c...@kaod.org :) On 4/13/21 2:54 PM, Nicholas Piggin wrote: > This must have slipped through the cracks between adding POWER10 support > and scv support. > > Signed-off-by: Nicholas Piggin Reviewed-by: Cédric Le Goater and Tested-by: Cédric Le Goater on a recently

Re: [EXTERNAL] [PATCH v1 1/3] target/ppc: Fix POWER9 radix guest HV interrupt AIL behaviour

2021-04-13 Thread Cédric Le Goater
On 4/13/21 2:54 PM, Nicholas Piggin wrote: > ISA v3.0 radix guest execution has a quirk in AIL behaviour such that > the LPCR[AIL] value can apply to hypervisor interrupts. Shouldn't we test for P9 ? But I think you are using a new exception model for P10 in the next patch. I guess it's ok for

[PULL 1/1] vhost-user-fs: fix features handling

2021-04-13 Thread Dr. David Alan Gilbert (git)
From: Anton Kuchin Make virtio-fs take into account server capabilities. Just returning requested features assumes they all of then are implemented by server and results in setting unsupported configuration if some of them are absent. Signed-off-by: Anton Kuchin Reviewed-by: Dr. David Alan

[PULL 0/1] virtiofs queue for 6.0

2021-04-13 Thread Dr. David Alan Gilbert (git)
.com/dagrh/qemu.git tags/pull-virtiofs-20210413 for you to fetch changes up to ace66791cd15657320b11b1a421afc055f28efca: vhost-user-fs: fix features handling (2021-04-13 16:13:41 +0100) virtiofs: Fix feature negotiation (for 6.0)

[PATCH RESEND v7 02/13] memory: Helpers to copy/free a MemoryRegionSection

2021-04-13 Thread David Hildenbrand
In case one wants to create a permanent copy of a MemoryRegionSections, one needs access to flatview_ref()/flatview_unref(). Instead of exposing these, let's just add helpers to copy/free a MemoryRegionSection and properly adjust references. Cc: Paolo Bonzini Cc: "Michael S. Tsirkin" Cc: Alex

Re: [PATCH] cutils: fix memory leak in get_relocated_path()

2021-04-13 Thread Philippe Mathieu-Daudé
Is this fix aiming at 6.0 release? On 4/12/21 7:02 PM, Stefano Garzarella wrote: > get_relocated_path() allocates a GString object and returns the > character data (C string) to the caller without freeing the memory > allocated for that object as reported by valgrind: > > 24 bytes in 1 blocks

Re: testing/next - hexagon toolchain update

2021-04-13 Thread Alex Bennée
Brian Cain writes: > Alex, > > You are the one maintaining the testing/next tree at > https://gitlab.com/stsquad/qemu correct? The current patch series for > hexagon under review requires toolchain updates. These changes to > llvm/clang landed in the last week or two. > > Can you apply this

[PULL 3/3] sphinx: qapidoc: Wrap "If" section body in a paragraph node

2021-04-13 Thread Peter Maydell
From: John Snow These sections need to be wrapped in a block-level element, such as Paragraph in order for them to be rendered into Texinfo correctly. Before (e.g.): If defined(CONFIG_REPLICATION) became: .SS If \fBdefined(CONFIG_REPLICATION)\fP.SS \fBBlockdevOptionsReplication\fP

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