Thank you for the detailed explanation.
Peter Maydell 于2021年8月6日周五 下午6:16写道：
>
> On Fri, 6 Aug 2021 at 07:24, Duo jia wrote:
> > I am simulating a device. When an interrupt occurs, another interrupt
> > comes, and the second interrupt will not be triggered because the
> > first interrupt has not
On 8/7/21 8:45 AM, Markus Armbruster wrote:
Jonah Palmer writes:
From: Laurent Vivier
This new command shows internal status of a VirtQueue.
(vrings and indexes).
Signed-off-by: Laurent Vivier
Signed-off-by: Jonah Palmer
[...]
diff --git a/qapi/virtio.json b/qapi/virtio.json
index 788
On 06/08/2021 00:29, Shashi Mallela wrote:
> Added register definitions relevant to ITS,implemented overall
> ITS device framework with stubs for ITS control and translater
> regions read/write,extended ITS common to handle mmio init between
> existing kvm device and newer qemu device.
>
> Signed-
On 06/08/2021 00:29, Shashi Mallela wrote:
> Implemented lpi processing at redistributor to get lpi config info
> from lpi configuration table,determine priority,set pending state in
> lpi pending table and forward the lpi to cpuif.Added logic to invoke
> redistributor lpi processing with translate
On 06/08/2021 00:29, Shashi Mallela wrote:
> Added functionality to trigger ITS command queue processing on
> write to CWRITE register and process each command queue entry to
> identify the command type and handle commands like MAPD,MAPC,SYNC.
>
> Signed-off-by: Shashi Mallela
> Reviewed-by: Pete
On 06/08/2021 00:29, Shashi Mallela wrote:
> Defined descriptors for ITS device table,collection table and ITS
> command queue entities.Implemented register read/write functions,
> extract ITS table parameters and command queue parameters,extended
> gicv3 common to capture qemu address space(which
On 06/08/2021 00:29, Shashi Mallela wrote:
> Added properties to enable ITS feature and define qemu system
> address space memory in gicv3 common,setup distributor and
> redistributor registers to indicate LPI support.
>
> Signed-off-by: Shashi Mallela
> Reviewed-by: Peter Maydell
> ---
> hw/in
On 09.08.21 20:43, Peter Maydell wrote:
On Mon, 9 Aug 2021 at 18:03, Hanna Reitz wrote:
Hi Peter,
Let me prefix this by saying that it's me, Max. I've changed my name
and email address. I understand freeze may not be the best of times for
this, but it looks like I can no longer send mails fr
On Tue, Aug 10, 2021 at 10:35 AM Volker Rümelin wrote:
> Commit 584af1f1d9 ("ui/gtk: add a keyboard fifo to the VTE
> consoles") changed the VTE chardev backend code to rely on the
> chr_accept_input() callback function. The code expects a
> chr_accept_input() call whenever qemu_chr_be_can_write(
Thanks for your comments.
Before reposting the fix patch series,
based on your comments and the v3 1/3 patch,
we have considered the following fixes.
If you have any comments on the fixes, please let us know.
---
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index 9f0a5f84d5..84ebca731a 10
ARM SBBR specification mandates DBG2 table (Debug Port Table 2).
this latter allows to describe one or more debug ports.
Generate an DBG2 table featuring a single debug port, the PL011.
The DBG2 specification can be found at:
https://docs.microsoft.com/en-us/windows-hardware/drivers/bringup/acpi-
On 09.08.21 20:41, Vivek Goyal wrote:
On Fri, Jul 30, 2021 at 05:01:33PM +0200, Max Reitz wrote:
When the inode_file_handles option is set, try to generate a file handle
for new inodes instead of opening an O_PATH FD.
Being able to open these again will require CAP_DAC_READ_SEARCH, so the
descr
Fetch the OpenPOWER images to boot the powernv8 and powernv9 machines
with a simple PCI layout.
Cc: Cleber Rosa
Cc: Wainer dos Santos Moschetta
Signed-off-by: Cédric Le Goater
---
tests/acceptance/boot_linux_console.py | 42 ++
1 file changed, 42 insertions(+)
diff --g
You probably have noticed that Laszlo stepped down from edk2
maintenance (see commit 2669350db2c3 ("MAINTAINERS: remove Laszlo
Ersek's entries")). This applies not only to qemu, but also the edk2
project.
I'll go try fill the hole he left and shift my priorities towards edk2.
This naturally comes
I have not touched the code for years.
Make the entry match reality and drop my name.
Cc: Daniel P. Berrange
Signed-off-by: Gerd Hoffmann
---
MAINTAINERS | 1 -
1 file changed, 1 deletion(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index 9d31e42786b5..9b1b3f6599b5 100644
--- a/MAINTAINERS
+++ b/
New maintainer wanted. Switch role to "Reviewer" for usb-serial,
downgrade status to "Odd Fixes" for everything else.
Cc: Samuel Thibault
Signed-off-by: Gerd Hoffmann
---
MAINTAINERS | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index ef916c9
I want keep an eye on the edk2 things happening in qemu.
Cc: Philippe Mathieu-Daudé
Signed-off-by: Gerd Hoffmann
---
MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 37b1a8e4428c..9d31e42786b5 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -2947,6 +
New maintainer wanted. Downgrade status to "Odd Fixes" for now.
Signed-off-by: Gerd Hoffmann
---
MAINTAINERS | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index 5d24ac453bb6..7d3e0ca43676 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -2157,7 +2
New maintainer wanted. Downgrade status to "Odd Fixes" for now.
Signed-off-by: Gerd Hoffmann
---
MAINTAINERS | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index 9b1b3f6599b5..90dfe93d7246 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -2258,7 +2258,
New maintainer wanted. Downgrade status to "Odd Fixes" for now.
Signed-off-by: Gerd Hoffmann
---
MAINTAINERS | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index 90dfe93d7246..ef916c993472 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -2470,7 +2470,
New maintainer wanted. Downgrade status to "Odd Fixes" for now.
Signed-off-by: Gerd Hoffmann
---
MAINTAINERS | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index fda79d2449ad..5d24ac453bb6 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1951,7 +1951,
On 09.08.21 21:08, Vivek Goyal wrote:
On Fri, Jul 30, 2021 at 05:01:34PM +0200, Max Reitz wrote:
lo_find() right now takes two lookup keys for two maps, namely the file
handle for inodes_by_handle and the statx information for inodes_by_ids.
However, we only need the statx information if looking
On Tue, 10 Aug 2021 at 08:34, Cédric Le Goater wrote:
>
> Fetch the OpenPOWER images to boot the powernv8 and powernv9 machines
> with a simple PCI layout.
>
> Cc: Cleber Rosa
> Cc: Wainer dos Santos Moschetta
> Signed-off-by: Cédric Le Goater
> ---
> tests/acceptance/boot_linux_console.py | 4
Hi,
this part actually works. .needed is only evaluated on the sending side. For
the receiving side subsections are optional. Migration doesn't fail if a
subsection isn't loaded. Before I sent this patch series one of the
migration tests was a migration from 6.0.92 to 6.0.92 with one byte in
Allow instantiating a virtio-iommu device on ACPI systems by adding a
Virtual I/O Translation table (VIOT). Enable x86 support for VIOT.
With a simple configuration the table contains a virtio-iommu-pci node
and a pci-range node:
qemu-system-aarch64 -M virt -bios QEMU_EFI.fd
-de
The ACPI Virtual I/O Translation table (VIOT) describes the relation
between a virtio-iommu and the endpoints it manages. When a virtio-iommu
device is instantiated, add a VIOT table.
Signed-off-by: Jean-Philippe Brucker
---
include/hw/i386/pc.h | 2 ++
hw/i386/acpi-build.c | 5 +
hw/i386/pc
The ACPI Virtual I/O Translation table (VIOT) table describes I/O
topology for paravirtual devices. At the moment it describes the
relation between virtio-iommu devices and their endpoints. Add the
structure definitions for VIOT.
Signed-off-by: Jean-Philippe Brucker
---
Following the latest spec
From: Eric Auger
Add a hotplug handler for virtio-iommu on x86 and set the necessary
reserved region property. On x86, the [0xfee0, 0xfeef] DMA
region is reserved for MSIs. DMA transactions to this range either
trigger IRQ remapping in the IOMMU or bypasses IOMMU translation.
Although vi
virtio-iommu is now supported with ACPI VIOT as well as device tree.
Remove the restriction that prevents from instantiating a virtio-iommu
device under ACPI.
Signed-off-by: Jean-Philippe Brucker
---
hw/arm/virt.c| 10 ++
hw/virtio/virtio-iommu-pci.c | 7 ---
2 files
Add a function that generates a Virtual I/O Translation table (VIOT),
describing the topology of paravirtual IOMMUs. The table is created when
instantiating a virtio-iommu device. It contains a virtio-iommu node and
PCI Range nodes for endpoints managed by the IOMMU. By default, a single
node descr
Cc: John Wang
On 8/10/21 5:57 AM, Guenter Roeck wrote:
> According to its dts file in the Linux kernel, we need mac0 and mac1 enabled
> instead of mac1 and mac2. Also, g220a is based on aspeed-g5 (ast2500) which
> doesn't even have the third interface.
>
> Signed-off-by: Guenter Roeck
Reviewed-
When a virtio-iommu is instantiated, describe it using the ACPI VIOT
table.
Signed-off-by: Jean-Philippe Brucker
---
hw/arm/virt-acpi-build.c | 7 +++
hw/arm/Kconfig | 1 +
2 files changed, 8 insertions(+)
diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
index 037c
On 8/10/21 2:58 AM, David Gibson wrote:
> On Mon, Aug 09, 2021 at 10:14:05AM +0200, Cédric Le Goater wrote:
>> On 8/9/21 10:06 AM, Philippe Mathieu-Daudé wrote:
>>> On 8/9/21 9:55 AM, Cédric Le Goater wrote:
Hello Phil,
On 8/9/21 9:06 AM, Philippe Mathieu-Daudé wrote:
> Hi Cédric
In this patch, two dcl operators were implemented for Cocoa
display, to prepare, update and draw guest cursor on screen canvas.
After this implementation, Cocoa display could support virtio-vga
device, which is better supported in guest side, especially for Linux.
In contrast to the default vga d
On Mon, Aug 09, 2021 at 03:41:36PM +0200, Peter Lieven wrote:
Please, can you add a description?
For example also describing what happens if RBD image does not support
RBD_FEATURE_FAST_DIFF.
Signed-off-by: Peter Lieven
---
block/rbd.c | 119 +++
On Tue, Aug 10, 2021 at 08:32:57AM +0200, Volker Rümelin wrote:
> Commit 584af1f1d9 ("ui/gtk: add a keyboard fifo to the VTE
> consoles") changed the VTE chardev backend code to rely on the
> chr_accept_input() callback function. The code expects a
> chr_accept_input() call whenever qemu_chr_be_can
On Mon, Aug 09, 2021 at 06:09:56PM +0100, Dr. David Alan Gilbert (git) wrote:
> From: "Dr. David Alan Gilbert"
>
> The audio migration vmstate is empty, and always has been; we can't
> just remove it though because an old qemu might send it us.
> Changes with -audiodev now mean it's sometimes cre
On Mon, Aug 09, 2021 at 05:14:24PM +0100, Peter Maydell wrote:
> Setting environment variables can fail; check the return value
> from g_setenv() and bail out if we couldn't set SDL_VIDEODRIVER.
>
> Fixes: Coverity 1458798
> Signed-off-by: Peter Maydell
> ---
> I followed existing practice in thi
On 8/10/21 5:12 AM, David Gibson wrote:
> On Mon, Aug 09, 2021 at 03:45:21PM +0200, Cédric Le Goater wrote:
>> Hi,
>>
>> This series adds the minimum set of models (XIVE2, PHB5) to boot a
>> baremetal POWER10 machine using the OpenPOWER firmware images.
>>
>> The major change is the support for the
Hi,
> > This patch series improves the PS/2 keyboard emulation.
> >
> > There's a workaround for issue #501 and #502 so I don't think
> > this is rc3 material. But that decision is up to the maintainers.
Phew. I'm a little nervous on adding it that late, so yes, I'd tend to
consider it 6.2 ma
On 8/10/21 10:36 AM, Joel Stanley wrote:
> On Tue, 10 Aug 2021 at 08:34, Cédric Le Goater wrote:
>>
>> Fetch the OpenPOWER images to boot the powernv8 and powernv9 machines
>> with a simple PCI layout.
>>
>> Cc: Cleber Rosa
>> Cc: Wainer dos Santos Moschetta
>> Signed-off-by: Cédric Le Goater
>
In this patch, two dcl operators were implemented for Cocoa
display, to prepare, update and draw guest cursor on screen canvas.
After this implementation, Cocoa display could support virtio-vga
device, which is better supported in guest side, especially for Linux.
In contrast to the default vga
On Tue, 10 Aug 2021 10:45:02 +0200
Jean-Philippe Brucker wrote:
> Add a function that generates a Virtual I/O Translation table (VIOT),
> describing the topology of paravirtual IOMMUs. The table is created when
> instantiating a virtio-iommu device. It contains a virtio-iommu node and
> PCI Range
On Tue, 10 Aug 2021 at 10:31, Eric Auger wrote:
>
> ARM SBBR specification mandates DBG2 table (Debug Port Table 2).
> this latter allows to describe one or more debug ports.
>
> Generate an DBG2 table featuring a single debug port, the PL011.
>
> The DBG2 specification can be found at:
> https://
* Peter Maydell (peter.mayd...@linaro.org) wrote:
> migration-test hung on me again in merge testing. Here are the
> backtraces; note that one of the qemu-system-i386 processes is a
> zombie that its parent isn't reaping.
>
> Process tree:
> migration-test(786453)-+-qemu-system-i38(802719)
>
I have changed my name and email address. Update the MAINTAINERS file
to match.
Signed-off-by: Hanna Reitz
---
MAINTAINERS | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index 37b1a8e442..694973ed23 100644
--- a/MAINTAINERS
+++ b/MAINTAINER
* Philippe Mathieu-Daudé (phi...@redhat.com) wrote:
> On 8/9/21 7:12 PM, Daniel P. Berrangé wrote:
> > On Mon, Aug 09, 2021 at 06:09:56PM +0100, Dr. David Alan Gilbert (git)
> > wrote:
> >> From: "Dr. David Alan Gilbert"
> >>
> >> The audio migration vmstate is empty, and always has been; we can'
On 8/9/21 8:14 PM, Eduardo Habkost wrote:
On Mon, Aug 09, 2021 at 07:31:41PM +0200, Alexandre Iooss wrote:
Signed-off-by: Alexandre Iooss
---
docs/devel/qom.rst | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/docs/devel/qom.rst b/docs/devel/qom.rst
index e5fe3597cd..b9568
On Mon, Aug 09, 2021 at 03:45:30PM +0200, Cédric Le Goater wrote:
> The XIVE2 interrupt controller of the POWER10 processor as the same
> logic as on POWER9 but its SW interface has been largely reworked. The
> interrupt controller has a new register interface, different BARs,
> extra VSDs. These w
Hello Ard,
On 8/10/21 11:36 AM, Ard Biesheuvel wrote:
> On Tue, 10 Aug 2021 at 10:31, Eric Auger wrote:
>> ARM SBBR specification mandates DBG2 table (Debug Port Table 2).
>> this latter allows to describe one or more debug ports.
>>
>> Generate an DBG2 table featuring a single debug port, the PL0
Hi Philippe,
On Mon, Aug 9, 2021 at 1:46 PM Philippe Mathieu-Daudé
wrote:
> Hi Kostiantyn,
>
> On 8/9/21 11:48 AM, Kostiantyn Kostiuk wrote:
> > Signed-off-by: Kostiantyn Kostiuk
>
> I'm not sure what you are trying to do here, fix a memory leak?
>
Yes. This set of patches fix a memory leak. T
On Tue, 10 Aug 2021 10:30:57 +0200
Eric Auger wrote:
> ARM SBBR specification mandates DBG2 table (Debug Port Table 2).
> this latter allows to describe one or more debug ports.
>
> Generate an DBG2 table featuring a single debug port, the PL011.
>
> The DBG2 specification can be found at:
> ht
The sphinx-build is fairly verbose spitting out pages of output to the
console, which causes errors from other build commands to be scrolled
off the top of the terminal. This can leave the mistaken impression that
the build passed, when in fact there was a failure.
Signed-off-by: Daniel P. Berrang
On Tue, 10 Aug 2021 at 12:01, Daniel P. Berrangé wrote:
>
> The sphinx-build is fairly verbose spitting out pages of output to the
> console, which causes errors from other build commands to be scrolled
> off the top of the terminal. This can leave the mistaken impression that
> the build passed,
On Tue, Aug 10, 2021 at 12:06:47PM +0100, Peter Maydell wrote:
> On Tue, 10 Aug 2021 at 12:01, Daniel P. Berrangé wrote:
> >
> > The sphinx-build is fairly verbose spitting out pages of output to the
> > console, which causes errors from other build commands to be scrolled
> > off the top of the t
* Samarth Saxena (samar...@cadence.com) wrote:
> Hi All,
>
> I am trying the following command to run Qemu with Kernel 5.14.
cc'ing in Ben who I think owns the CXL stuff.
> qemu-system-x86_64 -M q35,accel=kvm,nvdimm=on,cxl=on,hmat=on -m
> 8448M,slots=2,maxmem=16G -smp 8,sockets=2,cores=2,thread
On 8/10/21 11:50 AM, Hanna Reitz wrote:
> I have changed my name and email address. Update the MAINTAINERS file
> to match.
>
> Signed-off-by: Hanna Reitz
> ---
> MAINTAINERS | 8
> 1 file changed, 4 insertions(+), 4 deletions(-)
I'd recommend you to also add an entry in .mailmap:
--
The sphinx-build is fairly verbose spitting out pages of output to the
console, which causes errors from other build commands to be scrolled
off the top of the terminal. This can leave the mistaken impression that
the build passed, when in fact there was a failure.
Signed-off-by: Daniel P. Berrang
On Tue, Aug 10, 2021 at 08:23:39AM +, ishii.shuuic...@fujitsu.com wrote:
>
> Thanks for your comments.
>
> Before reposting the fix patch series,
> based on your comments and the v3 1/3 patch,
> we have considered the following fixes.
>
> If you have any comments on the fixes, please let us
On 10.08.21 13:29, Philippe Mathieu-Daudé wrote:
On 8/10/21 11:50 AM, Hanna Reitz wrote:
I have changed my name and email address. Update the MAINTAINERS file
to match.
Signed-off-by: Hanna Reitz
---
MAINTAINERS | 8
1 file changed, 4 insertions(+), 4 deletions(-)
I'd recommend y
On Tue, Aug 10, 2021 at 12:25:07PM +0200, Eric Auger wrote:
> Hello Ard,
> On 8/10/21 11:36 AM, Ard Biesheuvel wrote:
> > On Tue, 10 Aug 2021 at 10:31, Eric Auger wrote:
> >> ARM SBBR specification mandates DBG2 table (Debug Port Table 2).
> >> this latter allows to describe one or more debug port
Eduardo Habkost wrote:
> There are multiple functions where OBJECT_GET_CLASS or
> OBJECT_CLASS_CHECK are being used directly for
> DeviceClass/TYPE_DEVICE, instead of the DEVICE_GET_CLASS or
> DEVICE_CLASS wrappers. There's no reason to not use the
> wrappers, so use them.
>
> Signed-off-by: Edua
Hi,
> The helper may or may not be installed at the path compiled into QEMU.
>
Yes, so the helper will not be called - QEMU will try to initiate eBPF RSS
or use "in-qemu" RSS.
What happens when you use the wrong helper?
>
UB - in most cases, eBPF program will work with wrong configurations.
That'
Eduardo Habkost wrote:
> Some typedefs and macros are defined after the type check macros.
> This makes it difficult to automatically replace their
> definitions with OBJECT_DECLARE_TYPE.
>
> Patch generated using:
>
> $ ./scripts/codeconverter/converter.py -i --pattern=MoveSymbols \
> $(git
"Dr. David Alan Gilbert (git)" wrote:
> From: "Dr. David Alan Gilbert"
>
> The audio migration vmstate is empty, and always has been; we can't
> just remove it though because an old qemu might send it us.
> Changes with -audiodev now mean it's sometimes created when it didn't
> used to be, and ca
Hi Igor,
On 8/10/21 12:52 PM, Igor Mammedov wrote:
> On Tue, 10 Aug 2021 10:30:57 +0200
> Eric Auger wrote:
>
>> ARM SBBR specification mandates DBG2 table (Debug Port Table 2).
>> this latter allows to describe one or more debug ports.
>>
>> Generate an DBG2 table featuring a single debug port,
Hi Drew,
On 8/10/21 1:55 PM, Andrew Jones wrote:
> On Tue, Aug 10, 2021 at 12:25:07PM +0200, Eric Auger wrote:
>> Hello Ard,
>> On 8/10/21 11:36 AM, Ard Biesheuvel wrote:
>>> On Tue, 10 Aug 2021 at 10:31, Eric Auger wrote:
ARM SBBR specification mandates DBG2 table (Debug Port Table 2).
The following changes since commit bccabb3a5d60182645c7749e89f21a9ff307a9eb:
Update version for v6.1.0-rc2 release (2021-08-04 16:56:14 +0100)
are available in the Git repository at:
git://git.kraxel.org/qemu tags/fixes-20210810-pull-request
for you to fetch changes up to
From: Volker Rümelin
Commit 584af1f1d9 ("ui/gtk: add a keyboard fifo to the VTE
consoles") changed the VTE chardev backend code to rely on the
chr_accept_input() callback function. The code expects a
chr_accept_input() call whenever qemu_chr_be_can_write() bytes
were written. It turns out this is
On 8/10/21 1:46 PM, Hanna Reitz wrote:
> On 10.08.21 13:29, Philippe Mathieu-Daudé wrote:
>> On 8/10/21 11:50 AM, Hanna Reitz wrote:
>>> I have changed my name and email address. Update the MAINTAINERS file
>>> to match.
>>>
>>> Signed-off-by: Hanna Reitz
>>> ---
>>> MAINTAINERS | 8
>>
From: "Dr. David Alan Gilbert"
The audio migration vmstate is empty, and always has been; we can't
just remove it though because an old qemu might send it us.
Changes with -audiodev now mean it's sometimes created when it didn't
used to be, and can confuse migration to old qemu.
Change it so tha
On Tue, 10 Aug 2021 14:05:40 +0200
Eric Auger wrote:
> Hi Igor,
>
> On 8/10/21 12:52 PM, Igor Mammedov wrote:
> > On Tue, 10 Aug 2021 10:30:57 +0200
> > Eric Auger wrote:
> >
> >> ARM SBBR specification mandates DBG2 table (Debug Port Table 2).
> >> this latter allows to describe one or more
From: Peter Maydell
Setting environment variables can fail; check the return value
from g_setenv() and bail out if we couldn't set SDL_VIDEODRIVER.
Fixes: Coverity 1458798
Signed-off-by: Peter Maydell
Message-Id: <20210809161424.32355-1-peter.mayd...@linaro.org>
Signed-off-by: Gerd Hoffmann
--
On Thu, Aug 05 2021, Ilya Leoshkevich wrote:
> Verify that s390x-specific uc_mcontext.psw.addr is reported correctly
> and that signal handling interacts properly with debugging.
>
> Signed-off-by: Ilya Leoshkevich
> ---
>
> v7: https://lists.nongnu.org/archive/html/qemu-devel/2021-08/msg00463.h
On Thu, Aug 05 2021, David Hildenbrand wrote:
> We not only invalidate the translation of the range 0x0-0x2000, we also
> invalidate the translation of the new prefix range and the translation
> of the old prefix range -- because real2abs would return different
> results for all of these ranges w
On Thu, Aug 05 2021, David Hildenbrand wrote:
> schib->pmcw.chars is 32bit, not 16bit. This fixes the kvm-unit-tests
> "css" test, which fails with:
>
> FAIL: Channel Subsystem: measurement block format1: Unaligned MB origin:
> Program interrupt: expected(21) == received(0)
>
> Because we end
On Tue, Aug 10, 2021 at 01:46:51PM +0200, Hanna Reitz wrote:
> On 10.08.21 13:29, Philippe Mathieu-Daudé wrote:
> > On 8/10/21 11:50 AM, Hanna Reitz wrote:
> > > I have changed my name and email address. Update the MAINTAINERS file
> > > to match.
> > >
> > > Signed-off-by: Hanna Reitz
> > > ---
The following changes since commit bccabb3a5d60182645c7749e89f21a9ff307a9eb:
Update version for v6.1.0-rc2 release (2021-08-04 16:56:14 +0100)
are available in the Git repository at:
https://github.com/legoater/qemu/ tags/pull-powernv-20210810
for you to fetch changes up to
On Tue, 10 Aug 2021 at 12:13, Daniel P. Berrangé wrote:
>
> On Tue, Aug 10, 2021 at 12:06:47PM +0100, Peter Maydell wrote:
> > Can we make meson pass '-q' only for non-verbose builds, so that
> > if you pass make 'V=1' you still get the verbose sphinx output ?
>
> The meson.build rules are turned
Hi Igor,
On 8/10/21 2:20 PM, Igor Mammedov wrote:
> On Tue, 10 Aug 2021 14:05:40 +0200
> Eric Auger wrote:
>
>> Hi Igor,
>>
>> On 8/10/21 12:52 PM, Igor Mammedov wrote:
>>> On Tue, 10 Aug 2021 10:30:57 +0200
>>> Eric Auger wrote:
>>>
ARM SBBR specification mandates DBG2 table (Debug Port
On Tue, 10 Aug 2021 at 02:43, Michael Roth wrote:
>
> Hi Peter,
>
> This is a single fix for a potentially recurring memory leak in the guest
> agent. If you don't think it is rc3 material I can save it for 6.2, but if
> possible this would be good to have in.
>
> The following changes since commi
On Tue, Aug 10, 2021 at 01:48:51PM +0100, Peter Maydell wrote:
> On Tue, 10 Aug 2021 at 12:13, Daniel P. Berrangé wrote:
> >
> > On Tue, Aug 10, 2021 at 12:06:47PM +0100, Peter Maydell wrote:
> > > Can we make meson pass '-q' only for non-verbose builds, so that
> > > if you pass make 'V=1' you st
On 8/10/21 8:06 AM, David Gibson wrote:
> On Mon, Aug 09, 2021 at 03:45:30PM +0200, Cédric Le Goater wrote:
>> The XIVE2 interrupt controller of the POWER10 processor as the same
>> logic as on POWER9 but its SW interface has been largely reworked. The
>> interrupt controller has a new register int
On 8/10/21 12:19 AM, David Gibson wrote:
On Mon, Aug 09, 2021 at 10:10:39AM -0300, Daniel Henrique Barboza wrote:
The PowerPC PMU, as described by PowerISA v3.1, has a lot of functions
that freezes, resets and sets counters to specific values depending on
the circuntances. Some of these are t
On Tue, Aug 10, 2021 at 02:01:40PM +0200, Juan Quintela wrote:
> Eduardo Habkost wrote:
> > Some typedefs and macros are defined after the type check macros.
> > This makes it difficult to automatically replace their
> > definitions with OBJECT_DECLARE_TYPE.
> >
> > Patch generated using:
> >
> >
Since commit d8fb7d0969d5 ("vl: switch -M parsing to keyval"),
keyval_dashify() replaces all underscores with dashes in machine
options. As a result the machine option "default_bus_bypass_iommu",
which was introduced in the same release (c9e96b04fc19 6d7a85483a06), is
not recognized:
$ qemu-system
On 8/10/21 12:39 AM, David Gibson wrote:
On Mon, Aug 09, 2021 at 10:10:42AM -0300, Daniel Henrique Barboza wrote:
The PMCC (PMC Control) bit in the MMCR0 register controls whether the
counters PMC5 and PMC6 are being part of the performance monitor
facility in a specific time. If PMCC allows
Le 09/08/2021 à 17:54, Peter Maydell a écrit :
> In do_setsockopt(), the code path for the options which take a struct
> ip_mreq_source (IP_BLOCK_SOURCE, IP_UNBLOCK_SOURCE,
> IP_ADD_SOURCE_MEMBERSHIP and IP_DROP_SOURCE_MEMBERSHIP) fails to
> check the return value from lock_user(). Handle this in
Am 10.08.21 um 10:51 schrieb Stefano Garzarella:
On Mon, Aug 09, 2021 at 03:41:36PM +0200, Peter Lieven wrote:
Please, can you add a description?
For example also describing what happens if RBD image does not support
RBD_FEATURE_FAST_DIFF.
Sure.
Signed-off-by: Peter Lieven
---
block/rb
Since commit ff6e1624b3 (pckbd: don't update OBF flags if
KBD_STAT_OBF is set) the OSes Minoca OS and Visopsys no longer
have a working PS/2 keyboard and mouse. This is caused by a
PS/2 queue stall due to a lost interrupt in the guest OS. This
already happened before commit ff6e1624b3, but no one
Add migration support for the PS/2 keyboard command reply queue.
Signed-off-by: Volker Rümelin
---
hw/input/ps2.c | 40 ++--
1 file changed, 34 insertions(+), 6 deletions(-)
diff --git a/hw/input/ps2.c b/hw/input/ps2.c
index 8c06fd7fb4..9376a8f4ce 100644
---
Extend the used ps2 buffer size to the available buffer size but
keep the maximum ps2 queue size.
The next patch needs a few bytes of the larger buffer size.
Signed-off-by: Volker Rümelin
---
hw/input/ps2.c | 69 +++---
1 file changed, 20 insertions(+
A PS/2 keyboard has a separate command reply queue that is
independent of the key queue. This prevents that command replies
and keyboard input mix. Keyboard command replies take precedence
over queued keystrokes. A new keyboard command removes any
remaining command replies from the command reply qu
As described in
https://lore.kernel.org/r/20201116104216.439650-1-david.edmond...@oracle.com
and
https://lore.kernel.org/r/20210222174757.2329740-1-david.edmond...@oracle.com
I'd like to reduce the amount of memory consumed by QEMU mapping UEFI
images on aarch64.
To recap:
> Currently ARM UEFI im
the qemu rbd driver currently lacks support for bdrv_co_block_status.
This results mainly in incorrect progress during block operations (e.g.
qemu-img convert with an rbd image as source).
This patch utilizes the rbd_diff_iterate2 call from librbd to detect
allocated and unallocated (all zero area
Allow the backing device to be smaller than the extent of the flash
device by mapping it as a subregion of the flash device region.
Return zeroes for all reads of the flash device beyond the extent of
the backing device.
For writes beyond the extent of the underlying device, fail on
read-only dev
Hello,
This series implements a simple L2 unified per-core cache emulation, the L2
cache is not enabled by default and is only enabled on specifying so using the
plugin arguments. L2 cache is only accessed if L1 does not contain the wanted
block. If a miss occur in L1, the block is "fetched" to L1
By default L2 is not enabled and is enabled by either using the
newly-introduced "l2" boolean argument, or by setting any of the L2
cache parameters using args. On specifying "l2=on", the default cache
configuration is used.
Signed-off-by: Mahmoud Mandour
---
contrib/plugins/cache.c | 76 +++
cache plugin now allows optional L2 per-core cache emulation that can be
configured through plugin arguments, this commit adds this functionality
to the docs.
While I'm at it, I editted the bullet point for cache plugin to say:
contrib/plugins/cache.c
instead of
contrib/plugins/cache
to ma
Signed-off-by: Mahmoud Mandour
---
contrib/plugins/cache.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/contrib/plugins/cache.c b/contrib/plugins/cache.c
index a1e03ca882..a255e26e25 100644
--- a/contrib/plugins/cache.c
+++ b/contrib/plugins/cache.c
@@ -614,6 +614,9 @@ static void plugi
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