qmp-shell is presently licensed as GPLv2 (only). I intend to include
this tool as an add-on to an LGPLv2+ library package hosted on
PyPI.org. I've selected LGPLv2+ to maximize compatibility with other
licenses while retaining a copyleft license.
To keep licensing matters simple, I'd like to
Since f5ef0e518d0, we have a real page mapped for kuser,
which means the special casing for SIGSEGV can go away.
Signed-off-by: Richard Henderson
---
target/nios2/cpu.h | 6 +-
linux-user/nios2/cpu_loop.c | 10 --
target/nios2/cpu.c | 4 +---
Without EIC, this bit is RES1. So set the bit at reset,
and add it to the readonly fields of CR_STATUS.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/nios2/cpu.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/target/nios2/cpu.c
While some of the plumbing for misaligned data is present, in the form
of nios2_cpu_do_unaligned_access, the hook will not be called because
TARGET_ALIGNED_ONLY is not set in configs/targets/nios2-softmmu.mak.
Signed-off-by: Richard Henderson
---
target/nios2/helper.c | 8
1 file
Place the control registers into their own array, env->ctrl[].
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/nios2/cpu.h | 43
target/nios2/cpu.c | 19 +++
target/nios2/helper.c| 106 +++
The 4 lower bits, D, PERM, BAD, DBL, are unconditionally set on any
exception with EH=0, or so says Table 42 (Processor Status After
Taking Exception).
We currently do not set PERM or BAD at all, and only set/clear
DBL for tlb miss, and do not clear DBL for any other exception.
It is a bit
On Wed, 30 Mar 2022 at 13:56, Damien Hedde wrote:
>
> Hi,
>
> This series add devices to be able to user-create (coldplug) cpu
> clusters. The existing cpu cluster dictates how cpus are exposed
> in gdb, but it does not handle the cpu objects creation. This series
> adds a new device to handle
Do not actually enable them so far, in terms of being able
to change the current register set, but add all of the
plumbing to address them. Do not enable them for user-only.
Add an env->regs pointer that handles the indirection to
the current register set. The naming of the pointer hides
the
On 4/21/22 11:08, Peter Maydell wrote:
On Thu, 21 Apr 2022 at 17:01, Wei Huang wrote:
Coverity issues several UNINIT warnings against AMD IOMMU device [1]. This
patch fixes them by initializing the variables. On top of it, this patch
changes the event log size to 16 bytes per IOMMU
Hi Alex: do you have the ability to create a blank/empty "py-qemu.qmp"
repo under the qemu-project grouping, and add me and Cleber as
maintainers for it? There weren't any objections when I floated the
idea [1].
(Though I suggested "py-qemu.qmp" and Dan suggested "python-qemu.qmp".
I don't think
since commit 9c125d17e9402c232c46610802e5931b3639d77b:
Merge tag 'pull-tcg-20220420' of https://gitlab.com/rth7680/qemu into
staging (2022-04-20 16:43:11 -0700)
are available in the Git repository at:
https://git.linaro.org/people/pmaydell/qemu-arm.git
tags/pull-target-arm-20220421
for you
Thanks!
I can add the new CPU type to virt in a separate patch set. It might take a
while before I send out
that patch set.
Since this patch set will be dependent on that I won't send out a v2 on
this patch set until that finishes.
On Thu, Apr 21, 2022 at 9:42 AM Peter Maydell
wrote:
> On
Have one check in move_to_cr instead of one in each
function that calls move_to_cr.
Signed-off-by: Richard Henderson
Reviewed-by: Yoshinori Sato
Message-Id: <20220417165130.695085-4-richard.hender...@linaro.org>
---
target/rx/translate.c | 14 --
1 file changed, 4 insertions(+), 10
On Thu, 21 Apr 2022 at 17:29, Hao Wu wrote:
>
> Thanks for all the comments you gave! I'll go over and address them recently.
>
> For this question, The actual CPU should be cortex A35. However, I don't see
> them supported in QEMU. If I inserted CPU with "cortex-a35" QEMU will
> complain:
>
We properly perform this swap in helper_set_psw for MVTC,
but we missed doing so for the CLRPSW/SETPSW of the U bit.
Reported-by: Tomoaki Kawada
Signed-off-by: Richard Henderson
Reviewed-by: Yoshinori Sato
Message-Id: <20220417165130.695085-5-richard.hender...@linaro.org>
---
From: Tomoaki Kawada
This patch fixes the implementation of the wait instruction to
implicitly update PSW.I as required by the ISA specification.
Signed-off-by: Tomoaki Kawada
Reviewed-by: Yoshinori Sato
Reviewed-by: Richard Henderson
Message-Id: <20220417045937.2128699-...@yvt.jp>
On 4/21/22 17:51, Peter Maydell wrote:
On Wed, 30 Mar 2022 at 13:56, Damien Hedde wrote:
Hi,
This series add devices to be able to user-create (coldplug) cpu
clusters. The existing cpu cluster dictates how cpus are exposed
in gdb, but it does not handle the cpu objects creation. This
On 4/21/22 08:29, Mark Cave-Ayland wrote:
You need (1 << SCSI_DISK_QUIRK_MODE_PAGE_APPLE) instead.
Doh, you're absolutely right. I believe the current recommendation is to use the BIT()
macro in these cases.
We probably need to fix BIT() to use 1ULL.
At present it's using 1UL, to match the
> On Apr 21, 2022, at 10:59 AM, Markus Armbruster wrote:
>
> Jagannathan Raman writes:
>
>> Setup a handler to run vfio-user context. The context is driven by
>> messages to the file descriptor associated with it - get the fd for
>> the context and hook up the handler with it
>>
>>
From: Daniel P. Berrangé
The combination of the start and finish hooks allow the FD passing
code to use the precopy helper
Signed-off-by: Daniel P. Berrangé
Message-Id: <20220310171821.3724080-11-berra...@redhat.com>
Reviewed-by: Peter Xu
Signed-off-by: Dr. David Alan Gilbert
---
On Sun, 17 Apr 2022 at 19:02, Richard Henderson
wrote:
>
> Use tcg_constant_{i32,i64} as appropriate throughout.
>
> Signed-off-by: Richard Henderson
> ---
> target/arm/translate-m-nocp.c | 12 +---
> 1 file changed, 5 insertions(+), 7 deletions(-)
>
> diff --git
Shift these definitions over from the qmp package to the async qmp
package.
(Licensing: this is a lateral move, from GPLv2 (only) to GPLv2 (only))
Signed-off-by: John Snow
Reviewed-by: Vladimir Sementsov-Ogievskiy
Reviewed-by: Beraldo Leal
Message-id: 20220330172812.3427355-3-js...@redhat.com
aqmp-tui, the async QMP text user interface tool, is presently licensed
as GPLv2+. I intend to include this tool as an add-on to an LGPLv2+
library package hosted on PyPI.org. I've selected LGPLv2+ to maximize
compatibility with other licenses while retaining a copyleft license.
To keep licensing
This is the last vestige of the "aqmp" moniker surviving in the tree; remove it.
Signed-off-by: John Snow
Reviewed-by: Beraldo Leal
Reviewed-by: Vladimir Sementsov-Ogievskiy
Message-id: 20220330172812.3427355-9-js...@redhat.com
Signed-off-by: John Snow
---
python/qemu/qmp/{aqmp_tui.py =>
Do as little work as possible within the macros.
Split out helper functions and pass in arguments instead.
Signed-off-by: Richard Henderson
---
target/nios2/translate.c | 215 +--
1 file changed, 141 insertions(+), 74 deletions(-)
diff --git
Copy the existing cpu_index into the space reserved for CR_CPUID.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/nios2/cpu.c | 4
1 file changed, 4 insertions(+)
diff --git a/target/nios2/cpu.c b/target/nios2/cpu.c
index b3c5ae681c..a0c3e97d72 100644
---
Currently the structures are anonymous within the macro.
Pull them out to standalone types.
Signed-off-by: Richard Henderson
---
target/nios2/translate.c | 48 ++--
1 file changed, 27 insertions(+), 21 deletions(-)
diff --git a/target/nios2/translate.c
Add runtime supporting the nios2-semi.c interface.
Execute the hello and memory multiarch tests.
Cc: Alex Bennée
Signed-off-by: Richard Henderson
---
tests/tcg/nios2/semicall.h | 25 +++
tests/tcg/nios2/10m50-ghrd.ld | 59 +++
Do not print control registers for user-only mode.
Rename reserved control registers to "resN", where
N is the control register index.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/nios2/translate.c | 19 +--
1 file changed, 9 insertions(+), 10
On 21/04/2022 14:27, Fam Zheng wrote:
On 2022-04-21 07:51, Mark Cave-Ayland wrote:
One of the mechanisms MacOS uses to identify drives compatible with MacOS is to
send a custom MODE SELECT command for page 0x30 to the drive. The response to
this is a hard-coded manufacturer string which must
On Wed, 13 Apr 2022 at 18:23, Gautam Agrawal wrote:
>
> A global boolean variable "vga_interface_created"(declared in
> softmmu/globals.c)
> has been used to track the creation of vga interface. If the vga flag is
> passed
> in the command line "default_vga"(declared in softmmu/vl.c) variable
Retain the helper macros for single bit fields as aliases to
the longer R_*_MASK names. Use FIELD_EX32 and FIELD_DP32
instead of manually manipulating the fields.
Since we're rewriting the references to CR_TLBACC_IGN_* anyway,
we correct the name of this field to IG, which is its name in
the
On 4/20/22 16:46, Bin Meng wrote:
It seems you were trying to build every commit for bisectabliity? Is
there an easy way to do such automatically?
git rebase --exec "cd build && make"
r~
This is the cpu side of the operation. Register one irq line,
called EIC. Split out the rather different processing to a
separate function.
Delay initialization of gpio irqs until realize. We need to
provide a window after init in which the board can set eic_present.
Signed-off-by: Richard
Split out a function to perform an indirect branch.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/nios2/translate.c | 27 +--
1 file changed, 13 insertions(+), 14 deletions(-)
diff --git a/target/nios2/translate.c b/target/nios2/translate.c
mknod() on macOS does not support creating sockets, so divert to
call sequence socket(), bind() and chmod() respectively if S_IFSOCK
was passed with mode argument.
Link: https://lore.kernel.org/qemu-devel/17933734.zYzKuhC07K@silver/
Signed-off-by: Christian Schoenebeck
Reviewed-by: Will Cohen
From: Daniel P. Berrangé
The QMP commands have a trailing newline, but the response does not.
This makes the qtest logs hard to follow as the next QMP command
appears in the same line as the previous QMP response.
Reviewed-by: Thomas Huth
Reviewed-by: Peter Xu
Reviewed-by: Juan Quintela
From: "Dr. David Alan Gilbert"
The 'status' field for the migration is updated normally using
an atomic operation from the migration thread.
Most readers of it aren't that careful, and in most cases it doesn't
matter.
In query_migrate->fill_source_migration_info the 'state'
is read twice; the
From: Peter Xu
Will be reused in postcopy fast load thread.
Reviewed-by: Dr. David Alan Gilbert
Signed-off-by: Peter Xu
Message-Id: <20220331150857.74406-6-pet...@redhat.com>
Reviewed-by: Daniel P. Berrangé
Signed-off-by: Dr. David Alan Gilbert
---
migration/ram.c | 2 +-
migration/ram.h |
On 4/21/22 17:59, Peter Maydell wrote:
On Thu, 31 Mar 2022 at 13:19, Damien Hedde wrote:
This flag will be used in device_add to check if
the device needs special allowance from the machine
model.
It will replace the current check based only on the
device being a TYPE_SYB_BUS_DEVICE.
From: Yoshinori Sato
Linux kernel required alined address of DTB.
But missing align in dtb load function.
Fixed to load to the correct address.
Signed-off-by: Yoshinori Sato
Reviewed-by: Philippe Mathieu-Daudé
Message-Id: <20220207132758.84403-1-ys...@users.sourceforge.jp>
Signed-off-by:
On 4/12/22 09:58, Thomas Huth wrote:
Many of the disassemblers in the disas folder are based on old
versions from the GNU tools (libopcode, GDB, ...) that were still
licensed under the GPL v2. The GNU tools switched to GPL v3 at one
point in time, so QEMU is stuck with the old versions, i.e.
From: Daniel P. Berrangé
When debugging failing qtests it is useful to be able to turn on trace
output to stderr. The QTEST_TRACE env variable contents get injected
as a '-trace ' command line arg
Reviewed-by: Peter Xu
Reviewed-by: Thomas Huth
Reviewed-by: Juan Quintela
Signed-off-by: Daniel
From: Peter Xu
We used to release it right after migrate_fd_connect(). That's not good
enough when there're more than one socket pair required, because it'll be
needed to establish TLS connection for the rest channels.
One example is multifd, where we copied over the hostname for each channel
From: Peter Xu
This variable, along with its helpers, is used to detect whether multiple
channel will be supported for migration. In follow up patches, there'll be
other capability that requires multi-channels. Hence move it outside multifd
specific code and make it public. Meanwhile rename
On Sun, 17 Apr 2022 at 18:58, Richard Henderson
wrote:
>
> Instead of computing
>
> tmp1 = shift & 0xff;
> dest = (tmp1 > 0x1f ? 0 : value) << (tmp1 & 0x1f)
>
> use
>
> tmpd = value << (shift & 0x1f);
> dest = shift & 0xe ? 0 : tmpd;
Typo here: should be "0xe0".
Otherwise
On Sun, 17 Apr 2022 at 18:59, Richard Henderson
wrote:
>
> Use tcg_gen_umin_i32 instead of tcg_gen_movcond_i32.
> Use tcg_constant_i32 while we're at it.
>
> Signed-off-by: Richard Henderson
> ---
> target/arm/translate.c | 8 +++-
> 1 file changed, 3 insertions(+), 5 deletions(-)
>
> diff
On Sun, 17 Apr 2022 at 19:05, Richard Henderson
wrote:
>
> Signed-off-by: Richard Henderson
> ---
> target/arm/translate.h | 13 +++--
> 1 file changed, 3 insertions(+), 10 deletions(-)
Reviewed-by: Peter Maydell
thanks
-- PMM
On Sun, 17 Apr 2022 at 19:12, Richard Henderson
wrote:
>
> Use tcg_constant_{i32,i64} as appropriate throughout.
>
> Signed-off-by: Richard Henderson
> ---
> target/arm/translate-vfp.c | 76 --
> 1 file changed, 23 insertions(+), 53 deletions(-)
>
The next several commits copy some code from qemu.qmp to qemu.aqmp, then
delete qemu.qmp. In the interim, to prevent test failures, the duplicate
code detection needs to be silenced to prevent bisect problems with CI
testing.
Signed-off-by: John Snow
Reviewed-by: Vladimir Sementsov-Ogievskiy
Note that this advance *should* be done by the translator, as
that's the pc value that's supposed to be generated by hardware.
However, that's a much larger change across sysemu as well.
In the meantime, produce the correct PC for any signals raised
by the trap instruction. Note the special case
Use the simpler signal interface, which forces us to supply
the missing PC value to si_addr.
Signed-off-by: Richard Henderson
---
linux-user/nios2/cpu_loop.c | 6 +-
1 file changed, 1 insertion(+), 5 deletions(-)
diff --git a/linux-user/nios2/cpu_loop.c b/linux-user/nios2/cpu_loop.c
index
Honor QEMU_ESIGRETURN and QEMU_ERESTARTSYS.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
linux-user/nios2/cpu_loop.c | 8
1 file changed, 8 insertions(+)
diff --git a/linux-user/nios2/cpu_loop.c b/linux-user/nios2/cpu_loop.c
index 63afba5862..2963fc62b4 100644
---
Syscall 0 is __NR_io_setup for this target; there is nothing
to work around.
Reviewed-by: Peter Maydell
Fixes: a0a839b65b6 ("nios2: Add usermode binaries emulation")
Signed-off-by: Richard Henderson
---
linux-user/nios2/cpu_loop.c | 4
1 file changed, 4 deletions(-)
diff --git
Use FIELD_EX32 and FIELD_DP32 instead of manual manipulation
of the fields.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/nios2/cpu.h | 8
target/nios2/helper.c| 4 ++--
target/nios2/mmu.c | 17 +
target/nios2/translate.c | 2
Decode 'break 1' during translation, rather than doing
it again during exception processing.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/nios2/cpu.h | 1 +
target/nios2/helper.c| 14 ++
target/nios2/translate.c | 17 -
3 files
This function is unused. The real computation of this value
is located in nios2_cpu_exec_interrupt.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/nios2/cpu.h | 5 -
1 file changed, 5 deletions(-)
diff --git a/target/nios2/cpu.h b/target/nios2/cpu.h
index
We want to move data from the heap into Nios2MachineState,
which is not possible with DEFINE_MACHINE.
Reviewed-by: Mark Cave-Ayland
Signed-off-by: Richard Henderson
---
hw/nios2/10m50_devboard.c | 24 ++--
1 file changed, 22 insertions(+), 2 deletions(-)
diff --git
Constrain all references to cpu_R[] to load_gpr and dest_gpr.
This will be required for supporting shadow register sets.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/nios2/translate.c | 144 +--
1 file changed, 49 insertions(+), 95
Replace current uses of tcg_const_tl, and remove the frees.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/nios2/translate.c | 30 ++
1 file changed, 6 insertions(+), 24 deletions(-)
diff --git a/target/nios2/translate.c
Implement these out of line, so that tcg global temps
(aka the architectural registers) are synced back to
tcg storage as required. This makes sure that we get
the proper results when status.PRS == status.CRS.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/nios2/cpu.h
When mapped POSIX ACL is used, we are ignoring errors when trying
to remove a POSIX ACL xattr that does not exist. On Linux hosts we
would get ENODATA in such cases, on macOS hosts however we get
ENOATTR instead.
As we can be sure that ENOATTR is defined as being identical on Linux
hosts (at
Linux recently added a new io_uring(7) optimization API that QEMU
doesn't take advantage of yet. The liburing library that QEMU uses
has added a corresponding new API calling io_uring_register_ring_fd().
When this API is called after creating the ring, the io_uring_submit()
library function passes
From: Peter Xu
This boolean flag shows whether the current page during migration is triggered
by postcopy or not. Then in ram_save_host_page() and deeper stack we'll be
able to have a reference on the priority of this page.
Reviewed-by: Dr. David Alan Gilbert
Signed-off-by: Peter Xu
On Thu, 21 Apr 2022 17:07:43 +0200
Christian Schoenebeck wrote:
> mknod() on macOS does not support creating sockets, so divert to
> call sequence socket(), bind() and chmod() respectively if S_IFSOCK
> was passed with mode argument.
>
> Link:
From: Daniel P. Berrangé
The migration TLS code has a check mandating that a hostname be
available when starting a TLS session. This is expected when using
x509 credentials, but is bogus for PSK and anonymous credentials
as neither involve hostname validation.
The TLS crdentials object gained
From: Daniel P. Berrangé
The combination of the start and finish hooks allow the FD passing
code to use the precopy helper
Signed-off-by: Daniel P. Berrangé
Message-Id: <20220310171821.3724080-11-berra...@redhat.com>
Reviewed-by: Peter Xu
Signed-off-by: Dr. David Alan Gilbert
---
From: Peter Xu
The hostname is cached N times, N equals to the multifd channels.
Drop that cache because after previous patch we've got s->hostname
being alive for the whole lifecycle of migration procedure.
Cc: Juan Quintela
Cc: Daniel P. Berrange
Signed-off-by: Peter Xu
Message-Id:
From: Peter Xu
We used to use postcopy_try_recover() to replace migration_incoming_setup() to
setup incoming channels. That's fine for the old world, but in the new world
there can be more than one channels that need setup. Better move the channel
setup out of it so that postcopy_try_recover()
On 4/21/22 06:49, marcandre.lur...@redhat.com wrote:
From: Marc-André Lureau
The following changes since commit 9c125d17e9402c232c46610802e5931b3639d77b:
Merge tag 'pull-tcg-20220420' of https://gitlab.com/rth7680/qemu into
staging (2022-04-20 16:43:11 -0700)
are available in the Git
The following changes since commit 401d46789410e88e9e90d76a11f46e8e9f358d55:
Merge tag 'pull-target-arm-20220421' of
https://git.linaro.org/people/pmaydell/qemu-arm into staging (2022-04-21
08:04:43 -0700)
are available in the Git repository at:
https://gitlab.com/rth7680/qemu.git tags
* Jonah Palmer (jonah.pal...@oracle.com) wrote:
> This patch drops the name parameter for the virtio_init function.
>
> The pair between the numeric device ID and the string device ID
> (name) of a virtio device already exists, but not in a way that
> lets us map between them.
>
> This patch
From: Peter Xu
The hostname is cached N times, N equals to the multifd channels.
Drop that cache because after previous patch we've got s->hostname
being alive for the whole lifecycle of migration procedure.
Cc: Juan Quintela
Cc: Daniel P. Berrange
Signed-off-by: Peter Xu
Message-Id:
From: Daniel P. Berrangé
There are alot of different scenarios to test with migration due to the
wide number of parameters and capabilities available. To enable sharing
of the basic precopy test scenario, we need to be able to set arbitrary
parameters and capabilities before the migration is
On Sun, 17 Apr 2022 at 18:59, Richard Henderson
wrote:
>
> Use tcg_constant_{i32,i64,ptr} as appropriate throughout, which
> means we get to remove lots of tcg_temp_free_*. Drop variables
> in many cases, passing the constant directly to another function.
>
> Signed-off-by: Richard Henderson
>
From: Daniel P. Berrangé
The QMP commands have a trailing newline, but the response does not.
This makes the qtest logs hard to follow as the next QMP command
appears in the same line as the previous QMP response.
Reviewed-by: Thomas Huth
Reviewed-by: Peter Xu
Reviewed-by: Juan Quintela
* Dr. David Alan Gilbert (git) (dgilb...@redhat.com) wrote:
> From: "Dr. David Alan Gilbert"
>
> The following changes since commit 401d46789410e88e9e90d76a11f46e8e9f358d55:
>
> Merge tag 'pull-target-arm-20220421' of
> https://git.linaro.org/people/pmaydell/qemu-
For this commit, we only need to remove accommodations for the
synchronous QMP library.
Signed-off-by: John Snow
Reviewed-by: Vladimir Sementsov-Ogievskiy
Reviewed-by: Beraldo Leal
Acked-by: Hanna Reitz
Message-id: 20220321203315.909411-3-js...@redhat.com
Signed-off-by: John Snow
---
iotests is already using async QMP, but to finalize the switchover we
only need to update any remaining import paths to rely solely on the new
library instead.
Signed-off-by: John Snow
Reviewed-by: Vladimir Sementsov-Ogievskiy
Reviewed-by: Beraldo Leal
Acked-by: Hanna Reitz
Message-id:
With the old library gone, there's nothing duplicated in the tree, so
the warning suppression can be removed.
Signed-off-by: John Snow
Reviewed-by: Vladimir Sementsov-Ogievskiy
Reviewed-by: Beraldo Leal
Message-id: 20220330172812.3427355-7-js...@redhat.com
Signed-off-by: John Snow
---
I am the sole author of all of the async QMP code (python/qemu/aqmp)
with the following exceptions:
python/qemu/aqmp/qmp_shell.py and python/qemu/aqmp/legacy.py were
written by Luiz Capitulino (et al) and are already licensed separately
as GPLv2 (only).
aqmp_tui.py was written by Niteesh Babu G
Copy the docstrings out of qemu.qmp, adjusting them as necessary to
more accurately reflect the current state of this class.
(Licensing: This is copying and modifying GPLv2-only licensed docstrings
into a GPLv2-only file.)
Signed-off-by: John Snow
Reviewed-by: Vladimir Sementsov-Ogievskiy
Now that threads and signals have been fixed, re-enable tests.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
tests/tcg/nios2/Makefile.target | 11 ---
1 file changed, 11 deletions(-)
delete mode 100644 tests/tcg/nios2/Makefile.target
diff --git
These symbols become available to the debugger.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/nios2/cpu.h | 72 ++
1 file changed, 35 insertions(+), 37 deletions(-)
diff --git a/target/nios2/cpu.h b/target/nios2/cpu.h
index
Whether the cpu is in user-mode or not is something that we
know at translation-time. We do not need to generate code
after having raised an exception.
Suggested-by: Peter Maydell
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/nios2/translate.c | 20
Drop the kernel-specific "pr2" code structure and use
the qemu-specific error return value.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
linux-user/nios2/signal.c | 12
1 file changed, 4 insertions(+), 8 deletions(-)
diff --git a/linux-user/nios2/signal.c
We had failed to copy BSTATUS back to STATUS, and diagnose
supervisor-only. The spec is light on the specifics of the
implementation of bret, but it is an easy assumption that
the restore into STATUS should work the same as eret.
Therefore, reuse the existing helper_eret.
Reviewed-by: Peter
Unaligned traps are optional, but required with an mmu.
Turn them on always, because the fallback behaviour undefined.
Enable alignment checks in the config file.
Unwind the guest pc properly from do_unaligned_access.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
From: Amir Gonnen
Implement nios2 Vectored Interrupt Controller (VIC).
VIC is connected to EIC. It needs to update rha, ril, rrs and rnmi
fields on Nios2CPU before raising an IRQ.
For that purpose, VIC has a "cpu" property which should refer to the
nios2 cpu and set by the board that connects
The register is entirely read-only for software, and we do not
implement ECC, so we need not deposit the cause into an existing
value; just create a new value from scratch.
Furthermore, exception.CAUSE is not written for break exceptions.
Reviewed-by: Peter Maydell
Signed-off-by: Richard
Indirect branches, plus eret and bret optionally raise
an exception when branching to a misaligned address.
The exception is required when an mmu is enabled, but
enable it always because the fallback behaviour is not
documented (though presumably it discards low bits).
For the purposes of the
Depending on the reason for ending the TB, we can chain
to the next TB because the PC is constant.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/nios2/translate.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/target/nios2/translate.c
Copy tb->flags into ctx->tb_flags; we'll want to modify
this value throughout the tb in future.
Signed-off-by: Richard Henderson
Reviewed-by: Yoshinori Sato
Message-Id: <20220417165130.695085-2-richard.hender...@linaro.org>
---
target/rx/translate.c | 4 +++-
1 file changed, 3 insertions(+), 1
From: Peter Xu
This variable, along with its helpers, is used to detect whether multiple
channel will be supported for migration. In follow up patches, there'll be
other capability that requires multi-channels. Hence move it outside multifd
specific code and make it public. Meanwhile rename
On 4/16/22 23:02, Tomoaki Kawada wrote:
`cpu_pc` at this point does not necessary point to the current
instruction (i.e., the wait instruction being translated), so it's
incorrect to calculate the new value of `cpu_pc` based on this. It must
be updated with `ctx->base.pc_next`, which contains
From: Daniel P. Berrangé
There's no compelling reason why the MigrateStart struct needs to be
heap allocated. Using stack allocation and static initializers is
simpler.
Signed-off-by: Daniel P. Berrangé
Message-Id: <20220310171821.3724080-8-berra...@redhat.com>
Reviewed-by: Peter Xu
From: Peter Xu
This boolean flag shows whether the current page during migration is triggered
by postcopy or not. Then in ram_save_host_page() and deeper stack we'll be
able to have a reference on the priority of this page.
Reviewed-by: Dr. David Alan Gilbert
Signed-off-by: Peter Xu
On Sun, 17 Apr 2022 at 19:02, Richard Henderson
wrote:
>
> The length of the previous insn may be computed from
> the difference of start and end addresses.
> Use tcg_constant_i32 while we're at it.
>
> Signed-off-by: Richard Henderson
> ---
> target/arm/translate.c | 12
> 1 file
New in v7 is changing exceptions to advance the pc before raising
the exception, to match the hardware. This caused a number of
conflicts with my outstanding linux-user patches, so I've merged
the two patch sets.
Supercedes: <20220317050538.924111-1-richard.hender...@linaro.org>
("target/nios2:
Remove the QEMU_PYTHON_LEGACY_QMP environment variable, making the
switch from sync qmp to async qmp permanent. Update exceptions and
import paths as necessary.
Signed-off-by: John Snow
Reviewed-by: Vladimir Sementsov-Ogievskiy
Reviewed-by: Beraldo Leal
Acked-by: Hanna Reitz
Message-id:
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