Am 18.03.2014 22:30, schrieb Richard Henderson:
> TCG now requires unspecified behavior rather than a potential crash,
> bring the C shift within the letter of the law.
I know that C does not define the result of some shift / rotate
operations, but I don't understand the sentence above. Why does T
I am doing a task in which I have to enter some data which is in a
directory in qcow/qcow2 file. The thing I want to ask is that how can I do
this if I have boot looder or guest system in a directory rather than in
iso file. I try to make a qcow image and mount it on my file system.
Process for mo
This is just an example of how to use qapi event API, and it
bypassed the event throttle queue. A complete convert should
be first define all events in qapi-schema.json, use qapi
event types in monitor functions, then change caller one
by one.
Signed-off-by: Wenchao Xia
---
monitor.c|
These cases will verify whether the expected qdict is built.
Signed-off-by: Wenchao Xia
---
tests/Makefile | 14 ++-
tests/qapi-schema/qapi-schema-test.json | 12 ++
tests/qapi-schema/qapi-schema-test.out | 10 +-
tests/test-qmp-event.c | 258 +++
qapi-event.py will parse the schema and generate qapi-event.c, then
the API in qapi-event.c can be used to handle event in qemu code.
All API have prefix "qapi_event".
The script mainly include two parts: generate API for each event
define, generate an enum type for all defined events.
Since in s
This file hold some functions that do not need to be generated.
Signed-off-by: Wenchao Xia
---
include/qapi/qmp-event.h | 25
qapi/Makefile.objs |1 +
qapi/qmp-event.c | 71 ++
3 files changed, 97 insertions(+), 0
Since gettimeofday() is used in this header file as a macro define,
include the function's define header file, to avoid compile warning
when other file include os-posix.h.
Signed-off-by: Wenchao Xia
Reviewed-by: Eric Blake
---
include/sysemu/os-posix.h |2 ++
1 files changed, 2 insertions(+
This series add support for tag/keyword 'event' in qapi-schema.
A new file was created to store some helper functions in patch 2, patch 4 is
the test case, patch 5 is a convert example.
The implemention is done by generate API and a batch of parameters for each
event define, it doesn't generate a
This bug is still present in QEMU 1.7.0 (as per Debian's qemu-system-x86
1.7.0+dfsg-3 package).
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https://bugs.launchpad.net/bugs/1119686
Title:
Incorrect handling of icebp
Status in Q
This resets SPR values to defaults on CPU reset. This should help
with little-endian guests reboot issues.
Signed-off-by: Alexey Kardashevskiy
---
target-ppc/cpu.h| 1 +
target-ppc/translate_init.c | 12 +++-
2 files changed, 12 insertions(+), 1 deletion(-)
diff --git a/tar
On 03/18/2014 01:14 PM, Peter Crosthwaite wrote:
> On Tue, Mar 18, 2014 at 10:31 AM, Chen Gang wrote:
>> > Clean up useless 'break' statement after 'return' statement.
>> >
>> > Signed-off-by: Chen Gang
> Reviewed-by: Peter Crosthwaite
>
OK, thanks.
--
Chen Gang
Open, share, and attitude li
On Wed, Mar 05, 2014 at 06:59:29AM -0700, Eric Blake wrote:
> On 03/05/2014 01:32 AM, Bharata B Rao wrote:
> > PowerPC kernel expects the number of SMT threads in a core to be a power
> > of 2. Since QEMU doesn't enforce this, it leads to an early guest kernel
> > crash if invalid threads count is
On 03/18/2014 04:43 PM, Olivier DANET wrote:
>>> - x0 = x0 < 0 ? 0x8000 : 0x7fff;
>>> > > + } else if (x1 == -1 && x0 == 0x8000) {
>>> > > + x0 = 0x7fff;
>>> > > overflow = 1;
>> >
>> > Thanks for the patch! I think based upon Peter's recent series that the
>> > sign const
于 2014/3/7 2:49, Eric Blake 写道:
On 01/02/2014 04:10 PM, Wenchao Xia wrote:
qapi-event.py will parse the schema and generate qapi-event.c, then
the API in qapi-event.c can be used to handle event in qemu code.
All API have prefix "qapi_event", all types have prefix "QAPIEvent".
Examples can be fo
Signed-off-by: Prasad Joshi
---
hw/scsi/vmw_pvscsi.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/hw/scsi/vmw_pvscsi.c b/hw/scsi/vmw_pvscsi.c
index 7d344b9..e35bff7 100644
--- a/hw/scsi/vmw_pvscsi.c
+++ b/hw/scsi/vmw_pvscsi.c
@@ -479,12 +479,13 @@ static void
pvscsi_comm
Dave Airlie writes:
> So I'm looking at how best to do virtio gpu device error reporting,
> and how to deal with illegal stuff,
>
> I've two levels of errors I want to support,
>
> a) unrecoverable or bad guest kernel programming errors,
The QEMU standard approach is to exit at this point. No, r
The function smbios_set_defaults() uses a repeating code pattern
for each field. This patch replaces that pattern with a macro.
Signed-off-by: Gabriel Somlo
---
hw/i386/smbios.c | 17 -
1 file changed, 8 insertions(+), 9 deletions(-)
diff --git a/hw/i386/smbios.c b/hw/i386/smbio
Build smbios type 3 (system enclosure) table, and make it available
to the bios via fw_cfg. For initial compatibility with SeaBIOS, use
"Bochs" as the default manufacturer string, and leave version unset.
Signed-off-by: Gabriel Somlo
---
hw/i386/smbios.c | 67
Replace existing smbios_check_collision() functionality with
a pair of bitmaps: have_binfile_bitmap and have_fields_bitmap.
Bits corresponding to each smbios type are set by smbios_entry_add(),
which also uses the bitmaps to ensure that binary blobs and field
values are never accepted for the same
> - Message d'origine -
> De : Mark Cave-Ayland
> Envoyés : 18.03.14 01:20
> À : Olivier Danet
> Objet : Re: [Qemu-devel] [PATCH] sparc32 : Signed integer division overflow
>
> On 12/03/14 21:26, Olivier Danet wrote:
>
> Hi Olivier,
>
> > Here is a patch for handling this corner case o
Build full tables for types 0 (bios information) and 1 (system
information). Type 0 is optional, and a table will only be built
if requested via the command line; the default is to leave type 0
tables up to the bios itself.
Signed-off-by: Gabriel Somlo
---
hw/i386/smbios.c | 63 +
These two patches implement the last four A64 Neon instructions:
SQNEG, SQABS, USQADD, SUQADD
meaning that we have complete coverage of the userspace instruction
set, with the exception of the optional crypto and CRC instructions.
As with the previous set, these are safe changes so I'm planning
Subsequent patches will utilize this function to set defaults for
more smbios types than just type 1, so the function name should
reflect this.
Signed-off-by: Gabriel Somlo
---
hw/i386/pc_piix.c| 12 ++--
hw/i386/pc_q35.c | 8
hw/i386/smbios.c | 4 ++--
Build full smbios type 32 (system boot info) and 127 (end-of-table)
tables, and make them available via fw_cfg.
Signed-off-by: Gabriel Somlo
---
hw/i386/smbios.c | 19 +++
1 file changed, 19 insertions(+)
diff --git a/hw/i386/smbios.c b/hw/i386/smbios.c
index 6510ff3..b1f1d46 10
Build full smbios type 4 (processor information) tables, and make
them available to the bios via fw_cfg. For initial compatibility
with SeaBIOS, use "Bochs" as the default manufacturer string, and
leave version unset.
Signed-off-by: Gabriel Somlo
---
hw/i386/pc.c | 3 ++
hw/i386/smb
From: Alex Bennée
Add the saturating accumulate operations USQADD and SUQADD
to the A64 instruction set. This completes coverage of A64 Neon.
These operations (which are unsigned + signed -> signed and
signed + unsigned -> unsigned) don't exist in the A32/T32
instruction set, so require a complet
Here's version 4 of moving smbios table construction into QEMU.
New in this version:
- 9/12 builds all memory tables (16, 17, 19, 20) and IMHO has much
cleaner and easier to understand code, as well as extensive comments
re. how tables fit together, and how they're generated.
- a
- Replace some arbitrarily hardcoded fields with proper
"n/a" or "unknown" values;
- Use QEMU-supplied default manufacturer and version strings;
- Count CPUs starting with 0 instead of 1, to maintain uniformity
with other multiple-instance items.
Signed-off-by: Gabriel Somlo
---
hw
This patch removes smbios_add_field() and the old code to insert
individual fields for types 0 and 1 into fw_cfg.
Signed-off-by: Gabriel Somlo
---
hw/i386/smbios.c | 80
1 file changed, 80 deletions(-)
diff --git a/hw/i386/smbios.c b/hw/i
This patch adds a set of macros which build full smbios tables
of a given type, including the logic to decide whether a given
table type should be built or not.
To illustrate this new functionality, we introduce and optionally
build a table of type 2 (base board), which is required by some
version
Build full smbios tables representing the system RAM:
- type 16 (physical memory array): represents the entire system RAM;
- type 17 (memory device) tables: one per virtual DIMM;
- type 19 (memory array mapped address): represent major RAM areas
(currently one for below-4G memory, and, if
Table definitions for types 4 and 17 are only up to v2.0,
so add fields specified in smbios v2.3, as expected (and
advertised) by the SeaBIOS smbios entry point structure.
In particular, OS X guests insist on type 17 being v2.3
compliant, to avoid GUI crashes when "about this mac" is
chosen in the
From: Alex Bennée
This mostly re-uses the existing NEON helpers with an additional two for
the 64 bit case. I also took the opportunity to add TCG_CALL_NO_RWG
options to the helpers as they don't modify globals (saturation flags
are in the CPU Environment).
Signed-off-by: Alex Bennée
Signed-off
Hi James,
just a quick check - do you get this with the qemu package in ppa
:ubuntu-virt/candidate?
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https://bugs.launchpad.net/bugs/1257352
Title:
kvm hangs occasionally when switchi
On 18 March 2014 20:42, wrote:
> Hi,
> I was sending this to the Qemu-discuss list, but this one seems to be a
> better choice.
> I am trying to build u-boot for pxa261 processor. I`m trying to run it on qemu
> (1.7.0), but it is not working. When the execution gets to assembler code
> mcr p15,
This fix is upstream, so it will be pulled in when we switch to qemu 2.0
in 14.04.
** Changed in: qemu (Ubuntu)
Status: Triaged => Fix Committed
** Changed in: qemu
Status: Confirmed => Fix Released
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Hi
I would like to propose a new idea for GSOC 2014 that I want to implement
for QEMU. Since QEMU are widely used for binary analysis, dynamic binary
code instrumentation and so on.
Can we provide the framework like Pin (A Dynamic Binary Instrumentation
Tool) for those areas in QEMU? Different fro
On 18 March 2014 21:10, Richard Henderson wrote:
> On 03/18/2014 12:23 PM, Peter Maydell wrote:
>> +#define USATACC(bits, shift) \
>> +do { \
>> +va = (int##bits##_t)((a >> shift) & ((1 << bits) - 1)); \
>> +vb = (uint##bits##_t)((b >> shift) & ((1 << bits) - 1));
On Tue, 18 Mar 2014 09:34:56 +0530
Kashyap Chamarthy wrote:
> On Tue, Mar 18, 2014 at 07:56:16AM +0800, Le Tan wrote:
> > Hi, I am diving into the source code of qemu. I see the word
> > "coroutine" appears in so many places. I can't figure out what it
> > means. So, please, can anyone help me, t
Gah. Description should have been "tci" and cc'd the maintainer.
r~
On 03/18/2014 02:30 PM, Richard Henderson wrote:
> TCG now requires unspecified behavior rather than a potential crash,
> bring the C shift within the letter of the law.
>
> Signed-off-by: Richard Henderson
> ---
> tci.c | 2
On 18 March 2014 21:30, Richard Henderson wrote:
> The TCG result would be undefined, but we can at least produce one
> plausible result and avoid triggering the wrath of analysis tools.
>
> Reported-by: Peter Maydell
> Signed-off-by: Richard Henderson
Reviewed-by: Peter Maydell
-- PMM
Changes v1-v2:
* Consistently use American spelling of behaviour
* Fix shifts use in the masking section of the optimizer as well
* New patch that fixes optimization of deposit.
Richard Henderson (4):
tcg: Use "unspecified behavior" for shifts
tcg: Mask shift quantities while folding
t
TCG now requires unspecified behavior rather than a potential crash,
bring the C shift within the letter of the law.
Signed-off-by: Richard Henderson
---
tci.c | 20 ++--
1 file changed, 10 insertions(+), 10 deletions(-)
diff --git a/tci.c b/tci.c
index 0202ed9..6523ab8 100644
-
Change the definition such that shifts are not allowed to crash
for any input.
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
tcg/README | 18 +-
1 file changed, 13 insertions(+), 5 deletions(-)
diff --git a/tcg/README b/tcg/README
index f178212..776e925 100644
By inspection, for a deposit(x, y, 0, 64), we'd have a shift of (1<<64)
and everything else falls apart. But we can reuse the existing deposit
logic to get this right.
Signed-off-by: Richard Henderson
---
tcg/optimize.c | 10 --
1 file changed, 4 insertions(+), 6 deletions(-)
diff --gi
The TCG result would be undefined, but we can at least produce one
plausible result and avoid triggering the wrath of analysis tools.
Reported-by: Peter Maydell
Signed-off-by: Richard Henderson
---
tcg/optimize.c | 35 ---
1 file changed, 20 insertions(+), 15 del
On Sat, Mar 15, 2014 at 01:40:26PM -0700, Richard Henderson wrote:
> On 03/15/2014 11:33 AM, Paolo Bonzini wrote:
> > Two missing braces, one close and one open, fabulously let the code
> > compile.
> >
> > Signed-off-by: Paolo Bonzini
>
> Wow. That's ... amazing.
>
> Reviewed-by: Richard Hend
On 03/18/2014 04:14 AM, Paolo Bonzini wrote:
> Il 17/03/2014 19:07, Richard Henderson ha scritto:
>> On 03/17/2014 04:28 AM, Paolo Bonzini wrote:
>>> Conform to coding style, and avoid further occurrences of bugs due to
>>> misplaced braces.
>>>
>>> Signed-off-by: Paolo Bonzini
>>> ---
>>> target
On 03/18/2014 12:23 PM, Peter Maydell wrote:
> +#define USATACC(bits, shift) \
> +do { \
> +va = (int##bits##_t)((a >> shift) & ((1 << bits) - 1)); \
> +vb = (uint##bits##_t)((b >> shift) & ((1 << bits) - 1));\
The masking seems redundant with the cast.
Perhaps
On 03/18/2014 12:23 PM, Peter Maydell wrote:
> From: Alex Bennée
>
> This mostly re-uses the existing NEON helpers with an additional two for
> the 64 bit case. I also took the opportunity to add TCG_CALL_NO_RWG
> options to the helpers as they don't modify globals (saturation flags
> are in the
* Markus Armbruster (arm...@redhat.com) wrote:
> "Dr. David Alan Gilbert (git)" writes:
> > diff --git a/arch_init.c b/arch_init.c
> > index 60c975d..16474b5 100644
> > --- a/arch_init.c
> > +++ b/arch_init.c
> > @@ -167,10 +167,13 @@ static struct {
> > /* Cache for XBZRLE, Protected by l
Hi,
I was sending this to the Qemu-discuss list, but this one seems to be a better
choice.
I am trying to build u-boot for pxa261 processor. I`m trying to run it on qemu
(1.7.0), but it is not working. When the execution gets to assembler code
mcr p15, 0, r0, c9, c1, 1, qemu freezes. I tried to
* (chenliang0...@icloud.com) wrote:
> nice catch
>
> > From: "Dr. David Alan Gilbert"
> >
> > Markus Armbruster spotted that the XBZRLE.lock might get initalised
> > multiple times in the case of a second attempted migration, and
> > that's undefined behaviour for pthread_mutex_init.
> >
>
The Tuesday 18 Mar 2014 à 15:36:42 (+0100), Kevin Wolf wrote :
> If it returns an error, the migrated VM will not be started, but qemu
> exits with an error message.
>
> Signed-off-by: Kevin Wolf
> Reviewed-by: Juan Quintela
> Reviewed-by: Eric Blake
> ---
>
> v2:
> - Update quorum as well (no
On Tue, Mar 18, 2014 at 01:49:38PM +0100, Stefan Hajnoczi wrote:
This patch submission is broken. I'll resend.
Stefan
On 03/18/14 20:29, Eduardo Habkost wrote:
> Small rework of patches 6/7 and 7/7 from the previous APIC-ID-limit series I
> sent (which broke the build and where reverted).
>
> Instead of renaming MAX_CPUMASK_BITS like I did previously, just document it
> and use it on the (max_cpus > 255) check on
Signed-off-by: Eduardo Habkost
---
include/sysemu/sysemu.h | 7 +++
1 file changed, 7 insertions(+)
diff --git a/include/sysemu/sysemu.h b/include/sysemu/sysemu.h
index c01304d..865e5f0 100644
--- a/include/sysemu/sysemu.h
+++ b/include/sysemu/sysemu.h
@@ -133,7 +133,14 @@ extern uint8_t qem
Signed-off-by: Eduardo Habkost
---
vl.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/vl.c b/vl.c
index f0fe48b..337f340 100644
--- a/vl.c
+++ b/vl.c
@@ -1418,7 +1418,7 @@ static void smp_parse(QemuOpts *opts)
max_cpus = smp_cpus;
}
-if (max_cpus > 255) {
Small rework of patches 6/7 and 7/7 from the previous APIC-ID-limit series I
sent (which broke the build and where reverted).
Instead of renaming MAX_CPUMASK_BITS like I did previously, just document it
and use it on the (max_cpus > 255) check on vl.c.
Eduardo Habkost (2):
sysemu.h: Document wh
From: Alex Bennée
This mostly re-uses the existing NEON helpers with an additional two for
the 64 bit case. I also took the opportunity to add TCG_CALL_NO_RWG
options to the helpers as they don't modify globals (saturation flags
are in the CPU Environment).
Signed-off-by: Alex Bennée
Signed-off
These two patches implement the last four A64 Neon instructions:
SQNEG, SQABS, USQADD, SUQADD
meaning that we have complete coverage of the userspace instruction
set, with the exception of the optional crypto and CRC instructions.
As with the previous set, these are safe changes so I'd like to
g
From: Alex Bennée
Add the saturating accumulate operations USQADD and SUQADD
to the A64 instruction set. This completes coverage of A64 Neon.
These operations (which are unsigned + signed -> signed and
signed + unsigned -> unsigned) don't exist in the A32/T32
instruction set, so require a complet
On 18 March 2014 18:18, Rob Herring wrote:
> From: Rob Herring
>
> Intermittent issues have been seen where no serial input occurs. It
> appears the pl011 gets in a state where the rx interrupt never fires
> because the rx interrupt only asserts when crossing the fifo trigger
> level. The fifo st
Paolo Bonzini writes:
> This is the model file that is being used for the QEMU project's scans
> on scan.coverity.com. It fixed about 30 false positives (10% of the
> total) and exposed about 60 new memory leaks.
>
> The file is not automatically used; changes to it must be propagated
> to the w
From: Rob Herring
The receive fifo full bit should be set when 1 character is received and
the fifo is disabled or when 16 characters are in the fifo.
Signed-off-by: Rob Herring
Reviewed-by: Peter Maydell
---
hw/char/pl011.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/
From: Rob Herring
Intermittent issues have been seen where no serial input occurs. It
appears the pl011 gets in a state where the rx interrupt never fires
because the rx interrupt only asserts when crossing the fifo trigger
level. The fifo state appears to get out of sync when the pl011 is
re-con
From: Rob Herring
Offset 4 is UARTRSR/UARTECR, not the UARTCR. The UARTCR would be
corrupted if the UARTRSR is ever written. Fix by implementing a correct
model of the UARTRSR/UARTECR register. Reads of this register simply
reflect the error bits in data register. Only breaks can be triggered in
From: Rob Herring
Intermittent issues have been seen where no serial input occurs. It
appears the pl011 gets in a state where the rx interrupt never fires
because the rx interrupt only asserts when crossing the fifo trigger
level. The fifo state appears to get out of sync when the pl011 is
re-con
On 03/18/14 15:48, Michael S. Tsirkin wrote:
> when using signature for table ID, we forgot to byte-swap it.
> signatures are really ASCII strings, let's treat them as such.
> While at it, get rid of most of _SIGNATURE macros.
>
> Signed-off-by: Michael S. Tsirkin
> ---
> hw/i386/acpi-defs.h |
On 03/18/14 15:48, Michael S. Tsirkin wrote:
> acpi table signature is really an ASCII string.
> Treat it as such in tests.
>
> Signed-off-by: Michael S. Tsirkin
> ---
> tests/acpi-test.c | 48 +---
> 1 file changed, 33 insertions(+), 15 deletions(-)
>
On Fri, Mar 14, 2014 at 04:33:55PM -0300, Eduardo Habkost wrote:
> Also, document what the macro is really useful for.
>
> Signed-off-by: Eduardo Habkost
> Reviewed-by: Laszlo Ersek
This breaks full build:
CChw/ide/macio.o
In file included from hw/ide/macio.c:26:0:
./hw/ppc/mac.h:34:0: er
On 03/18/14 15:54, Eduardo Habkost wrote:
> On Tue, Mar 18, 2014 at 04:03:25PM +0200, Michael S. Tsirkin wrote:
>> On Mon, Mar 17, 2014 at 05:05:17PM +0100, Laszlo Ersek wrote:
>>> Building on the previous patch, raise the maximal count of processor
>>> objects / NTFY branches / CPON elements from
On 18 March 2014 07:25, Gerd Hoffmann wrote:
> Hi,
>
> Most recent vnc update had a regression with vmware vga.
> Here is the fix for it.
>
> please pull,
> Gerd
>
> The following changes since commit 315b59344126beab85a62b53582794b14436a5a4:
>
> Merge remote-tracking branch 'remotes/borntra
Public bug reported:
In the code below kvm_vm_ioctl(...) can return --errno != -1 from ioctl call,
but return only checks for -1.
Found during KVM-ARM migration which apperead to go through but was actually
failing getting
memslot dirty bitmap.
static int kvm_physical_sync_dirty_bitmap()
"Dr. David Alan Gilbert (git)" writes:
> From: "Dr. David Alan Gilbert"
>
> Markus Armbruster spotted that the XBZRLE.lock might get initalised
> multiple times in the case of a second attempted migration, and
> that's undefined behaviour for pthread_mutex_init.
>
> This patch adds a flag to sto
On Tue, 18 Mar 2014 17:13:04 +0100
Paolo Bonzini wrote:
> Il 17/03/2014 19:12, Cornelia Huck ha scritto:
> > if (!qemu_opt_get_bool(qemu_get_machine_opts(), "kernel_irqchip",
> > true) ||
> > -!kvm_check_extension(s, KVM_CAP_IRQCHIP)) {
> > +(!kvm_check_extension(s, KVM_CAP_
On Tue, 18 Mar 2014 17:10:33 +0100
Paolo Bonzini wrote:
> Il 17/03/2014 19:11, Cornelia Huck ha scritto:
> > +static KVMS390FLICState *s390_get_flic(void)
> > +{
> > +ObjectProperty *op = object_property_find(qdev_get_machine(),
> > + "s390-flic",
This is the model file that is being used for the QEMU project's scans
on scan.coverity.com. It fixed about 30 false positives (10% of the
total) and exposed about 60 new memory leaks.
The file is not automatically used; changes to it must be propagated
to the website manually by an admin (right
When creating an IOThread implicitly (the user did not specify
x-iothread=) remember that iothread_find() does not return the
object with an incremented refcount.
Signed-off-by: Stefan Hajnoczi
---
hw/block/dataplane/virtio-blk.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
nice catch
> From: "Dr. David Alan Gilbert"
>
> Markus Armbruster spotted that the XBZRLE.lock might get initalised
> multiple times in the case of a second attempted migration, and
> that's undefined behaviour for pthread_mutex_init.
>
> This patch adds a flag to stop re-initialisation - findi
On 2014-03-18 17:37, Paolo Bonzini wrote:
> Il 18/03/2014 17:23, Luiz Capitulino ha scritto:
>> On Tue, 18 Mar 2014 15:36:45 +0100
>> Jan Kiszka wrote:
>>
> Right, this belongs in the "if (env->hflags & HF_LMA_MASK)" block.
>
> And the subject or description should mention that
> x
On 17 March 2014 22:11, Peter Maydell wrote:
> Hi; this is the target-arm queue for 2.0rc1. It looks
> pretty big but most of it is the last big dose of Neon
> A64 instructions which are pretty safe changes.
Applied, thanks.
-- PMM
Il 18/03/2014 17:23, Luiz Capitulino ha scritto:
On Tue, 18 Mar 2014 15:36:45 +0100
Jan Kiszka wrote:
Right, this belongs in the "if (env->hflags & HF_LMA_MASK)" block.
And the subject or description should mention that
x86_cpu_get_phys_page_debug was lacking support for 1G hugepages.
To be
Il 18/03/2014 16:01, Peter Maydell ha scritto:
By whether the backend or the frontend has trivial
access to the value to be able to avoid doing bad
things if it's out of range. If either do, they can
do a translate-time check to avoid issues. If neither
does then we need the host CPU architecture
The commit 88c1ee73d3231c74ff90bcfc084a7589670ec244
char/serial: Fix emptyness check
Still causes extra NULL byte(s) to be sent.
So if the fifo is empty, do not send an extra NULL byte.
Reviewed-by: Peter Crosthwaite
Signed-off-by: Don Slutz
---
Changes V2 to v3
Revert v2 changes
Fix codin
On 03/17/14 19:02, Peter Crosthwaite wrote:
On Thu, Feb 20, 2014 at 4:30 AM, Don Slutz wrote:
The commit 88c1ee73d3231c74ff90bcfc084a7589670ec244
char/serial: Fix emptyness check
Still causes extra NULL byte(s) to be sent.
So if the fifo is empty, do not send an extra NULL byte.
Signed-off-b
Il 17/03/2014 22:55, Christian Borntraeger ha scritto:
> Signed-off-by: Cornelia Huck
Do you still have the lockdep message somewhere?
Looking at the patch and the description this makes sense. Even without
irqfd for s390:
Reviewed-by: Christian Borntraeger
Paolo, maybe this patch can go in i
On Tue, 18 Mar 2014 15:36:45 +0100
Jan Kiszka wrote:
> >> Right, this belongs in the "if (env->hflags & HF_LMA_MASK)" block.
> >>
> >> And the subject or description should mention that
> >> x86_cpu_get_phys_page_debug was lacking support for 1G hugepages.
> >
> > To be honest, although the PS b
Il 17/03/2014 19:12, Cornelia Huck ha scritto:
if (!qemu_opt_get_bool(qemu_get_machine_opts(), "kernel_irqchip", true) ||
-!kvm_check_extension(s, KVM_CAP_IRQCHIP)) {
+(!kvm_check_extension(s, KVM_CAP_IRQCHIP) &&
+ kvm_enable_cap_vm(s, KVM_CAP_S390_IRQCHIP))) {
Plea
Il 17/03/2014 19:11, Cornelia Huck ha scritto:
+static KVMS390FLICState *s390_get_flic(void)
+{
+ObjectProperty *op = object_property_find(qdev_get_machine(),
+ "s390-flic", NULL);
+
+if (op) {
+return op->opaque;
+} else {
+
On Tue, 2014-03-18 at 13:57 +, Peter Maydell wrote:
> On 18 March 2014 13:39, Marcel Apfelbaum wrote:
> > Machine rewriting added MACHINE macro which is
> > already in use by other OpenBSD library.
> > Since qemu/sockets.h exposes the OpenBSD namespace,
> > the minimalistic approach is to add
Il 17/03/2014 19:11, Cornelia Huck ha scritto:
The maximum number for irq routes is currently 1024, which is a bit on
the small size for s390: We support up to 4 x 64k virtual devices with
up to 64 queues, and we need one route for each of the queues if we want
to operate it via irqfd.
Let's bum
On 03/18/2014 08:59 AM, Peter Maydell wrote:
> Don't you also need to do something similar for the
> "calculate known-zeroes bits" code on lines 807..833 ?
Yep.
r~
On 03/18/2014 09:02 AM, Peter Maydell wrote:
> On 18 March 2014 15:48, Richard Henderson wrote:
>> Change the definition such that shifts are not allowed to crash
>> for any input.
>>
>> Signed-off-by: Richard Henderson
>> ---
>> tcg/README | 18 +-
>> 1 file changed, 13 insertio
On 18 March 2014 15:48, Richard Henderson wrote:
> Change the definition such that shifts are not allowed to crash
> for any input.
>
> Signed-off-by: Richard Henderson
> ---
> tcg/README | 18 +-
> 1 file changed, 13 insertions(+), 5 deletions(-)
>
> diff --git a/tcg/README b/tc
On 18 March 2014 15:48, Richard Henderson wrote:
> The TCG result would be undefined, but we can at least produce one
> plausible result and avoid triggering the wrath of analysis tools.
>
> Reported-by: Peter Maydell
> Signed-off-by: Richard Henderson
Don't you also need to do something simila
From: "Dr. David Alan Gilbert"
Markus Armbruster spotted that the XBZRLE.lock might get initalised
multiple times in the case of a second attempted migration, and
that's undefined behaviour for pthread_mutex_init.
This patch adds a flag to stop re-initialisation - finding somewhere
to cleanly de
Markus Armbruster writes:
> Kevin Wolf writes:
[...]
>> What was the proper use case for error_is_set() again? Or can we get rid
>> of it? As long as it's there, you'll keep getting new offenders.
>
> I don't like it myself, and I think we can get rid of it.
At first glance, quite a few uses of
TCG now requires unspecified behaviour rather than a potential crash,
bring the C shift within the letter of the law.
Signed-off-by: Richard Henderson
---
tci.c | 20 ++--
1 file changed, 10 insertions(+), 10 deletions(-)
diff --git a/tci.c b/tci.c
index 0202ed9..6523ab8 100644
Change the definition such that shifts are not allowed to crash
for any input.
Signed-off-by: Richard Henderson
---
tcg/README | 18 +-
1 file changed, 13 insertions(+), 5 deletions(-)
diff --git a/tcg/README b/tcg/README
index f178212..431cee7 100644
--- a/tcg/README
+++ b/tcg/
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