On 05/28/2014 09:35 PM, Alexander Graf wrote:
On 28.05.14 03:18, Alexey Kardashevskiy wrote:
On 05/28/2014 10:41 AM, Alexander Graf wrote:
On 28.05.14 02:34, Alexey Kardashevskiy wrote:
On 05/28/2014 09:55 AM, Alexander Graf wrote:
...
How do I migrate GHashTable? If I am allowed to
Il 30/05/2014 00:33, BALATON Zoltan ha scritto:
The address is in the ram area but these functions still think they are
unassigned. Is this a bug? If it is how could it be fixed?
Can you get the output of info mtree at the point where the unassigned
access happens?
Paolo
Il 29/05/2014 22:38, Peter Maydell ha scritto:
+#ifdef TARGET_WORDS_BIGENDIAN
+cpsr |= CPSR_E;
This is wrong for BE32, where CPSR_E doesn't exist and both code
and data accesses are big-endian.
Is it okay for simplicity to treat CPSR.E = 1 as big-endian code,
little-endian data in
On 05/30/2014 12:32 AM, Eric Blake wrote:
On 05/29/2014 05:14 AM, Chrysostomos Nanakos wrote:
Hello team,
this is a patch implementing support for a new storage layer,
Archipelago [1][2].
We've been using Archipelago in our IaaS public cloud production
environment for over a year now, along
Il 29/05/2014 22:21, Peter Maydell ha scritto:
On 29 May 2014 20:46, Paolo Bonzini pbonz...@redhat.com wrote:
Now that CPSR.E is set correctly, prepare for when setend will be able
to change it; bswap data in and out of strex manually by comparing
bswap_code to CPSR.E (we do not have the luxury
Max Reitz mre...@redhat.com writes:
On 28.05.2014 16:25, Markus Armbruster wrote:
Chiefly so I don't have to do the error checking in quadruplicate in
the next commit. Moreover, replacing the frequently updated
bs_sectors by an array assigned just once makes the code easier to
understand.
Igor Mammedov imamm...@redhat.com writes:
On Thu, 29 May 2014 14:25:31 +0200
Andreas Färber afaer...@suse.de wrote:
Am 29.05.2014 14:21, schrieb Marcel Apfelbaum:
On Thu, 2014-05-29 at 12:47 +0200, Andreas Färber wrote:
Am 29.05.2014 11:47, schrieb Igor Mammedov:
... fixes freeing
From: Edgar E. Iglesias edgar.igles...@xilinx.com
Hi,
This is a second round of AArch64 EL2/3 patches working on the exception
model. Among other things adding HVC/SMC, interrupt routing to EL2/3 and
Virtual IRQs/FIQs. The VIRQ/VFIQ support only adds the external signal
delivery method.
Patch 3
From: Edgar E. Iglesias edgar.igles...@xilinx.com
Break out code to save/restore AArch64 SP into functions.
Signed-off-by: Edgar E. Iglesias edgar.igles...@xilinx.com
---
target-arm/internals.h | 29 -
target-arm/kvm64.c | 13 +++--
target-arm/op_helper.c
From: Edgar E. Iglesias edgar.igles...@xilinx.com
Signed-off-by: Edgar E. Iglesias edgar.igles...@xilinx.com
---
target-arm/op_helper.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target-arm/op_helper.c b/target-arm/op_helper.c
index 2e2429a..581dc09 100644
---
From: Edgar E. Iglesias edgar.igles...@gmail.com
Signed-off-by: Edgar E. Iglesias edgar.igles...@xilinx.com
---
target-arm/helper-a64.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/target-arm/helper-a64.c b/target-arm/helper-a64.c
index cccda74..bc153cb 100644
---
From: Edgar E. Iglesias edgar.igles...@xilinx.com
Signed-off-by: Edgar E. Iglesias edgar.igles...@xilinx.com
---
target-arm/cpu.h| 2 +-
target-arm/helper.c | 8
2 files changed, 9 insertions(+), 1 deletion(-)
diff --git a/target-arm/cpu.h b/target-arm/cpu.h
index 172a631..f8ca1da
From: Edgar E. Iglesias edgar.igles...@xilinx.com
No functional change.
Prepares for future additions of the EL2 and 3 versions of this reg.
Signed-off-by: Edgar E. Iglesias edgar.igles...@xilinx.com
---
target-arm/cpu.c| 2 +-
target-arm/cpu.h| 2 +-
target-arm/helper-a64.c |
From: Edgar E. Iglesias edgar.igles...@xilinx.com
Signed-off-by: Edgar E. Iglesias edgar.igles...@xilinx.com
---
target-arm/cpu.h| 35 +++
target-arm/helper.c | 27 +++
2 files changed, 62 insertions(+)
diff --git a/target-arm/cpu.h
From: Edgar E. Iglesias edgar.igles...@xilinx.com
Signed-off-by: Edgar E. Iglesias edgar.igles...@xilinx.com
---
target-arm/cpu.h| 2 +-
target-arm/helper.c | 6 ++
2 files changed, 7 insertions(+), 1 deletion(-)
diff --git a/target-arm/cpu.h b/target-arm/cpu.h
index f8ca1da..ef6a95d
From: Edgar E. Iglesias edgar.igles...@xilinx.com
Signed-off-by: Edgar E. Iglesias edgar.igles...@xilinx.com
---
target-arm/cpu.h| 15 +++
target-arm/helper.c | 20
2 files changed, 35 insertions(+)
diff --git a/target-arm/cpu.h b/target-arm/cpu.h
index
From: Edgar E. Iglesias edgar.igles...@xilinx.com
Introduce new_el and new_mode in preparation for future patches
that add support for taking exceptions to and from EL2 and 3.
No functional change.
Signed-off-by: Edgar E. Iglesias edgar.igles...@xilinx.com
---
target-arm/cpu.h| 11
From: Edgar E. Iglesias edgar.igles...@xilinx.com
Signed-off-by: Edgar E. Iglesias edgar.igles...@xilinx.com
---
cpu-exec.c | 5 ++---
target-arm/cpu.h | 16
2 files changed, 18 insertions(+), 3 deletions(-)
diff --git a/cpu-exec.c b/cpu-exec.c
index 38e5f02..a579ffc
From: Edgar E. Iglesias edgar.igles...@xilinx.com
Signed-off-by: Edgar E. Iglesias edgar.igles...@xilinx.com
---
target-arm/cpu.h | 7 +++
1 file changed, 7 insertions(+)
diff --git a/target-arm/cpu.h b/target-arm/cpu.h
index 9eddcc1..66c58bd 100644
--- a/target-arm/cpu.h
+++
From: Edgar E. Iglesias edgar.igles...@xilinx.com
Not all exception types update both FAR and ESR.
Signed-off-by: Edgar E. Iglesias edgar.igles...@xilinx.com
---
target-arm/helper-a64.c | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/target-arm/helper-a64.c
From: Edgar E. Iglesias edgar.igles...@xilinx.com
Signed-off-by: Edgar E. Iglesias edgar.igles...@xilinx.com
---
target-arm/cpu.h | 7 ++-
target-arm/helper-a64.c| 1 +
target-arm/helper.c| 39 +++
target-arm/helper.h| 1 +
From: Edgar E. Iglesias edgar.igles...@xilinx.com
Signed-off-by: Edgar E. Iglesias edgar.igles...@xilinx.com
---
target-arm/cpu.h | 1 +
target-arm/helper-a64.c| 1 +
target-arm/helper.c| 6 ++
target-arm/helper.h| 1 +
target-arm/internals.h | 6 ++
From: Edgar E. Iglesias edgar.igles...@xilinx.com
Signed-off-by: Edgar E. Iglesias edgar.igles...@xilinx.com
---
target-arm/cpu.h| 10 ++
target-arm/helper.c | 16
2 files changed, 26 insertions(+)
diff --git a/target-arm/cpu.h b/target-arm/cpu.h
index
From: Edgar E. Iglesias edgar.igles...@xilinx.com
Signed-off-by: Edgar E. Iglesias edgar.igles...@xilinx.com
---
cpu-exec.c | 12
target-arm/cpu.c| 20 ++--
target-arm/cpu.h| 24 ++--
target-arm/helper-a64.c | 2 ++
On Wed, 14 May 2014 16:18:42 -0300
Eduardo Habkost ehabk...@redhat.com wrote:
If a given machine have max_cpus set, not just smp_cpus needs to be
limited, but the total number of CPUs (considering CPU hotplug) for the
machine.
We also had yet another max_cpus limit check at smp_parse(),
On 30.05.14 07:58, Alexey Kardashevskiy wrote:
On 05/28/2014 09:35 PM, Alexander Graf wrote:
On 28.05.14 03:18, Alexey Kardashevskiy wrote:
On 05/28/2014 10:41 AM, Alexander Graf wrote:
On 28.05.14 02:34, Alexey Kardashevskiy wrote:
On 05/28/2014 09:55 AM, Alexander Graf wrote:
...
How
On Thu, May 29, 2014 at 07:36:53PM +0200, Petar Jovanovic wrote:
From: Petar Jovanovic petar.jovano...@imgtec.com
From MIPS documentation (Volume III):
UserLocal Register (CP0 Register 4, Select 2)
Compliance Level: Recommended.
The UserLocal register is a read-write register that is
On Thu, 29 May 2014 17:28:34 +0200
Paolo Bonzini pbonz...@redhat.com wrote:
Il 29/05/2014 16:22, Peter Crosthwaite ha scritto:
+bool memory_region_is_mapped(MemoryRegion *mr)
+{
Is it not enough to just return mr-parent? Memory mapping assertion
will happen if you try and map the
On Fri, 30 May 2014 00:05:51 +1000
Peter Crosthwaite peter.crosthwa...@xilinx.com wrote:
On Tue, May 27, 2014 at 11:01 PM, Igor Mammedov imamm...@redhat.com wrote:
Provides framework for splitting host RAM allocation/
policies into a separate backend that could be used
by devices.
On Thu, 29 May 2014 10:41:32 -0600
Eric Blake ebl...@redhat.com wrote:
On 05/27/2014 07:01 AM, Igor Mammedov wrote:
Provides framework for splitting host RAM allocation/
policies into a separate backend that could be used
by devices.
Initially only legacy RAM backend is provided,
On Fri, 30 May 2014 00:06:23 +1000
Peter Crosthwaite peter.crosthwa...@xilinx.com wrote:
On Tue, May 27, 2014 at 11:01 PM, Igor Mammedov imamm...@redhat.com wrote:
Add following parameters:
slots - total number of hotplug memory slots
maxmem - maximum possible memory
slots and
On 29.05.14 16:12, Tom Musta wrote:
This is a follow up to the patch series initiated by Doug Kwan
http://lists.nongnu.org/archive/html/qemu-devel/2014-05/msg01936.html
The resubmission of V4 cleans up some attribution issues (corrects Doug's
email address in the Signed-off-by and also cites
On 29.05.14 13:05, Peter Maydell wrote:
Fix a typo in the ppce500_pci vmstate definition which meant that
we were migrating the struct pci_inbound using the vmstate for
pci_outbound. Fortunately the two structures have exactly the same
format at the moment (four uint32_ts) so this was harmless,
Igor Mammedov imamm...@redhat.com writes:
On Thu, 29 May 2014 10:41:32 -0600
Eric Blake ebl...@redhat.com wrote:
On 05/27/2014 07:01 AM, Igor Mammedov wrote:
[...]
+goto out;
+}
+if (!value) {
+error_setg(local_err, Property '%s.%s' doesn't take value '%
+
On 12.05.14 14:15, Jens Freimann wrote:
From: David Hildenbrand d...@linux.vnet.ibm.com
When restoring the previously saved instruction in
kvm_arch_remove_sw_breakpoint(), we only restored one byte. Let's use
the sizeof() operator to make sure we restore the entire instruction.
While we are
On 30 May 2014 07:46, Paolo Bonzini pbonz...@redhat.com wrote:
Il 29/05/2014 22:38, Peter Maydell ha scritto:
+#ifdef TARGET_WORDS_BIGENDIAN
+cpsr |= CPSR_E;
This is wrong for BE32, where CPSR_E doesn't exist and both code
and data accesses are big-endian.
Is it okay for simplicity
On 12.05.14 14:15, Jens Freimann wrote:
From: David Hildenbrand d...@linux.vnet.ibm.com
This patch makes use of the hw debugging support in kvm (provided by the guest's
PER facility) on s390. It enables the following features, available using the
gdbserver:
- single-stepping
- hw breakpoints
-
On 30 May 2014 09:19, Alexander Graf ag...@suse.de wrote:
Ouch. I'm fairly sure we don't have migration users on e500,
so we're safe. Thanks a lot for catching this!
Thank clang 3.4, which noticed that the vmstate_pci_inbound
variable was never used...
-- PMM
On 30/05/14 10:21, Alexander Graf wrote:
On 12.05.14 14:15, Jens Freimann wrote:
From: David Hildenbrand d...@linux.vnet.ibm.com
When restoring the previously saved instruction in
kvm_arch_remove_sw_breakpoint(), we only restored one byte. Let's use
the sizeof() operator to make sure we
On Fri, 30 May 2014 10:21:04 +0200
Markus Armbruster arm...@redhat.com wrote:
Igor Mammedov imamm...@redhat.com writes:
On Thu, 29 May 2014 10:41:32 -0600
Eric Blake ebl...@redhat.com wrote:
On 05/27/2014 07:01 AM, Igor Mammedov wrote:
[...]
+goto out;
+}
+if
On Thu, May 29, 2014 at 07:11:27PM +1000, Peter Crosthwaite wrote:
On Fri, May 23, 2014 at 1:40 AM, Stefan Hajnoczi stefa...@redhat.com wrote:
object_initialize() leaves the object with a refcount of 1.
object_property_add_child() adds its own reference which is dropped
again when the
On 30/05/14 10:32, Alexander Graf wrote:
+case KVM_HW_BP:
+if (find_hw_breakpoint(arch_info-addr, -1, arch_info-type)) {
+ret = EXCP_DEBUG;
+}
+break;
+case KVM_SINGLESTEP:
+if (cs-singlestep_enabled) {
+ret = EXCP_DEBUG;
+
v4:
* Fix some typos in the patch head description.
* Improve some comments.
* Given that xen_pt_register_vga_regions()/xen_pt_unregister_vga_regions()
are called unconditionally, so we just return 0 there.
* Remove one spurious change.
* Remove some unnecessary return in void foo().
* Given
basic gfx passthrough support:
- add a vga type for gfx passthrough
- retrieve VGA bios from sysfs, then load it to guest at 0xC
- register/unregister legacy VGA I/O ports and MMIOs for passthrough GFX
The original patch is from Weidong Han weidong@intel.com
Signed-off-by: Yang Zhang
Some registers of Intel IGD are mapped in host bridge, so it needs to
passthrough these registers of physical host bridge to guest because
emulated host bridge in guest doesn't have these mappings.
The original patch is from Weidong Han weidong.han @ intel.com
Signed-off-by: Yang Zhang
ISA bridge is needed since Intel gfx drive will probe it instead
of Dev31:Fun0 to make graphics device passthrough work easy for VMM, that
only need to expose ISA bridge to let driver know the real hardware underneath.
The original patch is from Allen Kay [allen.m@intel.com]
Signed-off-by:
On Thu, May 29, 2014 at 07:03:42PM +1000, Peter Crosthwaite wrote:
On Fri, May 23, 2014 at 1:40 AM, Stefan Hajnoczi stefa...@redhat.com wrote:
virtio-blk-pci, virtio-blk-s390, and virtio-blk-ccw all duplicate the
qdev properties of their VirtIOBlock child. This approach does not work
well
Implement that pci host bridge to specific to passthrough. Actually
this just inherit the standard one.
Signed-off-by: Tiejun Chen tiejun.c...@intel.com
---
v4:
* Fix one typo in the patch head description.
* Use (xen_enabled() xen_has_gfx_passthru) to make sure we only work
in this scenario.
On 30.05.14 10:57, Christian Borntraeger wrote:
On 30/05/14 10:32, Alexander Graf wrote:
+case KVM_HW_BP:
+if (find_hw_breakpoint(arch_info-addr, -1, arch_info-type)) {
+ret = EXCP_DEBUG;
+}
+break;
+case KVM_SINGLESTEP:
+if
On 05/30/2014 06:00 PM, Alexander Graf wrote:
On 30.05.14 07:58, Alexey Kardashevskiy wrote:
On 05/28/2014 09:35 PM, Alexander Graf wrote:
On 28.05.14 03:18, Alexey Kardashevskiy wrote:
On 05/28/2014 10:41 AM, Alexander Graf wrote:
On 28.05.14 02:34, Alexey Kardashevskiy wrote:
On
Il 30/05/2014 11:04, Peter Lieven ha scritto:
Am 30.05.2014 07:50, schrieb Paolo Bonzini:
Il 29/05/2014 22:25, Peter Lieven ha scritto:
Am 29.05.2014 21:17, schrieb Paolo Bonzini:
Il 29/05/2014 20:41, Peter Lieven ha scritto:
static inline unsigned geo_rand_range(double m, double n) {
Am 30.05.2014 07:50, schrieb Paolo Bonzini:
Il 29/05/2014 22:25, Peter Lieven ha scritto:
Am 29.05.2014 21:17, schrieb Paolo Bonzini:
Il 29/05/2014 20:41, Peter Lieven ha scritto:
static inline unsigned geo_rand_range(double m, double n) {
return exp((log(m) + (double)rand() /
On Fri, 30 May 2014 00:21:27 +1000
Peter Crosthwaite peter.crosthwa...@xilinx.com wrote:
On Tue, May 27, 2014 at 11:01 PM, Igor Mammedov imamm...@redhat.com wrote:
From: Vasilis Liaskovitis vasilis.liaskovi...@profitbricks.com
Each hotplug-able memory slot is a DimmDevice.
A hot-add
On 30/05/14 11:01, Alexander Graf wrote:
On 30.05.14 10:57, Christian Borntraeger wrote:
On 30/05/14 10:32, Alexander Graf wrote:
+case KVM_HW_BP:
+if (find_hw_breakpoint(arch_info-addr, -1, arch_info-type)) {
+ret = EXCP_DEBUG;
+}
+break;
+
Am 29.05.2014 um 13:14 hat Chrysostomos Nanakos geschrieben:
Hello team,
this is a patch implementing support for a new storage layer,
Archipelago [1][2].
We've been using Archipelago in our IaaS public cloud production
environment for over a year now, along with Google Ganeti [3]
and
The OpRegion shouldn't be mapped 1:1 because the address in the host
can't be used in the guest directly.
This patch traps read and write access to the opregion of the Intel
GPU config space (offset 0xfc).
The original patch is from Jean Guyader jean.guya...@eu.citrix.com
Signed-off-by: Yang
On Fri, 30 May 2014, Paolo Bonzini wrote:
Il 30/05/2014 00:33, BALATON Zoltan ha scritto:
Can you get the output of info mtree at the point where the unassigned
access happens?
memory
- (prio 0, RW): system
-07ff (prio 0, RW):
Kevin Wolf kw...@redhat.com writes:
Some code in the block layer makes potentially huge allocations. Failure
is not completely unexpected there, so avoid aborting qemu and handle
out-of-memory situations gracefully.
This patch addresses the allocations in the rbd block driver.
PAPR allows having multiple interrupt sources such as PHB.
This adds a source lookup function and makes use of it.
Since at the moment QEMU only supports a single source,
no change in behaviour is expected.
Signed-off-by: Alexey Kardashevskiy a...@ozlabs.ru
---
hw/intc/xics.c | 30
There are few helpers already to support array migration. However they all
require the destination side to preallocate arrays before migration which
is not always possible due to unknown array size as it might be some
sort of dynamic state. One of the examples is an array of MSIX-enabled
devices
This removes @next_irq from sPAPREnvironment which was used in old
IRQ allocator as XICS is now responsible for IRQs and keeps track of
allocated IRQs.
Signed-off-by: Alexey Kardashevskiy a...@ozlabs.ru
---
hw/ppc/spapr.c | 3 +--
include/hw/ppc/spapr.h | 1 -
2 files changed, 1
This implements interrupt release function so IRQs can be returned back
to the pool for reuse in cases such as PCI hot plug.
Signed-off-by: Alexey Kardashevskiy a...@ozlabs.ru
---
Changes:
v3:
* xics_free() now accepts irq instead of server:srcno and does sanity
checks
---
hw/intc/xics.c
Currently SPAPR PHB keeps track of all allocated MSI (here and below
MSI stands for both MSI and MSIX) interrupt because
XICS used to be unable to reuse interrupts. This is a problem for
dynamic MSI reconfiguration which happens when guest reloads a driver
or performs PCI hotplug. Another problem
The existing interrupt allocation scheme in SPAPR assumes that
interrupts are allocated at the start time, continously and the config
will not change. However, there are cases when this is not going to work
such as:
1. migration - we will have to have an ability to choose interrupt
numbers for
1. Debug bdrv_drain_all() and find out whether there are any I/O
requests remaining.
I believe that's what happens:
Context 1:
- commit_one_iteration makes write request (req A)
- request A is handled to io thread, qemu_coroutine_yield() is called
Context 2:
- VM makes write request (req
The current allocator returns IRQ numbers from a pool and does not
support IRQs reuse in any form as it did not keep track of what it
previously returned, it only keeps the last returned IRQ. Some use
cases such as PCI hot(un)plug may require IRQ release and reallocation.
This moves an allocator
This moves interrupts allocation business from SPAPR to XICS
and makes use of it.
Changes:
v3:
* replaces static array of descriptors in SPAPR PHB with GHashTable
* implements migration of hash table via temporary array
v2:
* s/server/source/
* fixed typos, code style, added an assert
* added
On Fri, May 30, 2014 at 7:01 PM, Igor Mammedov imamm...@redhat.com wrote:
On Fri, 30 May 2014 00:21:27 +1000
Peter Crosthwaite peter.crosthwa...@xilinx.com wrote:
On Tue, May 27, 2014 at 11:01 PM, Igor Mammedov imamm...@redhat.com wrote:
From: Vasilis Liaskovitis
On Wed, May 28, 2014 at 04:37:44PM +0200, Kevin Wolf wrote:
Some code in the block layer makes potentially huge allocations. Failure
is not completely unexpected there, so avoid aborting qemu and handle
out-of-memory situations gracefully.
This patch addresses the allocations in the qcow2
On Wed, May 28, 2014 at 04:37:35PM +0200, Kevin Wolf wrote:
Some code in the block layer makes potentially huge allocations. Failure
is not completely unexpected there, so avoid aborting qemu and handle
out-of-memory situations gracefully.
This patch addresses bounce buffer allocations in
On Fri, 30 May 2014, BALATON Zoltan wrote:
On Fri, 30 May 2014, Paolo Bonzini wrote:
Il 30/05/2014 00:33, BALATON Zoltan ha scritto:
Can you get the output of info mtree at the point where the unassigned
access happens?
More exactly at the beginning of ohci_read_hcca it is the following. (No
This removes xics_set_irq_type() as it is not used anymore.
This is done by a separate patch to make the previous patch
look nicer.
Signed-off-by: Alexey Kardashevskiy a...@ozlabs.ru
---
hw/intc/xics.c| 11 ---
include/hw/ppc/xics.h | 1 -
2 files changed, 12 deletions(-)
diff
Since islsi[] array has been merged into the ICSState struct,
we must not reset flags as they tell if the interrupt is in use.
Signed-off-by: Alexey Kardashevskiy a...@ozlabs.ru
---
hw/intc/xics.c | 7 +++
hw/intc/xics_kvm.c | 7 +++
2 files changed, 14 insertions(+)
diff --git
On 30.05.14 11:34, Alexey Kardashevskiy wrote:
Currently SPAPR PHB keeps track of all allocated MSI (here and below
MSI stands for both MSI and MSIX) interrupt because
XICS used to be unable to reuse interrupts. This is a problem for
dynamic MSI reconfiguration which happens when guest reloads
Il 30/05/2014 00:33, BALATON Zoltan ha scritto:
usb-ohci: pci-ohci: USB Operational
Unassigned mem read 07c9ae00
Unassigned mem read 07c9ae04
[...]
Unassigned mem read 07c9ae84
usb-ohci: HCCA read error at 7c9ae00
ohci_die: DMA error
The read happens through
On Fri, 30 May 2014 19:48:13 +1000
Peter Crosthwaite peter.crosthwa...@xilinx.com wrote:
On Fri, May 30, 2014 at 7:01 PM, Igor Mammedov imamm...@redhat.com wrote:
On Fri, 30 May 2014 00:21:27 +1000
Peter Crosthwaite peter.crosthwa...@xilinx.com wrote:
On Tue, May 27, 2014 at 11:01 PM,
On Fri, May 30, 2014 at 7:48 PM, Peter Crosthwaite
peter.crosthwa...@xilinx.com wrote:
On Fri, May 30, 2014 at 7:01 PM, Igor Mammedov imamm...@redhat.com wrote:
On Fri, 30 May 2014 00:21:27 +1000
Peter Crosthwaite peter.crosthwa...@xilinx.com wrote:
On Tue, May 27, 2014 at 11:01 PM, Igor
On Fri, May 30, 2014 at 8:31 PM, Igor Mammedov imamm...@redhat.com wrote:
On Fri, 30 May 2014 19:48:13 +1000
Peter Crosthwaite peter.crosthwa...@xilinx.com wrote:
On Fri, May 30, 2014 at 7:01 PM, Igor Mammedov imamm...@redhat.com wrote:
On Fri, 30 May 2014 00:21:27 +1000
Peter Crosthwaite
Ping. This patch was suggested to be sent separately but I can also
include it to the TZ patchset again.
http://patchwork.ozlabs.org/patch/349592/
Thanks,
Fabian
On 16 May 2014, at 14:43, Fabian Aggeler aggel...@ethz.ch wrote:
This patch changes some readfns/writefns to use raw_write
and
Kevin Wolf kw...@redhat.com writes:
A not too small part of the recent CVEs were DoS scenarios by letting
qemu abort with too large memory allocations. We generally fixed these
cases by setting some limits on values read from image files that
influence the size of allocations.
Just
Move the x-data-plane property. Originally it was outside since not
every transport may wish to support dataplane. But that makes little
sense when we have a dedicated CONFIG_VIRTIO_BLK_DATA_PLANE ifdef
already.
This move makes it easier to switch to property aliases in the next
patch.
v3:
* Split qdev_alias_all_properties() into its own patch [Peter Crosthwaite]
* Do not dereference DEVICE_CLASS(class) inline [Peter Crosthwaite]
v2:
* Add qdev_alias_all_properties() instead of virtio-blk-specific function
[Paolo]
* Explain refcount handling in doc comment [Paolo]
* Fix
It becomes unwiedly to duplicate all virtio-blk qdev property
definitions due to an #ifdef. The C preprocessor syntax makes it a
little hard to resolve this cleanly but we can extract the #ifdef and
call a macro it defines later.
Avoiding duplication is important since it will only get worse
Sometimes an object needs to present a property which is actually on
another object, or it needs to provide an alias name for an existing
property.
Examples:
a.foo - b.foo
a.old_name - a.new_name
The new object_property_add_alias() API allows objects to alias a
property on the same object or
The qdev_alias_all_properties() function creates QOM alias properties
for each qdev property on a DeviceState. This is useful for parent
objects that wish to forward property accesses to their children.
Signed-off-by: Stefan Hajnoczi stefa...@redhat.com
---
v3:
* Split
There is no need to make DEFINE_VIRTIO_BLK_PROPERTIES() public. Inline
it into virtio-blk.c so it cannot be used by mistake from other source
files.
Signed-off-by: Stefan Hajnoczi stefa...@redhat.com
Reviewed-by: Peter Crosthwaite peter.crosthwa...@xilinx.com
---
hw/block/virtio-blk.c
This function is no longer used since parent objects now use child
aliases to set the VirtIOBlkConf directly.
Signed-off-by: Stefan Hajnoczi stefa...@redhat.com
Reviewed-by: Peter Crosthwaite peter.crosthwa...@xilinx.com
---
hw/block/virtio-blk.c | 6 --
object_initialize() leaves the object with a refcount of 1.
object_property_add_child() adds its own reference which is dropped
again when the property is deleted.
The upshot of this is that we always have a refcount = 1. Upon hot
unplug the virtio-blk child is not finalized!
Drop our reference
On Fri, 30 May 2014 20:55:50 +1000
Peter Crosthwaite peter.crosthwa...@xilinx.com wrote:
On Fri, May 30, 2014 at 8:31 PM, Igor Mammedov imamm...@redhat.com wrote:
On Fri, 30 May 2014 19:48:13 +1000
Peter Crosthwaite peter.crosthwa...@xilinx.com wrote:
On Fri, May 30, 2014 at 7:01 PM,
When a quorum file is totally destroyed (broken NAS or SAN) the user can start a
drive-mirror job on the quorum block backend and then replace the broken
quorum file with drive-mirror-replace given it has a node-name.
Signed-off-by: Benoit Canet ben...@irqsave.net
---
block.c |
On read operations when this parameter is set and some replicas are corrupted
while quorum can be reached quorum will proceed to rewrite the correct version
of the data to fix the corrupted replicas.
This will shine with SSD where the FTL will remap the same block at another
place on rewrite.
Tests for drive-mirror-replace whose purpose is to enable quorum file mirroring
and replacement after failure.
Signed-off-by: Benoit Canet ben...@irqsave.net
---
tests/qemu-iotests/041| 34 +--
tests/qemu-iotests/096| 222 ++
These are the last bits required to make quorum usable in production.
v5: rebase on latest Stefan's block branch [Kevin]
v4:
update patchset to stefan's block branch
drop Max reviewed by because the series changes
Benoît Canet (3):
quorum: Add the rewrite-corrupted
Am 29.05.2014 um 13:14 hat Chrysostomos Nanakos geschrieben:
VM Image on Archipelago volume is specified like this:
file=archipelago:volumename[/mport=mapperd_port[:vport=vlmcd_port]]
'archipelago' is the protocol.
'mport' is the port number on which mapperd is listening. This is
The Friday 30 May 2014 à 13:18:42 (+0200), Benoît Canet wrote :
Oh sorry I made again commits lines ending with a dot.
Will fix this in the next iteration.
Best regards
Benoît
On read operations when this parameter is set and some replicas are corrupted
while quorum can be reached quorum
Am 30.05.2014 um 13:14 hat Markus Armbruster geschrieben:
Kevin Wolf kw...@redhat.com writes:
A not too small part of the recent CVEs were DoS scenarios by letting
qemu abort with too large memory allocations. We generally fixed these
cases by setting some limits on values read from image
On Fri, 30 May 2014, Paolo Bonzini wrote:
Il 30/05/2014 00:33, BALATON Zoltan ha scritto:
usb-ohci: pci-ohci: USB Operational
Unassigned mem read 07c9ae00
Unassigned mem read 07c9ae04
[...]
Unassigned mem read 07c9ae84
usb-ohci: HCCA read error at 7c9ae00
ohci_die: DMA
Il 30/05/2014 13:32, BALATON Zoltan ha scritto:
On Fri, 30 May 2014, Paolo Bonzini wrote:
Il 30/05/2014 00:33, BALATON Zoltan ha scritto:
usb-ohci: pci-ohci: USB Operational
Unassigned mem read 07c9ae00
Unassigned mem read 07c9ae04
[...]
Unassigned mem read 07c9ae84
virtio-blk-pci, virtio-blk-s390, and virtio-blk-ccw all duplicate the
qdev properties of their VirtIOBlock child. This approach does not work
well with string or pointer properties since we must be careful about
leaking or double-freeing them.
Use the QOM alias property to forward property
Am 29.05.2014 um 00:19 hat Max Reitz geschrieben:
If bs-drv is NULL, iov.iov_base should not be leaked.
Signed-off-by: Max Reitz mre...@redhat.com
Funny how such things go unnoticed for months and then three people fix
it independently in the same week. Anyway, I won: commit bd604369 ;-)
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