[Qemu-devel] [PATCH v2 0/3] Second try at fixing sparc register allocation

Attempting to fix the problem reported by Mark re i686 vs sparc64. Unsurprisingly, the problems tend to revolve around the 6 operand opcodes like sub2 or qemu_st64, where we use all, or all but one register. r~ Richard Henderson (3): tcg: Fix name for high-half register tcg: Optimize spill

[Qemu-devel] [PATCH v3] fw/msr_feature_control: add support to set MSR_IA32_FEATURE_CONTROL

OS usually expects BIOS to set certain bits in MSR_IA32_FEATURE_CONTROL for some features (e.g. VMX and LMCE). QEMU provides a fw_cfg file "etc/msr_feature_control" to advise bits that should be set in MSR_IA32_FEATURE_CONTROL. If this file exists, SeaBIOS will set the advised bits in that MSR. Si

[Qemu-devel] [PATCH v2 3/3] tcg: Rearrange register allocation

With indirect_regs, and opcodes with enough inputs, on i686 we can find ourselves in a situation in which there are no free registers, and cannot load the indirect_base so that we can spill temps so that we can free up registers. When this happens, release the operands, sync all of the temps, and

Re: [Qemu-devel] [PATCH 00/13] virtio migration: Flip outer layer to vmstate

Hi, > I think the first two patches are the most controversial; > they remove migration support for old version of virtio-net and virtio-serial; > (for virtio-net versions prior to 0.11 and for virtio-serial prior to 0.13). > I'm working on the basis that migration has bit rotted enough so > tha

Re: [Qemu-devel] [RFC 00/28] s390x CPU models: exposing features

> On Tue, Jun 21, 2016 at 17:33:09 -0300, Eduardo Habkost wrote: > > On Tue, Jun 21, 2016 at 07:01:44PM +0200, David Hildenbrand wrote: > > > > (CCing libvirt people) > > > > > > > > On Tue, Jun 21, 2016 at 03:02:05PM +0200, David Hildenbrand wrote: > > > > > This is our second attempt to impl

Re: [Qemu-devel] [RFC PATCH V4 0/4] Introduce COLO-compare

On 2016年06月22日 14:24, Zhang Chen wrote: On 06/20/2016 01:24 PM, Jason Wang wrote: On 2016年06月20日 11:27, Zhang Chen wrote: On 06/20/2016 11:03 AM, Jason Wang wrote: On 2016年06月17日 10:25, Zhang Chen wrote: Hi~ jason. I tried a lot of ways to make it run in compare thread, but it not

Re: [Qemu-devel] [PATCH v2 01/10] ppc: Fix rfi/rfid/hrfi/... emulation

On 06/22/2016 04:46 AM, David Gibson wrote: > I'm not comfortable merging this until the openbios change is pulled > back into the qemu tree (submodule and pre-built binary). > > Again - sure you don't want to apply this with rfi still enabled for > 64-bit for now, letting the rest of this series

Re: [Qemu-devel] [PATCH 11/13] virtio-input: Wrap in vmstate

On Di, 2016-06-21 at 20:14 +0100, Dr. David Alan Gilbert (git) wrote: > From: "Dr. David Alan Gilbert" > > Forcibly convert it to a vmstate wrapper; proper conversion > comes later. FYI: Should be an easy target for proper conversion as virtio-input doesn't need to save any device-specific stat

Re: [Qemu-devel] [RFC 00/28] s390x CPU models: exposing features

> On Tue, Jun 21, 2016 at 13:44:31 -0300, Eduardo Habkost wrote: > > (CCing libvirt people) > > > > On Tue, Jun 21, 2016 at 03:02:05PM +0200, David Hildenbrand wrote: > > > This is our second attempt to implement CPU models for s390x. We realized > > > that we also want to have features exposed vi

Re: [Qemu-devel] [RFC PATCH 3/3] filter-rewriter: rewrite tcp packet to keep secondary connection

On 2016年06月22日 11:12, Zhang Chen wrote: On 06/20/2016 08:14 PM, Dr. David Alan Gilbert wrote: * Jason Wang (jasow...@redhat.com) wrote: On 2016年06月14日 19:15, Zhang Chen wrote: We will rewrite tcp packet secondary received and sent. More verbose please. E.g which fields were rewrote and w

Re: [Qemu-devel] [RFC PATCH V4 0/4] Introduce COLO-compare

On 06/20/2016 01:24 PM, Jason Wang wrote: On 2016年06月20日 11:27, Zhang Chen wrote: On 06/20/2016 11:03 AM, Jason Wang wrote: On 2016年06月17日 10:25, Zhang Chen wrote: Hi~ jason. I tried a lot of ways to make it run in compare thread, but it not work. Because that: void g_main_context_

Re: [Qemu-devel] [RFC 06/28] s390x/cpumodel: introduce CPU feature group definitions

> On 21.06.2016 15:02, David Hildenbrand wrote: > > Let's use the generated groups to create feature group representations for > > the user. These groups can later be used to enable/disable multiple > > features in one shot and will be used to reduce the amount of reported > > features to the user

Re: [Qemu-devel] [PATCH v4 0/7] virtio-blk: multiqueue support

On Tue, 06/21 13:13, Stefan Hajnoczi wrote: > v4: > * Rebased onto qemu.git/master > * Included latest performance results The changes look very good to me: Reviewed-by: Fam Zheng

Re: [Qemu-devel] [PATCH 0/5] Auto-fragment large transactions at the block layer

On Mon, 06/20 17:39, Eric Blake wrote: > We have max_transfer documented in BlockLimits, but while we > honor it during pwrite_zeroes, we were blindly ignoring it > during pwritev and preadv, leading to multiple drivers having > to implement fragmentation themselves. This series moves > fragmentat

Re: [Qemu-devel] [PATCHv2] rtl8139: save/load RxMulOk counter (again)

On 2016年06月21日 18:11, Paolo Bonzini wrote: On 21/06/2016 11:36, David Vrabel wrote: >On 21/06/16 08:35, Paolo Bonzini wrote: >> >> >>On 21/06/2016 03:44, Jason Wang wrote: >>> >>> >>>On 2016年06月21日 01:53, David Vrabel wrote: Commit 9d29cdeaaca3a0383af764000b71492c4fc67c6e (rtl8139: port

Re: [Qemu-devel] [PATCH v2] vmxnet3: Fix reading/writing guest memory specially when behind an IOMMU

On 2016年06月21日 14:21, Dmitry Fleytman wrote: On 20 Jun 2016, at 16:50 PM, KarimAllah Ahmed > wrote: When a PCI device lives behind an IOMMU, it should use 'pci_dma_*' family of functions when any transfer from/to guest memory is required while 'cpu_physical_memo

Re: [Qemu-devel] [PATCH v8 11/12] vfio: register aer resume notification handler for aer resume

Hi Alex, In vfio I have some questions. 1. How can I disable the access by mmap? We can disable all access to vfio fd by returning a EAGAIN error if user try to access it during the reset period until the host reset finished. But about the bar region which is maped by vfio_pci_m

Re: [Qemu-devel] [PATCH v2 1/1] mirror: fix trace_mirror_yield_in_flight usage in mirror_iteration()

On Tue, Jun 21, 2016 at 05:09:17PM +0300, Denis V. Lunev wrote: > trace_mirror_yield_in_flight accepts 2nd arguments in sectors while here > we pass chunks instead. > > Signed-off-by: Denis V. Lunev > CC: Jeff Cody > CC: Kevin Wolf > CC: Max Reitz > --- > Changes from v1: > - proper persons ad

Re: [Qemu-devel] [PATCH v8 11/12] vfio: register aer resume notification handler for aer resume

On Wed, 22 Jun 2016 11:28:50 +0800 Zhou Jie wrote: > Hi Alex, > > >> Hi Alex, > >> on kernel side, I think if we don't trust the user behaviors, we > >> should > >> disable the access of vfio-pci interface once vfio-pci driver got the > >> error_detected, > >> we should disable all acc

Re: [Qemu-devel] [PATCH 3/3] VFIO Type1 IOMMU: Add support for mediated devices

On Mon, 20 Jun 2016 22:01:48 +0530 Kirti Wankhede wrote: > VFIO Type1 IOMMU driver is designed for the devices which are IOMMU > capable. Mediated device only uses IOMMU TYPE1 API, the underlying > hardware can be managed by an IOMMU domain. > > This change exports functions to pin and unpin pag

[Qemu-devel] [PATCH v10.2 24/26] kvm-irqchip: introduce kvm_irqchip_update_msi_route_no_commit

We do gsi route commit for each irqchip route update before. This is not efficient if we are updating lots of routes in the same time. This patch introduce a new "no_commit" version of the update function, which can be used when we update multiple route entries in a sequence. This change also requ

Re: [Qemu-devel] [PATCH v8 11/12] vfio: register aer resume notification handler for aer resume

Hi Alex, Hi Alex, on kernel side, I think if we don't trust the user behaviors, we should disable the access of vfio-pci interface once vfio-pci driver got the error_detected, we should disable all access to vfio fd regardless whether the vfio-pci was assigned to a VM, we also can re

Re: [Qemu-devel] [PATCH qemu v18 5/5] spapr_pci/spapr_pci_vfio: Support Dynamic DMA Windows (DDW)

On 22/06/16 12:35, David Gibson wrote: > On Tue, Jun 21, 2016 at 11:14:05AM +1000, Alexey Kardashevskiy wrote: >> This adds support for Dynamic DMA Windows (DDW) option defined by >> the SPAPR specification which allows to have additional DMA window(s) >> >> The "ddw" property is enabled by default

Re: [Qemu-devel] [RFC PATCH v0 1/1] spapr: Support setting of compat CPU type for CPU cores

On Wed, Jun 22, 2016 at 08:06:50AM +0530, Bharata B Rao wrote: > On Tue, Jun 21, 2016 at 03:10:00PM +1000, David Gibson wrote: > > On Sat, Jun 18, 2016 at 02:04:06PM +0530, Bharata B Rao wrote: > > > Compat CPU type is typically specified on -cpu cmdline option like: > > > -cpu host,compat=power7 o

Re: [Qemu-devel] [RFC PATCH 3/3] filter-rewriter: rewrite tcp packet to keep secondary connection

On 06/20/2016 08:14 PM, Dr. David Alan Gilbert wrote: * Jason Wang (jasow...@redhat.com) wrote: On 2016年06月14日 19:15, Zhang Chen wrote: We will rewrite tcp packet secondary received and sent. More verbose please. E.g which fields were rewrote and why. OK. Signed-off-by: Zhang Chen Sign

Re: [Qemu-devel] [PATCH v2 01/10] ppc: Fix rfi/rfid/hrfi/... emulation

On Tue, Jun 21, 2016 at 11:48:46PM +0200, Cédric Le Goater wrote: > From: Benjamin Herrenschmidt > > This reworks emulation of the various "rfi" variants. I removed > some masking bits that I couldn't make sense of, the only bit that > I am aware we should mask here is POW, the CPU's MSR mask sho

Re: [Qemu-devel] [RFC PATCH v0 1/1] spapr: Support setting of compat CPU type for CPU cores

On Tue, Jun 21, 2016 at 03:10:00PM +1000, David Gibson wrote: > On Sat, Jun 18, 2016 at 02:04:06PM +0530, Bharata B Rao wrote: > > Compat CPU type is typically specified on -cpu cmdline option like: > > -cpu host,compat=power7 or -cpu POWER8E,compat=power7 etc. > > With the introduction of sPAPR CP

Re: [Qemu-devel] [PATCH qemu v18 5/5] spapr_pci/spapr_pci_vfio: Support Dynamic DMA Windows (DDW)

On Tue, Jun 21, 2016 at 11:14:05AM +1000, Alexey Kardashevskiy wrote: > This adds support for Dynamic DMA Windows (DDW) option defined by > the SPAPR specification which allows to have additional DMA window(s) > > The "ddw" property is enabled by default on a PHB but for compatibility > the pserie

Re: [Qemu-devel] [RFC PATCH v0 1/1] spapr: Support setting of compat CPU type for CPU cores

On Tue, Jun 21, 2016 at 08:04:12AM +0200, Thomas Huth wrote: > On 18.06.2016 10:34, Bharata B Rao wrote: > > Compat CPU type is typically specified on -cpu cmdline option like: > > -cpu host,compat=power7 or -cpu POWER8E,compat=power7 etc. > > With the introduction of sPAPR CPU core devices, we nee

Re: [Qemu-devel] [RFC PATCH v0 1/1] spapr: Support setting of compat CPU type for CPU cores

On Tue, Jun 21, 2016 at 09:09:57AM +0200, Igor Mammedov wrote: > On Sat, 18 Jun 2016 14:04:06 +0530 > Bharata B Rao wrote: > > > Compat CPU type is typically specified on -cpu cmdline option like: > > -cpu host,compat=power7 or -cpu POWER8E,compat=power7 etc. > > With the introduction of sPAPR CP

Re: [Qemu-devel] [PATCH qemu v18 4/5] vfio/spapr: Create DMA window dynamically (SPAPR IOMMU v2)

On Tue, Jun 21, 2016 at 11:14:04AM +1000, Alexey Kardashevskiy wrote: > New VFIO_SPAPR_TCE_v2_IOMMU type supports dynamic DMA window management. > This adds ability to VFIO common code to dynamically allocate/remove > DMA windows in the host kernel when new VFIO container is added/removed. > > Thi

Re: [Qemu-devel] [PATCH v2 2/6] exec.c: Remove static allocation of sub_section of sub_page

On 06/21/2016 10:09 AM, Peter Maydell wrote: From: Vijaya Kumar K Allocate sub_section dynamically. Remove dependency on TARGET_PAGE_SIZE to make run-time page size detection for arm platforms. Signed-off-by: Vijaya Kumar K Message-id: 1465808915-4887-3-git-send-email-vija...@caviumnetworks.c

Re: [Qemu-devel] [PATCH v2 1/6] migration: Remove static allocation of xzblre cache buffer

On 06/21/2016 10:09 AM, Peter Maydell wrote: From: Vijaya Kumar K Allocate xzblre zero page cache buffer dynamically. Remove dependency on TARGET_PAGE_SIZE to make run-time page size detection for arm platforms. Signed-off-by: Vijaya Kumar K Message-id: 1465808915-4887-2-git-send-email-vija..

Re: [Qemu-devel] [PATCH v3 00/20] GICv3 emulation

On 2016/6/22 3:53, Peter Maydell wrote: > On 21 June 2016 at 20:45, Laszlo Ersek wrote: >> > On 06/21/16 19:21, Peter Maydell wrote: >>> >> and add a note I forgot to mention: my primary hypothesis is that >>> >> the problem here is "guest does not write to the GICD_IGROUPR and >>> >> GICR_IGROU

Re: [Qemu-devel] [PATCH qemu v18 1/5] memory: Add reporting of supported page sizes

On Tue, Jun 21, 2016 at 12:23:02PM +0200, Paolo Bonzini wrote: > > > On 21/06/2016 08:16, David Gibson wrote: > >> for (addr = 0; addr < memory_region_size(mr); addr += granularity) { > >> iotlb = mr->iommu_ops->translate(mr, addr, is_write); > >> if (iotlb.perm != IOMMU_NO

Re: [Qemu-devel] [PATCH 2/7] QEMU does not currently support host pages that are larger than guest pages, likely due to glibc using fixed mmap requests.

On 06/20/2016 06:25 AM, Peter Maydell wrote: On 19 June 2016 at 19:24, Richard Henderson wrote: On 06/19/2016 02:46 AM, Peter Maydell wrote: This is supposed to work -- for instance the linux-user/mmap.c code has support for host pages and target pages not being the same. In particular for ARM

[Qemu-devel] [PATCH v2 1/5] linux-user: Provide safe_syscall for i386

Signed-off-by: Richard Henderson --- linux-user/host/i386/hostdep.h | 23 +++ linux-user/host/i386/safe-syscall.inc.S | 112 2 files changed, 135 insertions(+) create mode 100644 linux-user/host/i386/safe-syscall.inc.S diff --git a/linux-user/host/

[Qemu-devel] [PATCH v2 5/5] linux-user: Provide safe_syscall for ppc64

Signed-off-by: Richard Henderson --- linux-user/host/ppc64/hostdep.h | 23 linux-user/host/ppc64/safe-syscall.inc.S | 92 2 files changed, 115 insertions(+) create mode 100644 linux-user/host/ppc64/safe-syscall.inc.S diff --git a/linux-user/hos

[Qemu-devel] [PATCH v2 3/5] linux-user: Provide safe_syscall for aarch64

Signed-off-by: Richard Henderson --- linux-user/host/aarch64/hostdep.h | 23 + linux-user/host/aarch64/safe-syscall.inc.S | 75 ++ 2 files changed, 98 insertions(+) create mode 100644 linux-user/host/aarch64/safe-syscall.inc.S diff --git a/linux-user

[Qemu-devel] [PATCH v2 2/5] linux-user: Provide safe_syscall for arm

Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- linux-user/host/arm/hostdep.h | 23 + linux-user/host/arm/safe-syscall.inc.S | 90 ++ 2 files changed, 113 insertions(+) create mode 100644 linux-user/host/arm/safe-syscall.inc.S di

[Qemu-devel] [PATCH v2 4/5] linux-user: Provide safe_syscall for s390x

Signed-off-by: Richard Henderson --- linux-user/host/s390x/hostdep.h | 23 linux-user/host/s390x/safe-syscall.inc.S | 90 2 files changed, 113 insertions(+) create mode 100644 linux-user/host/s390x/safe-syscall.inc.S diff --git a/linux-user/hos

[Qemu-devel] [PATCH v2 0/5] linux-user: safe_syscall updates

Rebased on Riku's linux-user-for-upstream branch. Fixed some nits that Peter pointed out. Fixed the ppc64 version to properly return -errno. Retested all except s390x, which is, at the moment, inconvenient. r~ Richard Henderson (5): linux-user: Provide safe_syscall for i386 linux-user: Pro

[Qemu-devel] [Bug 1131757] news

Hi, I've just read some interesting news about our friend, just look at him, he is a star! Please read here Take care, tk...@yandex.ru -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. ht

Re: [Qemu-devel] [PATCH 2/3] VFIO driver for mediated PCI device

On Mon, 20 Jun 2016 22:01:47 +0530 Kirti Wankhede wrote: > VFIO driver registers with MDEV core driver. MDEV core driver creates > mediated device and calls probe routine of MPCI VFIO driver. This MPCI > VFIO driver adds mediated device to VFIO core module. > Main aim of this module is to manage

Re: [Qemu-devel] [PATCH v6 11/13] register: Add GPIO API

On Fri, Jun 10, 2016 at 4:52 AM, Peter Maydell wrote: > On 12 May 2016 at 23:46, Alistair Francis wrote: >> Add GPIO functionality to the register API. This allows association >> and automatic connection of GPIOs to bits in registers. GPIO inputs >> will attach to handlers that automatically set

Re: [Qemu-devel] [PATCH v2 00/17] Byte-based block limits

On 06/21/2016 08:18 AM, Kevin Wolf wrote: > Am 14.06.2016 um 23:30 hat Eric Blake geschrieben: >> BlockLimits is currently an ugly mix of byte limits vs. >> sector limits. Unify it. Fix some bugs I found in >> bdrv_aligned_preadv() while at it. >> >> Prequisite: Kevin's ongoing work to migrate bd

Re: [Qemu-devel] [PATCH v2 17/17] block: Move request_alignment into BlockLimit

On 06/21/2016 08:16 AM, Kevin Wolf wrote: > Am 14.06.2016 um 23:30 hat Eric Blake geschrieben: >> It makes more sense to have ALL block size limit constraints >> in the same struct. Improve the documentation while at it. >> >> Signed-off-by: Eric Blake >> >> --- >> struct BlockLimits { >> +

Re: [Qemu-devel] [PATCH v2 16/17] block: Split bdrv_merge_limits() from bdrv_refresh_limits()

On 06/21/2016 08:12 AM, Kevin Wolf wrote: > Am 14.06.2016 um 23:30 hat Eric Blake geschrieben: >> The raw block driver was blindly copying all limits from bs->file, >> even though: 1. the main bdrv_refresh_limits() already does this >> for many of gthe limits, and 2. blindly copying from the childr

Re: [Qemu-devel] [PATCH v2 15/17] block: Switch discard length bounds to byte-based

On 06/21/2016 08:05 AM, Kevin Wolf wrote: > Am 14.06.2016 um 23:30 hat Eric Blake geschrieben: >> Sector-based limits are awkward to think about; in our on-going >> quest to move to byte-based interfaces, convert max_discard and >> discard_alignment. Rename them, using 'pdiscard' as an aid to >> t

Re: [Qemu-devel] [PATCH v6 06/13] register: Add block initialise helper

On Tue, Jun 21, 2016 at 12:45 PM, Peter Maydell wrote: > On 21 June 2016 at 19:25, Alistair Francis > wrote: >> On Fri, Jun 10, 2016 at 4:02 AM, Peter Maydell >> wrote: +/** + * Init a block of consecutive registers into a container MemoryRegion. A + * number of constant registe

Re: [Qemu-devel] [PATCH v2 14/17] block: Switch transfer length bounds to byte-based

On 06/21/2016 07:50 AM, Kevin Wolf wrote: > Am 14.06.2016 um 23:30 hat Eric Blake geschrieben: >> Sector-based limits are awkward to think about; in our on-going >> quest to move to byte-based interfaces, convert max_transfer_length >> and opt_transfer_length. Rename them (dropping the _length suf

Re: [Qemu-devel] [PATCH v2 08/17] blkdebug: Set request_alignment during .bdrv_refresh_limits()

On 06/21/2016 07:27 AM, Kevin Wolf wrote: > Am 14.06.2016 um 23:30 hat Eric Blake geschrieben: >> We want to eventually stick request_alignment alongside other >> BlockLimits, but first, we must ensure it is populated at the >> same time as all other limits, rather than being a special case >> that

Re: [Qemu-devel] [PATCH] xlnx_dp: fix iffy xlnx_dp_aux_push_tx_fifo

On 06/21/2016 08:09 AM, KONRAD Frederic wrote: > > > Le 21/06/2016 à 15:16, Paolo Bonzini a écrit : >> xlnx_dp_aux_push_tx_fifo takes an immediate uint8_t and a buffer length, >> which must be 1 because that is how many uint8_t's fit in a uint8_t. >> Sure enough, that is what xlnx_dp_write passes

[Qemu-devel] [PATCH v1 1/1] cadence_uart: Protect against transmit errors

If qemu_chr_fe_write() returns an error (represented by a negative number) we should skip incrementing the count and initiating a memmove(). Signed-off-by: Alistair Francis Reported-by: Peter Maydell --- hw/char/cadence_uart.c | 7 +-- 1 file changed, 5 insertions(+), 2 deletions(-) diff

Re: [Qemu-devel] [PATCH 2/2] trace: [bsd-user] Commandline arguments to control tracing

On 06/21/2016 07:23 AM, Lluís Vilanova wrote: > Signed-off-by: Lluís Vilanova > --- > bsd-user/main.c | 21 + > 1 file changed, 21 insertions(+) > > diff --git a/bsd-user/main.c b/bsd-user/main.c > index 9f592be..ce2cc17 100644 > --- a/bsd-user/main.c > +++ b/bsd-user/main.

[Qemu-devel] [PATCH v2 10/10] ppc: Add P7/P8 Power Management instructions

From: Benjamin Herrenschmidt This adds the ISA 2.06 and later power management instructions (doze, nap, sleep and rvwinkle) and associated wakeup cause testing in LPCR Signed-off-by: Benjamin Herrenschmidt [clg: fixed checkpatch.pl errors ] Signed-off-by: Cédric Le Goater Reviewed-by: David Gi

Re: [Qemu-devel] [PATCH 1/2] trace: [linux-user] Commandline arguments to control tracing

On 06/21/2016 07:23 AM, Lluís Vilanova wrote: > Signed-off-by: Lluís Vilanova > --- > linux-user/main.c | 28 > 1 file changed, 28 insertions(+) > > +{"trace-enable", "QEMU_TRACE_ENABLE",true, handle_arg_trace_enable, > + "name", "enable tracing of

[Qemu-devel] [PATCH v2 05/10] ppc: Fix generation if ISI/DSI vs. HV mode

From: Benjamin Herrenschmidt Under some circumstances, we need to direct ISI and DSI interrupts at the hypervisor, turning them into HISI/HDSI, and using different SPRs (HDSISR and HDAR) depending on the combination of MSR_DR and the corresponding VPM bits in LPCR. This moves part of the code in

Re: [Qemu-devel] [PATCH 0/5] Auto-fragment large transactions at the block layer

On 06/21/2016 04:23 AM, Stefan Hajnoczi wrote: > On Mon, Jun 20, 2016 at 05:39:24PM -0600, Eric Blake wrote: >> We have max_transfer documented in BlockLimits, but while we >> honor it during pwrite_zeroes, we were blindly ignoring it >> during pwritev and preadv, leading to multiple drivers having

[Qemu-devel] [PATCH v2 04/10] ppc: Fix POWER7 and POWER8 exception definitions

From: Benjamin Herrenschmidt We were initializing unused ones and missing some Signed-off-by: Benjamin Herrenschmidt Reviewed-by: David Gibson [clg: fixed checkpatch.pl errors ] Signed-off-by: Cédric Le Goater --- target-ppc/cpu.h| 11 ++- target-ppc/translate_init.c | 27

[Qemu-devel] [PATCH v2 03/10] ppc: fix exception model for HV mode

From: Benjamin Herrenschmidt This properly implements LPES0 handling for HV vs. !HV mode and removes the unsupported LPES1. This has been removed from the specs since ISA v2.07. Signed-off-by: Benjamin Herrenschmidt [clg: AIL implementation was fixed in commit 5c94b2a5e5ef. This patch onl

[Qemu-devel] [PATCH v2 07/10] ppc: Add real mode CI load/store instructions for P7 and P8

From: Benjamin Herrenschmidt Those instructions are only available in hypervisor real mode and allow cache inhibited garded access to devices in that mode. Signed-off-by: Benjamin Herrenschmidt [clg: fixed checkpatch.pl errors ] Signed-off-by: Cédric Le Goater Reviewed-by: David Gibson --- t

[Qemu-devel] [PATCH v2 02/10] ppc: define a default LPCR value

From: Benjamin Herrenschmidt This allows us to set the appropriate LPCR bits which will be used when fixing the exception model for the HV mode. Signed-off-by: Benjamin Herrenschmidt Reviewed-by: David Gibson [clg: previous commit 26a7f1291bb5 did not include the LPCR setting as it was n

[Qemu-devel] [PATCH v2 09/10] ppc: Move exception generation code out of line

From: Benjamin Herrenschmidt There's no point inlining this, if you hit the exception case you exit anyway, and not inlining saves about 100K of code size (and cache footprint). Signed-off-by: Benjamin Herrenschmidt [clg: removed '__attribute__((noinline))' from original patch ] Signed-off-by:

[Qemu-devel] [PATCH v2 08/10] ppc: Turn a bunch of booleans from int to bool

From: Benjamin Herrenschmidt Signed-off-by: Benjamin Herrenschmidt Reviewed-by: David Gibson Signed-off-by: Cédric Le Goater --- target-ppc/translate.c | 37 ++--- 1 file changed, 18 insertions(+), 19 deletions(-) diff --git a/target-ppc/translate.c b/target-p

[Qemu-devel] [PATCH v2 06/10] ppc: Rework generation of priv and inval interrupts

From: Benjamin Herrenschmidt Recent server processors use the Hypervisor Emulation Assistance interrupt for illegal instructions and *some* type of SPR accesses. Also the code was always generating inval instructions even for priv violations due to setting the wrong flags Finally, the checking

[Qemu-devel] [PATCH v2 01/10] ppc: Fix rfi/rfid/hrfi/... emulation

From: Benjamin Herrenschmidt This reworks emulation of the various "rfi" variants. I removed some masking bits that I couldn't make sense of, the only bit that I am aware we should mask here is POW, the CPU's MSR mask should take care of the rest. This also fixes some problems when running 32-bi

[Qemu-devel] [PATCH v2 00/10] rework exception model to support the HV mode

Hello, Here is a new set bringing more changes required for the powernv platform. The major one is the rework of the exception model to support the HV mode. It was tested with a pseries guest, KVM and TCG, and with a mac99 guest ! The next serie will cover a rework of XICS to support native mode

Re: [Qemu-devel] [PATCH 1/3] qmp: Add query-host-cpu command

On 06/20/2016 02:12 PM, Eduardo Habkost wrote: > The command can be used to return host-specific CPU capabilities > information. > > Signed-off-by: Eduardo Habkost > --- > include/sysemu/arch_init.h | 1 + > qapi-schema.json | 36 > qmp

Re: [Qemu-devel] [PATCH v2 1/1] mirror: fix trace_mirror_yield_in_flight usage in mirror_iteration()

On 06/21/2016 08:09 AM, Denis V. Lunev wrote: > trace_mirror_yield_in_flight accepts 2nd arguments in sectors while here > we pass chunks instead. > > Signed-off-by: Denis V. Lunev > CC: Jeff Cody > CC: Kevin Wolf > CC: Max Reitz > --- > Changes from v1: > - proper persons added to CC list >

Re: [Qemu-devel] [PATCH 04/15] block: Simplify find_block_job() and make it accept a job ID

On 06/21/2016 06:27 AM, Alberto Garcia wrote: > On Mon 20 Jun 2016 08:53:08 PM CEST, Eric Blake wrote: >>> +static BlockJob *find_block_job(const char *id, const char *device, >>> +AioContext **aio_context, Error **errp) >> >> Can this signature just be const char *i

Re: [Qemu-devel] [PATCH 1/3] Mediated device Core driver

On Mon, 20 Jun 2016 22:01:46 +0530 Kirti Wankhede wrote: > Design for Mediated Device Driver: > Main purpose of this driver is to provide a common interface for mediated > device management that can be used by differnt drivers of different > devices. > > This module provides a generic interface

Re: [Qemu-devel] [RFC 00/28] s390x CPU models: exposing features

On Tue, Jun 21, 2016 at 11:09:49PM +0200, Jiri Denemark wrote: [...] > > 1) "query-cpu-model-expansion model=host" vs "query-host-cpu": > > > > I still don't think we want to set in stone that "the result the > > guest sees when using -cpu host" is always the same as "what the > > host supports ru

Re: [Qemu-devel] [RFC 00/28] s390x CPU models: exposing features

On Tue, Jun 21, 2016 at 17:33:09 -0300, Eduardo Habkost wrote: > On Tue, Jun 21, 2016 at 07:01:44PM +0200, David Hildenbrand wrote: > > > (CCing libvirt people) > > > > > > On Tue, Jun 21, 2016 at 03:02:05PM +0200, David Hildenbrand wrote: > > > > This is our second attempt to implement CPU models

Re: [Qemu-devel] [RFC 00/28] s390x CPU models: exposing features

On Tue, Jun 21, 2016 at 13:44:31 -0300, Eduardo Habkost wrote: > (CCing libvirt people) > > On Tue, Jun 21, 2016 at 03:02:05PM +0200, David Hildenbrand wrote: > > This is our second attempt to implement CPU models for s390x. We realized > > that we also want to have features exposed via the CPU mo

Re: [Qemu-devel] [RFC 00/28] s390x CPU models: exposing features

On Tue, Jun 21, 2016 at 07:01:44PM +0200, David Hildenbrand wrote: > > (CCing libvirt people) > > > > On Tue, Jun 21, 2016 at 03:02:05PM +0200, David Hildenbrand wrote: > > > This is our second attempt to implement CPU models for s390x. We realized > > > that we also want to have features exposed

Re: [Qemu-devel] [RFC 06/28] s390x/cpumodel: introduce CPU feature group definitions

On 21.06.2016 15:02, David Hildenbrand wrote: > Let's use the generated groups to create feature group representations for > the user. These groups can later be used to enable/disable multiple > features in one shot and will be used to reduce the amount of reported > features to the user if all sub

[Qemu-devel] [PATCH v1 2/2] cadence_gem: Set the last bit when wrap is set

The Cadence GEM data sheet says: "Wrap - marks last descriptor in transmit buffer descriptor list. This can be set for any buffer within the frame." which seems to imply that when the wrap bit is set so is the last bit. Previously if the wrap bit is set, but the last is not then QEMU will enter an

[Qemu-devel] [PATCH v1 0/2] Cadence GEM bug fixes

Alistair Francis (2): cadence_gem: Avoid infinite loops with a misconfigured buffer cadence_gem: Set the last bit when wrap is set hw/net/cadence_gem.c | 13 + 1 file changed, 13 insertions(+) -- 2.7.4

[Qemu-devel] [PATCH v1 1/2] cadence_gem: Avoid infinite loops with a misconfigured buffer

A guest can write zero to the DMACFG resulting in an infinite loop when it reaches the while(bytes_to_copy) loop. To avoid this issue enforce a minimum size for the RX buffer. Hardware does not have this enforcement and relies on the guest to set a non-zero value. Signed-off-by: Alistair Francis

Re: [Qemu-devel] [PATCH v3 00/20] GICv3 emulation

On 21 June 2016 at 20:45, Laszlo Ersek wrote: > On 06/21/16 19:21, Peter Maydell wrote: >> and add a note I forgot to mention: my primary hypothesis is that >> the problem here is "guest does not write to the GICD_IGROUPR and >> GICR_IGROUPR registers to program the interrupts it's using as >> gro

Re: [Qemu-devel] [PATCH 1/3] linux-user: Check sigsetsize argument to syscalls

On 21 June 2016 at 20:09, Laurent Vivier wrote: > > > Le 20/06/2016 à 16:50, Peter Maydell a écrit : >> Many syscalls which take a sigset_t argument also take an argument >> giving the size of the sigset_t. The kernel insists that this >> matches its idea of the type size and fails EINVAL if it i

Re: [Qemu-devel] [PATCH v2 6/6] hw/arm/virt: Set minimum_page_bits to 12

On 21 June 2016 at 19:45, Andrew Jones wrote: > On Tue, Jun 21, 2016 at 06:09:34PM +0100, Peter Maydell wrote: >> Since the virt board model will never create a CPU which is >> pre-ARMv7, we know that our minimum page size is 4K and can >> set minimum_page_bits accordingly, for improved performanc

Re: [Qemu-devel] [PATCH 0/6] linux-user: safe_syscall updates

On 21 June 2016 at 20:08, Riku Voipio wrote: > I've merged all pending patches except the safe_syscall ones to: > > https://git.linaro.org/people/riku.voipio/qemu.git/shortlog/refs/heads/linux-user-for-upstream > > Peter, Richard, do you have an agreement who's versions of > the safe_syscall patch

Re: [Qemu-devel] [PATCH v3 00/20] GICv3 emulation

On 06/21/16 19:21, Peter Maydell wrote: > On 21 June 2016 at 18:18, Andrew Jones wrote: >> >> Why oh why does mutt ask me who to CC after composing the mail instead >> of before (after is when I've forgotten...) Maybe there's some config >> I can change. OK, this time with Ard really on CC. > > H

Re: [Qemu-devel] [PATCH v2 4/6] cpu: Support a target CPU having a variable page size

On 21 June 2016 at 19:26, Andrew Jones wrote: > On Tue, Jun 21, 2016 at 06:09:32PM +0100, Peter Maydell wrote: >> --- a/include/qemu-common.h >> +++ b/include/qemu-common.h >> @@ -76,6 +76,19 @@ void tcg_exec_init(unsigned long tb_size); >> bool tcg_enabled(void); >> >> void cpu_exec_init_all(vo

Re: [Qemu-devel] [PATCH v6 06/13] register: Add block initialise helper

On 21 June 2016 at 19:25, Alistair Francis wrote: > On Fri, Jun 10, 2016 at 4:02 AM, Peter Maydell > wrote: >>> +/** >>> + * Init a block of consecutive registers into a container MemoryRegion. A >>> + * number of constant register definitions are parsed to create a >>> corresponding >>> + * ar

[Qemu-devel] Default for phys-addr-bits? (was Re: [PATCH 4/5] x86: Allow physical address bits to be set)

On Fri, Jun 17, 2016 at 12:49:05PM -0300, Eduardo Habkost wrote: > On Fri, Jun 17, 2016 at 05:28:03PM +0200, Paolo Bonzini wrote: > > On 17/06/2016 17:19, Eduardo Habkost wrote: > > > > > So, what happens if the guest play tricks in bits 40-45 when QEMU > > > > > sets the limit to 40 but we are run

Re: [Qemu-devel] [RFC v3 PATCH 01/14] Introduce TCGOpcode for memory barrier

On 06/21/2016 11:23 AM, Alex Bennée wrote: If you think I should rebase on mainine, I will do so with the changes you suggested above. Well I'll be guided by what Richard thinks about the chances of this merging ahead of the main MTTCG patches. You were mentioning the trouble with testing with

[Qemu-devel] [PATCH 13/13] virtio: Update migration docs

From: "Dr. David Alan Gilbert" Remove references to register_savevm. Signed-off-by: Dr. David Alan Gilbert --- docs/virtio-migration.txt | 6 -- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/docs/virtio-migration.txt b/docs/virtio-migration.txt index cf66458..98a6b0f 100644

[Qemu-devel] [PATCH 12/13] virtio-gpu: Wrap in vmstate

From: "Dr. David Alan Gilbert" Forcibly convert it to a vmstate wrapper; proper conversion comes later. Signed-off-by: Dr. David Alan Gilbert --- hw/display/virtio-gpu.c | 17 +++-- 1 file changed, 7 insertions(+), 10 deletions(-) diff --git a/hw/display/virtio-gpu.c b/hw/display

Re: [Qemu-devel] [PATCH 1/6] linux-user: fix x86_64 safe_syscall

On Mon, Jun 13, 2016 at 02:45:21PM -0700, Richard Henderson wrote: > Do what the comment says, test for signal_pending non-zero, > rather than the current coe which tests for bit 0 non-zero. Applied to linux-user with the type fixed, Thanks > Signed-off-by: Richard Henderson > --- > linux-user/

Re: [Qemu-devel] [PATCH] linux-user, trivial: display "0x%x" instead of "0x%d"

On Mon, Jun 20, 2016 at 11:51:32AM +0200, Laurent Vivier wrote: > Display an exception number, generally defined as an hexadecimal > number (for instance, EXCP_HLT is 0x10001). Acked-by: Riku Voipio > Signed-off-by: Laurent Vivier > --- > Resent to fix qemu-trivial email address. > > linux-us

[Qemu-devel] [PATCH 02/13] virtio-serial: Remove old migration version support

From: "Dr. David Alan Gilbert" virtio-serial-bus has had version 3 since 37f95bf3d0 in 0.13-rc0; it's time to clean it up a bit. Signed-off-by: Dr. David Alan Gilbert --- hw/char/virtio-serial-bus.c | 37 +++-- 1 file changed, 15 insertions(+), 22 deletions(-)

[Qemu-devel] [PATCH 06/13] virtio-rng: Wrap in vmstate

From: "Dr. David Alan Gilbert" Forcibly convert it to a vmstate wrapper; proper conversion comes later. Signed-off-by: Dr. David Alan Gilbert --- hw/virtio/virtio-rng.c | 20 +--- 1 file changed, 5 insertions(+), 15 deletions(-) diff --git a/hw/virtio/virtio-rng.c b/hw/virtio

[Qemu-devel] [PATCH 09/13] virtio-serial: Wrap in vmstate

From: "Dr. David Alan Gilbert" Forcibly convert it to a vmstate wrapper; proper conversion comes later. Signed-off-by: Dr. David Alan Gilbert --- hw/char/virtio-serial-bus.c | 27 ++- 1 file changed, 6 insertions(+), 21 deletions(-) diff --git a/hw/char/virtio-serial-

[Qemu-devel] [PATCH 11/13] virtio-input: Wrap in vmstate

From: "Dr. David Alan Gilbert" Forcibly convert it to a vmstate wrapper; proper conversion comes later. Signed-off-by: Dr. David Alan Gilbert --- hw/input/virtio-input.c | 26 ++ 1 file changed, 6 insertions(+), 20 deletions(-) diff --git a/hw/input/virtio-input.c b/h

[Qemu-devel] [PATCH 04/13] virtio-scsi: Wrap in vmstate

From: "Dr. David Alan Gilbert" Forcibly convert it to a vmstate wrapper; proper conversion comes later. Signed-off-by: Dr. David Alan Gilbert --- hw/scsi/virtio-scsi.c | 21 ++--- 1 file changed, 6 insertions(+), 15 deletions(-) diff --git a/hw/scsi/virtio-scsi.c b/hw/scsi/vi

[Qemu-devel] [PATCH 08/13] virtio-net: Wrap in vmstate

From: "Dr. David Alan Gilbert" Forcibly convert it to a vmstate wrapper; proper conversion comes later. Signed-off-by: Dr. David Alan Gilbert --- hw/net/virtio-net.c | 17 +++-- 1 file changed, 7 insertions(+), 10 deletions(-) diff --git a/hw/net/virtio-net.c b/hw/net/virtio-net.

[Qemu-devel] [PATCH 07/13] virtio-balloon: Wrap in vmstate

From: "Dr. David Alan Gilbert" Forcibly convert it to a vmstate wrapper; proper conversion comes later. Signed-off-by: Dr. David Alan Gilbert --- hw/virtio/virtio-balloon.c | 19 +-- 1 file changed, 5 insertions(+), 14 deletions(-) diff --git a/hw/virtio/virtio-balloon.c b/hw

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