* Dmitry V. Levin:
> On Thu, Dec 27, 2018 at 06:18:19PM +0100, Florian Weimer wrote:
>> We have a bit of an interesting problem with respect to the d_off
>> field in struct dirent.
>>
>> When running a 64-bit kernel on certain file systems, notably ext4,
>> this field uses the full 63 bits even
On 12/28/2018 4:31 AM, Eduardo Habkost wrote:
On Fri, Dec 21, 2018 at 11:10:30AM -0500, Michael S. Tsirkin wrote:
On Thu, Dec 06, 2018 at 10:32:13AM +0800, Li Zhijian wrote:
/* highest address for loading the initrd */
-if (protocol >= 0x203) {
+if (protocol >= 0x20c &&
+
On Dec 27, 2018, at 10:41 AM, Peter Maydell wrote:
>
> On Thu, 27 Dec 2018 at 17:19, Florian Weimer wrote:
>> We have a bit of an interesting problem with respect to the d_off
>> field in struct dirent.
>>
>> When running a 64-bit kernel on certain file systems, notably ext4,
>> this field
On mercoledì 26 dicembre 2018 13:38:28 CET, Frediano Ziglio wrote:
Yes, this looks like a format string error in the upper (not
into spice) layer.
This potentially is a security problem.
Considering the spice server is exposed to the internet this is definitely
worth investigating.
The
On Thu, Dec 27, 2018 at 01:14:11PM -0200, Eduardo Habkost wrote:
> On Wed, Dec 26, 2018 at 01:30:00PM +0800, Yu Zhang wrote:
> > On Tue, Dec 25, 2018 at 11:56:19AM -0500, Michael S. Tsirkin wrote:
> > > On Sat, Dec 22, 2018 at 09:11:26AM +0800, Yu Zhang wrote:
> > > > On Fri, Dec 21, 2018 at
On Thu, Dec 27, 2018 at 06:18:19PM +0100, Florian Weimer wrote:
> We have a bit of an interesting problem with respect to the d_off
> field in struct dirent.
>
> When running a 64-bit kernel on certain file systems, notably ext4,
> this field uses the full 63 bits even for small directories
> On Dec 27, 2018, at 8:33 AM, Kővágó Zoltán wrote:
>
> Hi,
>
> I've pushed it to my github (modulo some random fixes not yet on the
> mailing list):
> https://github.com/DirtYiCE/qemu/tree/audio-51-2018
>
> I don't have a mac so I have no idea whether it works or not.
>
> Regards,
> Zoltan
Hi John,
On 12/26/18 12:24 PM, Programmingkid wrote:
>> On Dec 23, 2018, at 3:52 PM, qemu-devel-requ...@nongnu.org wrote:
>>
>> Message: 4
>> Date: Sun, 23 Dec 2018 21:51:36 +0100
>> From: "=?UTF-8?q?K=C5=91v=C3=A1g=C3=B3=2C=20Zolt=C3=A1n?="
>>
>> To: qemu-devel@nongnu.org
>> Cc: Gerd
For the record I have no crashes with
-cpu host It works perfectly. Although I can only see 2 cpus in windows
with 4 showing up in devicemanager.
The first link you sent was actually the first thing I tried and I was
already aware of that one.
It made no difference whatsoever.
My bios is
Hi,
On 2018-12-25 11:50, Philippe Mathieu-Daudé wrote:
> On 12/23/18 9:52 PM, Kővágó, Zoltán wrote:
>> With stereo playback, they need about 375 minutes of continuous audio
>> playback to overflow, which is usually not a problem (as stopping and
>> later resuming playback resets the counters).
I resolved it by removing the nic driver detected by windows and
rebooted.
It seems llike the first thing to do after the startup string is
complete is to remove all drivers and then let windows find them again
according to what is available from the startup string switches.
The nic problem
Hi Aleksandar,
On 12/27/18 2:12 PM, Aleksandar Markovic wrote:
> From: Aleksandar Markovic
>
> Reorganize MIPS TCG directories and files. The file movement is done
> using "git mv" command, so "git blame" will still display the original
> information, regardles of the new names and locations of
> From: Aleksandar Markovic
> Subject: [PATCH 0/6] target/mips: Amend MXU support
>
> From: Aleksandar Markovic
>
> Various updates to MXU ASE support.
>
> Aleksandar Markovic (6):
> target/mips: MXU: Add missing opcodes/decoding for LX* instructions
> target/mips: MXU: Add generic naming
> From: Fredrik Noring
> Subject: [PATCH v2 09/12] tests/tcg/mips: Test R5900 three-operand MADDU1
Reviewed-by: Aleksandar Markovic
This patch is selected for integration in the next MIPS pull request scheduled
shortly.
THANKS FOR ALL EFFORTS!
> From: Fredrik Noring
> Subject: [PATCH v2 07/12] tests/tcg/mips: Test R5900 three-operand MADD1
Reviewed-by: Aleksandar Markovic
This patch is selected for integration in the next MIPS pull request scheduled
shortly.
> From: Fredrik Noring
> Subject: [PATCH v2 08/12] tests/tcg/mips: Test R5900 three-operand MADDU
Reviewed-by: Aleksandar Markovic
This patch is selected for integration in the next MIPS pull request scheduled
shortly.
> From: Fredrik Noring
> Subject: [PATCH v2 06/12] tests/tcg/mips: Test R5900 three-operand MADD
Reviewed-by: Aleksandar Markovic
This patch is selected for integration in the next MIPS pull request scheduled
shortly.
> From: Fredrik Noring
> Subject: [PATCH v2 05/12] target/mips: Support R5900 three-operand MADD1 and
> MADDU1
Reviewed-by: Aleksandar Markovic
This patch is selected for integration in the next MIPS pull request scheduled
shortly.
> From: Fredrik Noring
> Subject: [PATCH v2 04/12] target/mips: Support Toshiba specific three-operand
> MADD and MADDU
>
> From: Philippe Mathieu-Daudé
Reviewed-by: Aleksandar Markovic
This patch is selected for integration in the next MIPS pull request scheduled
shortly.
On Tue, Dec 25, 2018 at 01:20:05PM +0800, Peter Xu wrote:
> On Mon, Dec 24, 2018 at 06:52:35AM -0500, Wainer dos Santos Moschetta wrote:
> > Allows to access the kernel-irqchip property of a Machine
> > Class object via QOM get method.
> >
> > Before this patch the property cannot be read
On Fri, Dec 21, 2018 at 11:10:30AM -0500, Michael S. Tsirkin wrote:
> On Thu, Dec 06, 2018 at 10:32:13AM +0800, Li Zhijian wrote:
> > a new field xloadflags was added to recent x86 linux, and BIT 1:
> > XLF_CAN_BE_LOADED_ABOVE_4G is used to tell bootload that where initrd can be
> > loaded safely.
> From: Janeczek, Craig
> > +/* return resulting byte to its original position */
> > +tcg_gen_shri_i32(t0, t0, 24);
>
> Should be a shift of 16 here
> tcg_gen_shri_i32(t0, t0, 16);
You are right, for this and the next three hints. Will be fixed in v2.
Thanks,
Aleksandar
> From: Janeczek, Craig
>
> Yes, both the comment and enum should be updated.
OK, this will be fixed in v2.
Thanks,
Aleksandar
Yes, both the comment and enum should be updated.
-Original Message-
From: Aleksandar Markovic
Sent: Thursday, December 27, 2018 2:23 PM
To: Janeczek, Craig ; Stefan Markovic
; Aleksandar Markovic ;
qemu-devel@nongnu.org
Subject: Re: [PATCH 1/6] target/mips: MXU: Add missing
> From: Janeczek, Craig
> Sent: Thursday, December 27, 2018 7:50 PM
> To: Aleksandar Markovic; Stefan Markovic; Aleksandar Markovic;
> qemu-devel@nongnu.org
> Subject: RE: [PATCH 1/6] target/mips: MXU: Add missing opcodes/decoding for
> LX* instructions
>
> Yes built a binary testing these
Yes built a binary testing these instructions and ran it against HW along with
a qemu binary with your patches. The opcodes align with what I mentioned in the
email.
-Original Message-
From: Aleksandar Markovic
Sent: Thursday, December 27, 2018 1:44 PM
To: Janeczek, Craig ; Stefan
Hi Michael,
On Thu, Dec 27, 2018 at 12:53 PM Michael Hanselmann wrote:
The "eeprom_write_data" function in "smbus_eeprom.c" had no provisions
to limit the length of data written. If a caller were able to manipulate
the "len" parameter they could potentially write before or after the
target
Sorry, my last message involving this thread was sent in error. It was meant to
be a a response to another, unrelated, message. Please discard it.
Aleksandar
> > @@ -1663,12 +1663,21 @@ enum {
> >* │ 20..18
> >* ├─ 100111 ─ OPC_MXU__POOL16 ─┬─ 000 ─ OPC_MXU_D32SARW
> >* │├─ 001 ─ OPC_MXU_S32ALN
> > - * ├─ 101000 ─ OPC_MXU_LXB ├─ 010 ─
> > @@ -1663,12 +1663,21 @@ enum {
> >* │ 20..18
> >* ├─ 100111 ─ OPC_MXU__POOL16 ─┬─ 000 ─ OPC_MXU_D32SARW
> >* │├─ 001 ─ OPC_MXU_S32ALN
> > - * ├─ 101000 ─ OPC_MXU_LXB ├─ 010 ─
* Adhemerval Zanella:
> Also for glibc standpoint, although reverting it back to use getdents
> syscall for non-LFS mode might fix this issue for architectures that
> provides non-LFS getdents syscall it won't be a fix for architectures
> that still provides off_t different than off64_t *and*
On 27/12/2018 15:18, Florian Weimer wrote:
> We have a bit of an interesting problem with respect to the d_off
> field in struct dirent.
>
> When running a 64-bit kernel on certain file systems, notably ext4,
> this field uses the full 63 bits even for small directories (strace -v
> output,
* Andy Lutomirski:
>> On Dec 27, 2018, at 10:18 AM, Florian Weimer wrote:
>>
>> We have a bit of an interesting problem with respect to the d_off
>> field in struct dirent.
>>
>> When running a 64-bit kernel on certain file systems, notably ext4,
>> this field uses the full 63 bits even for
On Thu, 27 Dec 2018 at 17:19, Florian Weimer wrote:
> We have a bit of an interesting problem with respect to the d_off
> field in struct dirent.
>
> When running a 64-bit kernel on certain file systems, notably ext4,
> this field uses the full 63 bits even for small directories (strace -v
>
> On Dec 27, 2018, at 10:18 AM, Florian Weimer wrote:
>
> We have a bit of an interesting problem with respect to the d_off
> field in struct dirent.
>
> When running a 64-bit kernel on certain file systems, notably ext4,
> this field uses the full 63 bits even for small directories (strace
23.04.2018 16:28, Pedro Alves wrote:
> On 04/23/2018 02:37 AM, Simon Marchi wrote:
>> On 2018-04-09 10:08 PM, Stefan Hajnoczi wrote:
>>> I wonder what the point of select-frame is then...
>>>
>>> I have CCed the GDB mailing list. Maybe someone can help us. Context:
>>>
>>> QEMU implements
On 17.12.18. 21:04, Aleksandar Markovic wrote:
> From: Aleksandar Markovic
>
> Add translation handlers for max/min MXU instructions.
>
> Signed-off-by: Aleksandar Markovic
> ---
> target/mips/translate.c | 356 +---
> 1 file changed, 335 insertions(+), 21
We have a bit of an interesting problem with respect to the d_off
field in struct dirent.
When running a 64-bit kernel on certain file systems, notably ext4,
this field uses the full 63 bits even for small directories (strace -v
output, wrapped here for readability):
getdents(3, [
On 17.12.18. 21:04, Aleksandar Markovic wrote:
> From: Aleksandar Markovic
>
> Add missing opcodes and decoding engine for LXB, LXH, LXW, LXBU, and
> LXHU instructions. They were for some reason forgotten in previous
> commits. The MXU opcode list and decoding engine should be now
> complete.
> On 12/5/18 11:11 PM, Paul Burton wrote:
> ATOMIC_REG_SIZE is currently defined as the default sizeof(void *) for
> all MIPS host builds, including those using the n32 ABI. n32 is the
> MIPS64 ILP32 ABI and as such tcg/mips/tcg-target.h defines
> TCG_TARGET_REG_BITS as 64 for n32 builds. If we
Hi Alex,
On 12/27/2018 10:20 PM, Alex Williamson wrote:
> On Thu, 27 Dec 2018 20:30:48 +0800
> Dongli Zhang wrote:
>
>> Hi Alex,
>>
>> On 12/02/2018 09:29 AM, Dongli Zhang wrote:
>>> Hi Alex,
>>>
>>> On 12/02/2018 03:29 AM, Alex Williamson wrote:
On Sat, 1 Dec 2018 10:52:21 -0800 (PST)
On Wed, Dec 26, 2018 at 01:30:00PM +0800, Yu Zhang wrote:
> On Tue, Dec 25, 2018 at 11:56:19AM -0500, Michael S. Tsirkin wrote:
> > On Sat, Dec 22, 2018 at 09:11:26AM +0800, Yu Zhang wrote:
> > > On Fri, Dec 21, 2018 at 02:02:28PM -0500, Michael S. Tsirkin wrote:
> > > > On Sat, Dec 22, 2018 at
> From: Aleksandar Markovic
> Sent: Thursday, December 27, 2018 3:22 PM
> To: qemu-devel@nongnu.org
> Cc: aurel...@aurel32.net; Aleksandar Markovic; Stefan Markovic; Aleksandar
> Rikalo
> Subject: [PATCH v6 00/26] disas: nanoMIPS: Clean up several issues
>
> From: Aleksandar Markovic
>
> Clean
> From: Aleksandar Markovic
> Subject: [PATCH v6 04/26] disas: nanoMIPS: Fix order of some invocations
> Fix order of extraction function invocations so that extraction
goes from MSB side to LSB side of the given instruction coding
content. This is desireable because of consistency and easier
On Fri, Dec 21, 2018 at 03:13:25PM +0100, Igor Mammedov wrote:
> On Thu, 20 Dec 2018 19:18:01 -0200
> Eduardo Habkost wrote:
>
> > On Wed, Dec 19, 2018 at 11:40:37AM +0100, Igor Mammedov wrote:
> > > On Wed, 19 Dec 2018 10:57:17 +0800
> > > Yu Zhang wrote:
> > >
> > > > On Tue, Dec 18, 2018
From: Aleksandar Markovic
Fix order of extraction function invocations so that extraction
goes from MSB side to LSB side of the given instruction coding
content. This is desireable because of consistency and easier
visual spotting of errors.
After this patch, all such invocations should be in
From: Aleksandar Markovic
Reorder declarations and definitions of gpr decoders by number of
input bits of vorresponding encoding type.
Signed-off-by: Aleksandar Markovic
---
disas/nanomips.cpp | 200 ++---
disas/nanomips.h | 7 +-
2 files
replace a bunch of ACPI_READ_ARRAY/ACPI_READ_FIELD macro, that read
SMBIOS table field by field with one memread() to fetch whole table
at once and drop no longer used ACPI_READ_ARRAY/ACPI_READ_FIELD macro.
Signed-off-by: Igor Mammedov
---
V2:
rebase: s/memread/qtest_memread/
---
From: Aleksandar Markovic
Rename the decoder of 'gpr4.zero' gpr encoding type in nanoMIPS
disassembler.
Signed-off-by: Aleksandar Markovic
---
disas/nanomips.cpp | 10 +-
disas/nanomips.h | 2 +-
2 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/disas/nanomips.cpp
From: Aleksandar Markovic
Comment the decoder of 'gpr1' gpr encoding type in nanoMIPS
disassembler.
Signed-off-by: Aleksandar Markovic
---
disas/nanomips.cpp | 21 +
1 file changed, 21 insertions(+)
diff --git a/disas/nanomips.cpp b/disas/nanomips.cpp
index
some parts of sanitize_fadt_ptrs() do redundant job
- locating FADT
- checking original checksum
There is no need to do it as test_acpi_fadt_table() already does that,
so drop duplicate code and move remaining fixup code into
test_acpi_fadt_table().
Signed-off-by: Igor Mammedov
---
From: Aleksandar Markovic
Comment the decoder of 'gpr4.zero' gpr encoding type in nanoMIPS
disassembler.
Signed-off-by: Aleksandar Markovic
---
disas/nanomips.cpp | 27 +++
1 file changed, 27 insertions(+)
diff --git a/disas/nanomips.cpp b/disas/nanomips.cpp
index
Move fetch_table() into acpi-utils.c renaming it to acpi_fetch_table()
and reuse it in vmgenid-test that reads RSDT and then tables it references,
to find and parse VMGNEID SSDT.
While at it wrap RSDT referenced tables enumeration into FOREACH macro
(similar to what we do with QLIST_FOREACH & co)
It allows to remove a bit more of code duplication and
reuse common utility to get ACPI tables from guest (modulo RSDP).
While at it, consolidate signature checking into fetch_table() instead
of open-codding it.
Considering FACS is special and doesn't have checksum, make checksum
validation
From: Aleksandar Markovic
Rename the decoder of 'gpr2.reg2' gpr encoding type in nanoMIPS
disassembler.
Signed-off-by: Aleksandar Markovic
---
disas/nanomips.cpp | 6 +++---
disas/nanomips.h | 2 +-
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/disas/nanomips.cpp
From: Aleksandar Markovic
Rename the decoder of 'gpr4' gpr encoding type in nanoMIPS
disassembler.
Signed-off-by: Aleksandar Markovic
---
disas/nanomips.cpp | 20 ++--
disas/nanomips.h | 2 +-
2 files changed, 11 insertions(+), 11 deletions(-)
diff --git
AcpiSdtTable::header::signature is the only remained field from
AcpiTableHeader structure used by tests. Instead of using packed
structure to access signature, just read it directly from table
blob and remove no longer used AcpiSdtTable::header / union and
keep only AcpiSdtTable::aml byte array.
From: Aleksandar Markovic
Add "nanoMIPS32 Instruction Set Technical Reference Manual" as
a reference.
Signed-off-by: Aleksandar Markovic
---
disas/nanomips.cpp | 7 +++
1 file changed, 7 insertions(+)
diff --git a/disas/nanomips.cpp b/disas/nanomips.cpp
index ea902f9..fa3beb6 100644
---
From: Aleksandar Markovic
Rename the decoder of 'gpr3.src.store' gpr encoding type in nanoMIPS
disassembler.
Signed-off-by: Aleksandar Markovic
---
disas/nanomips.cpp | 10 +-
disas/nanomips.h | 2 +-
2 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/disas/nanomips.cpp
From: Aleksandar Markovic
Rename the decoder of 'gpr1' gpr encoding type in nanoMIPS
disassembler.
Signed-off-by: Aleksandar Markovic
---
disas/nanomips.cpp | 4 ++--
disas/nanomips.h | 2 +-
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/disas/nanomips.cpp
From: Aleksandar Markovic
Comment the decoder of 'gpr2.reg2' gpr encoding type in nanoMIPS
disassembler.
Signed-off-by: Aleksandar Markovic
---
disas/nanomips.cpp | 22 ++
1 file changed, 22 insertions(+)
diff --git a/disas/nanomips.cpp b/disas/nanomips.cpp
index
From: Aleksandar Markovic
Comment the decoder of 'gpr2.reg1' gpr encoding type in nanoMIPS
disassembler.
Signed-off-by: Aleksandar Markovic
---
disas/nanomips.cpp | 22 ++
1 file changed, 22 insertions(+)
diff --git a/disas/nanomips.cpp b/disas/nanomips.cpp
index
Currently in the 1st case we store table body fetched from QEMU in
AcpiSdtTable::aml minus it's header but in the 2nd case when we
load reference aml from disk, it holds whole blob including header.
More over in the 1st case, we read header in separate AcpiSdtTable::header
structure and then jump
From: Aleksandar Markovic
Comment the decoder of 'gpr3.src.store' gpr encoding type in nanoMIPS
disassembler.
Signed-off-by: Aleksandar Markovic
---
disas/nanomips.cpp | 32
1 file changed, 32 insertions(+)
diff --git a/disas/nanomips.cpp b/disas/nanomips.cpp
From: Aleksandar Markovic
Rename the decoder of 'gpr2.reg1' gpr encoding type in nanoMIPS
disassembler.
Signed-off-by: Aleksandar Markovic
---
disas/nanomips.cpp | 6 +++---
disas/nanomips.h | 2 +-
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/disas/nanomips.cpp
RSDT referenced tables always have length at offset 4 and checksum at
offset 9, that's enough for reusing fetch_table() and replacing custom
RSDT fetching code with it.
While at it
* merge fetch_rsdt_referenced_tables() into test_acpi_rsdt_table()
* drop
Changes since v1:
* rebase on top of current master due to a lots of conflicts with
'qtest global' removal being merged first
* drop explicit cast to uint8_t* as sdt->aml is uint8_t* now
* drop not comment explaining strange offsets as offsets are
now follow ACPI spec
While working
From: Aleksandar Markovic
Comment the decoder of 'gpr3' gpr encoding type in nanoMIPS
disassembler.
Signed-off-by: Aleksandar Markovic
---
disas/nanomips.cpp | 51 ---
1 file changed, 48 insertions(+), 3 deletions(-)
diff --git
From: Aleksandar Markovic
Comment the decoder of 'gpr4' gpr encoding type in nanoMIPS
disassembler.
Signed-off-by: Aleksandar Markovic
---
disas/nanomips.cpp | 26 ++
1 file changed, 26 insertions(+)
diff --git a/disas/nanomips.cpp b/disas/nanomips.cpp
index
From: Aleksandar Markovic
Rename NMD::extract_ft_20_19_18_17_16(uint64 instruction) to
NMD::extract_ft_25_24_23_22_21(uint64 instruction).
Signed-off-by: Aleksandar Markovic
---
disas/nanomips.cpp | 258 ++---
disas/nanomips.h | 2 +-
2
From: Aleksandar Markovic
Rename more functions that have names that are hard to understand.
Signed-off-by: Aleksandar Markovic
---
disas/nanomips.cpp | 212 ++---
disas/nanomips.h | 28 +++
2 files changed, 120 insertions(+), 120
Whole FADT is fetched as part of RSDT referenced tables in
fetch_rsdt_referenced_tables() albeit a bit later than when FADT
is partially parsed in fadt_fetch_facs_and_dsdt_ptrs().
However there is no reason for calling fetch_rsdt_referenced_tables()
so late, just move it right after we fetched
From: Aleksandar Markovic
Rename NMD::extract_fs_15_14_13_12_11(uint64 instruction) to
NMD::extract_fs_20_19_18_17_16(uint64 instruction).
Signed-off-by: Aleksandar Markovic
---
disas/nanomips.cpp | 242 ++---
disas/nanomips.h | 2 +-
2
From: Aleksandar Markovic
Fix wrong function name. The convention in these files is that names of
extraction functions should reflect bit patterns they are extracting.
Reviewed-by: Stefan Markovic
Signed-off-by: Aleksandar Markovic
---
disas/nanomips.cpp | 264
From: Aleksandar Markovic
Rename NMD::extract_fd_10_9_8_7_6(uint64 instruction) to
NMD::extract_fd_15_14_13_12_11(uint64 instruction).
Signed-off-by: Aleksandar Markovic
---
disas/nanomips.cpp | 142 ++---
disas/nanomips.h | 2 +-
2 files
From: Aleksandar Markovic
Rename some functions that have names that are hard to understand.
Reviewed-by: Stefan Markovic
Signed-off-by: Aleksandar Markovic
---
disas/nanomips.cpp | 112 ++---
disas/nanomips.h | 32 +++
2 files
From: Aleksandar Markovic
Rename the decoder of 'gpr3' gpr encoding type in nanoMIPS
disassembler.
Signed-off-by: Aleksandar Markovic
---
disas/nanomips.cpp | 96 +++---
disas/nanomips.h | 2 +-
2 files changed, 49 insertions(+), 49
From: Aleksandar Markovic
Clean up several misc issues in nanoMIPS disassembler. There are
more issues to be cleaned, and this is meant to be just the first
phase. Complete cleanup should happen over the course of next
few months.
All these changes should not and do not affect any
From: Aleksandar Markovic
Fix several mistakes in preambles of nanomips disassembler source
files.
Reviewed-by: Stefan Markovic
Signed-off-by: Aleksandar Markovic
---
disas/nanomips.cpp | 7 ---
disas/nanomips.h | 7 ---
2 files changed, 8 insertions(+), 6 deletions(-)
diff --git
From: Aleksandar Markovic
Some functions were not used at all. Compiler doesn't complain
since they are class memebers. Remove them - no future usage is
planned.
Reviewed-by: Stefan Markovic
Signed-off-by: Aleksandar Markovic
---
disas/nanomips.cpp | 208
On Thu, 27 Dec 2018 20:30:48 +0800
Dongli Zhang wrote:
> Hi Alex,
>
> On 12/02/2018 09:29 AM, Dongli Zhang wrote:
> > Hi Alex,
> >
> > On 12/02/2018 03:29 AM, Alex Williamson wrote:
> >> On Sat, 1 Dec 2018 10:52:21 -0800 (PST)
> >> Dongli Zhang wrote:
> >>
> >>> Hi,
> >>>
> >>> I obtained
> From: Aleksandar Markovic
> Sent: Thursday, December 27, 2018 2:18 PM
> To: Aleksandar Markovic; qemu-devel@nongnu.org; Aleksandar Rikalo
> Cc: aurel...@aurel32.net; Stefan Markovic
> Subject: Re: [PATCH v5 12/20] disas: nanoMIPS: Clean up handling of 16-bit
> logic instructions
>
> > From:
Hi,
I've pushed it to my github (modulo some random fixes not yet on the
mailing list):
https://github.com/DirtYiCE/qemu/tree/audio-51-2018
I don't have a mac so I have no idea whether it works or not.
Regards,
Zoltan
On 2018-12-26 12:24, Programmingkid wrote:
>
>> On Dec 23, 2018, at 3:52
> From: Aleksandar Markovic
> Subject: [PATCH v5 12/20] disas: nanoMIPS: Clean up handling of 16-bit logic
> instructions
> Clean up handling of 16-bit logic nanoMIPS instructions:
...
>
> -return img::format("AND %s, %s", rs3, rt3);
> +return img::format("AND[16] %s, %s", rs3, rt3);
From: Aleksandar Markovic
Remove old directories after reorganization of MIPS TCG tests.
Signed-off-by: Aleksandar Markovic
---
tests/tcg/mips/mips32-dsp/Makefile| 136 -
tests/tcg/mips/mips32-dspr2/Makefile | 71 ---
tests/tcg/mips/mips64-dsp/Makefile|
From: Aleksandar Markovic
Reorganize MIPS TCG directories and files. The file movement is done
using "git mv" command, so "git blame" will still display the original
information, regardles of the new names and locations of involved
files.
Aleksandar Markovic (2):
tests: tcg: mips: Move source
> From: Aleksandar Markovic
> Sent: Wednesday, December 26, 2018 6:15 PM
> To: qemu-devel@nongnu.org
> Cc: aurel...@aurel32.net; Paul Burton; hpous...@reactos.org;
> jho...@kernel.org; Aleksandar Markovic; Stefan Markovic; > Aleksandar Rikalo
> Subject: [PATCH v3 4/4] MAINTAINERS: Add Aleksandar
On 2018-12-25 11:40, Philippe Mathieu-Daudé wrote:
> On 12/24/18 9:48 PM, Kővágó Zoltán wrote:
>> On 2018-12-24 18:16, Philippe Mathieu-Daudé wrote:
>>> On 12/24/18 3:16 AM, Zoltán Kővágó wrote:
Hi Phil,
On 2018-12-24 00:49, Philippe Mathieu-Daudé wrote:
> Hi Zoltán,
>
>
Hi Alex,
On 12/02/2018 09:29 AM, Dongli Zhang wrote:
> Hi Alex,
>
> On 12/02/2018 03:29 AM, Alex Williamson wrote:
>> On Sat, 1 Dec 2018 10:52:21 -0800 (PST)
>> Dongli Zhang wrote:
>>
>>> Hi,
>>>
>>> I obtained below error when assigning an intel 760p 128GB nvme to guest via
>>> vfio on my
Hi Alex,
On 12/02/2018 09:29 AM, Dongli Zhang wrote:
> Hi Alex,
>
> On 12/02/2018 03:29 AM, Alex Williamson wrote:
>> On Sat, 1 Dec 2018 10:52:21 -0800 (PST)
>> Dongli Zhang wrote:
>>
>>> Hi,
>>>
>>> I obtained below error when assigning an intel 760p 128GB nvme to guest via
>>> vfio on my
The "eeprom_write_data" function in "smbus_eeprom.c" had no provisions
to limit the length of data written. If a caller were able to manipulate
the "len" parameter they could potentially write before or after the
target buffer.
---
hw/i2c/smbus_eeprom.c | 1 +
1 file changed, 1 insertion(+)
diff
HI, Alex, just a heads up that I plan to submit directory and file
reorganization of tests/tcg/mips mini patch series today or tomorrow.
Aleksandar
On Wednesday, December 19, 2018, Alex Bennée wrote:
>
> Aleksandar Markovic writes:
>
> > On Dec 10, 2018 4:29 PM, "Alex Bennée" wrote:
> >>
> >>
> Since I do not have networking sorted out yet I cannot update win7 pro, and
> it
might be the updates which are needed for allowing more than two cpus.
hm, brief search on my side resulted in this tip:
On Sat, Dec 22, 2018 at 05:27:28PM +0800, jiangyiwen wrote:
> On 2018/12/11 1:31, Dr. David Alan Gilbert (git) wrote:
> > From: "Dr. David Alan Gilbert"
> >
> > Hi,
> > This is the first RFC for the QEMU side of 'virtio-fs';
> > a new mechanism for mounting host directories into the guest
> >
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