Disclaimer: This is just an RFC.
It's more an illustration-patch than real patch. And I didn't verify the
possible side effects!
Currently, it's possible to call this function during migration.
And so, to have a race condition between migration thread and main
thread.
It seems that all calls of
Hi,
I found that it's possible to remove a RAMBlock during migration.
E.g. device hot-unplugging initiated by a guest (how to reproduce is below).
And I want to clarify whether RAMBlock removing (or even adding) during
migration is valid operation or it's a bug.
Currently, it may cause some race
On 12/8/19 10:42 PM, Michal Simek wrote:
Hi, +Edgar
On 08. 12. 19 23:38, Guenter Roeck wrote:
On Fri, Oct 18, 2019 at 06:07:31PM +0200, Michael Tretter wrote:
From: Rajan Vaja
Add firmware DT node in ZynqMP device tree. This node
uses bindings as per new firmware interface driver.
Add which features are added or removed in this version. Remove the
changed model-id in versioned CPU models.
Signed-off-by: Tao Xu
---
Changes in v2:
- correct the note of Cascadelake v3 (Xiaoyao)
---
target/i386/cpu.c | 50 +++
1 file changed,
Because MPX is being removed from the linux kernel, remove MPX feature
from Denverton.
Signed-off-by: Tao Xu
---
target/i386/cpu.c | 12
1 file changed, 12 insertions(+)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 69f518a21a..06a3077f95 100644
--- a/target/i386/cpu.c
This series of patches will remove MPX from Denverton, remove Remove
monitor from some CPU models. Add additional information for -cpu help
to indicate the changes in this version of CPU model.
The output is as follows:
./x86_64-softmmu/qemu-system-x86_64 -cpu help | grep "\["
x86 Broadwell-v2
Add new version of Snowridge, Denverton, Opteron_G3, EPYC, and Dhyana
CPU model to remove MONITOR/MWAIT feature.
After QEMU/KVM use "-overcommit cpu-pm=on" to expose MONITOR/MWAIT
(commit id 6f131f13e68d648a8e4f083c667ab1acd88ce4cd), the MONITOR/MWAIT
feature in these CPU model is unused.
Add additional information for -cpu help to indicate the changes in this
version of CPU model.
Suggested-by: Eduardo Habkost
Signed-off-by: Tao Xu
---
target/i386/cpu.c | 12 ++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index
On Fri, Dec 06, 2019 at 01:40:19PM +, Peter Maydell wrote:
> On Fri, 6 Dec 2019 at 11:19, Peter Maydell wrote:
> >
> > On Fri, 6 Dec 2019 at 10:43, David Gibson
> > wrote:
> > >
> > > On Fri, Dec 06, 2019 at 09:52:54AM +, Peter Maydell wrote:
> > > > On Fri, 6 Dec 2019 at 04:41, David
A pseries guest can be run as a secure guest on Ultravisor-enabled
POWER platforms. When such a secure guest is reset, we need to
release/reset a few resources both on ultravisor and hypervisor side.
This is achieved by invoking this new ioctl KVM_PPC_SVM_OFF from the
machine reset path.
As part
Update to mainline commit: e42617b825f8 ("Linux 5.5-rc1")
Signed-off-by: Bharata B Rao
---
include/standard-headers/asm-x86/bootparam.h | 7 +-
.../infiniband/hw/vmw_pvrdma/pvrdma_dev_api.h | 15 +++-
include/standard-headers/drm/drm_fourcc.h | 28 ++-
.../linux/input-event-codes.h
This patchset adds KVM_PPC_SVM_OFF ioctl which is required to support
reset of secure guest. This includes linux-headers update so that we get
the newly introduced ioctl.
v0: https://lists.gnu.org/archive/html/qemu-devel/2019-07/msg02408.html
Bharata B Rao (2):
linux-headers: Update
From: Alexey Kardashevskiy
This fixes PCI bridge regression.
Alexey Kardashevskiy (3):
ibm,client-architecture-support: Fix stack handling
fdt: Fix updating the tree at H_CAS
version: update to 20191209
Signed-off-by: Alexey Kardashevskiy
Signed-off-by: David Gibson
---
The following changes since commit 02f9c885edefae66d787847758d13ed60c0f539e:
Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging
(2019-12-06 15:05:20 +)
are available in the Git repository at:
git://github.com/dgibson/qemu.git tags/ppc-for-4.2-20191209
for
Hi, +Edgar
On 08. 12. 19 23:38, Guenter Roeck wrote:
> On Fri, Oct 18, 2019 at 06:07:31PM +0200, Michael Tretter wrote:
>> From: Rajan Vaja
>>
>> Add firmware DT node in ZynqMP device tree. This node
>> uses bindings as per new firmware interface driver.
>>
>> Signed-off-by: Rajan Vaja
>>
The last argument of AML bit and/or statement is the target variable,
so we don't need to use a NULL target and then an additional store
operation; using just aml_and() or aml_or() statement is enough.
Also update tests/data/acpi/virt/DSDT* to pass "make check".
Cc: Shannon Zhao
Cc: Peter
Parse input string both as a double and as a uint64_t, then use the
method which consumes more characters. Update the related test cases.
Signed-off-by: Tao Xu
---
Changes in v2:
- Add more test case for double overflow and underflow.
- Set mul as int64_t (Markus)
- Restore endptr
After the introduction of generic PCIe root port and PCIe-PCI bridge, we will
also have SHPC controller on ARM, and we don't support ACPI hot plug, so just
enable SHPC native hot plug.
Igor also spotted the store operation outside of bit and/or is not necessary, so
simply the code at first.
v6:
After the introduction of generic PCIe root port and PCIe-PCI bridge,
we will also have SHPC controller on ARM, so just enable SHPC native
hot plug.
Also update tests/data/acpi/virt/DSDT* to pass "make check".
Cc: Shannon Zhao
Cc: Peter Maydell
Cc: "Michael S. Tsirkin"
Cc: Igor Mammedov
On Fri, Dec 06, 2019 at 11:20:38PM +0800, Alex Williamson wrote:
> On Fri, 6 Dec 2019 01:04:07 -0500
> Yan Zhao wrote:
>
> > On Fri, Dec 06, 2019 at 07:55:30AM +0800, Alex Williamson wrote:
> > > On Wed, 4 Dec 2019 22:26:50 -0500
> > > Yan Zhao wrote:
> > >
> > > > Dynamic trap bar info
On 12/5/19 11:29 PM, Markus Armbruster wrote:
Tao Xu writes:
Parse input string both as a double and as a uint64_t, then use the
method which consumes more characters. Update the related test cases.
Signed-off-by: Tao Xu
---
[...]
diff --git a/util/cutils.c b/util/cutils.c
index
On Fri, Dec 6, 2019 at 10:44 AM Greg Kurz wrote:
>
> Similarly to what we already do with qdev, use a helper to overload the
> reset QOM methods of the parent in children classes, for clarity.
>
> Signed-off-by: Greg Kurz
Reviewed-by: Alistair Francis
Alistair
> ---
> hw/core/cpu.c
On Fri, Dec 6, 2019 at 10:45 AM Greg Kurz wrote:
>
> Convert all targets to use cpu_class_set_parent_reset() with the following
> coccinelle script:
>
> @@
> type CPUParentClass;
> CPUParentClass *pcc;
> CPUClass *cc;
> identifier parent_fn;
> identifier child_fn;
> @@
>
On Fri, Dec 6, 2019 at 10:50 AM Greg Kurz wrote:
>
> Use it in include/hw/core/cpu.h and convert all targets to use it as
> well with:
>
> perl -pi \
> -e 's/void\s+\(\*(parent_reset)\)\(CPUState\s+\*\w+\)/CPUReset \1/;' \
> $(git ls-files 'target/*.h')
>
> Signed-off-by: Greg Kurz
Aleksandar Markovic writes:
> On Thursday, November 14, 2019, Philippe Mathieu-Daudé
> wrote:
>
>> +Paul Burton
>>
>> On 11/13/19 2:47 PM, Aleksandar Markovic wrote:
>>
>>> From: Aleksandar Markovic
>>>
>>> Change the maintainership for Malta board to improve its quality.
>>>
>>> Acked-by:
On Sat, Dec 07, 2019 at 05:22:26AM +0800, Alex Williamson wrote:
> On Fri, 6 Dec 2019 02:56:55 -0500
> Yan Zhao wrote:
>
> > On Fri, Dec 06, 2019 at 07:55:19AM +0800, Alex Williamson wrote:
> > > On Wed, 4 Dec 2019 22:25:36 -0500
> > > Yan Zhao wrote:
> > >
> > > > when vfio-pci is bound to
Sorry about that. I'll pay attention to them next time and thank you for
pointing them out :)
On Sat, Dec 07, 2019 at 07:13:30AM +0800, Eric Blake wrote:
> On 12/4/19 9:25 PM, Yan Zhao wrote:
> > when vfio-pci is bound to a physical device, almost all the hardware
> > resources are passthroughed.
On 2019/12/9 10:00, pannengy...@huawei.com wrote:
> From: Michael S. Tsirkin
>
> Devices tend to maintain vq pointers, allow deleting them through a vq
> pointer.
>
> Signed-off-by: Michael S. Tsirkin
> Signed-off-by: Pan Nengyuan
> [PMM: change function name to virtio_queue_cleanup; set
On 12/5/2019 4:44 PM, Xiaoyao Li wrote:
On 12/2/2019 2:32 PM, Tao Xu wrote:
Add which features are added or removed in this version. Remove the
changed model-id in versioned CPU models.
Signed-off-by: Tao Xu
---
target/i386/cpu.c | 50 +++
1
On 12/5/2019 4:55 PM, Xiaoyao Li wrote:
On 12/2/2019 2:32 PM, Tao Xu wrote:
This series of patches will remove MPX from Denverton, remove Remove
monitor from some CPU models. Add additional information for -cpu help
to indicate the changes in this version of CPU model.
The output is as
Hi Andrew:
Any update for this patch series? I have met the same issue, and if the
topology guessed by linux MPIDR conflicts with qemu specified numa, it
will failed to boot (sched domain initialization will fall into deadloop).
Thanks.
> -Original Message-
> From: Qemu-devel
>
在 2019/12/6 21:50, Peter Maydell 写道:
On Sat, 30 Nov 2019 at 03:47, Guoheyi wrote:
Hi Peter, Igor,
I couldn't find these 2 patches in the latest tree. Could you help to
merge them?
In future I recommend pinging unapplied patches with a shorter
delay than nine months :-)
Tha's really a
From: Pan Nengyuan
ivqs/ovqs/c_ivq/c_ovq forgot to cleanup in
virtio_serial_device_unrealize, the memory leak stack is as below:
Direct leak of 1290240 byte(s) in 180 object(s) allocated from:
#0 0x7fc9bfc27560 in calloc (/usr/lib64/libasan.so.3+0xc7560)
#1 0x7fc9bed6f015 in g_malloc0
From: Pan Nengyuan
ivq/dvq/svq/free_page_vq forgot to cleanup in
virtio_balloon_device_unrealize, the memory leak stack is as follow:
Direct leak of 14336 byte(s) in 2 object(s) allocated from:
#0 0x7f99fd9d8560 in calloc (/usr/lib64/libasan.so.3+0xc7560)
#1 0x7f99fcb20015 in g_malloc0
From: Pan Nengyuan
This series add a new function to cleanup vqueue through a vq pointer, and fix
memory
leaks in virtio-balloon and virtio-serial-bus.
---
Changes v2 to v1:
- add a new function to cleanup vqueue through a vq pointer.
---
Changes v3 to v2:
- change function name from
From: Michael S. Tsirkin
Devices tend to maintain vq pointers, allow deleting them through a vq
pointer.
Signed-off-by: Michael S. Tsirkin
Signed-off-by: Pan Nengyuan
[PMM: change function name to virtio_queue_cleanup; set used_elems to NULL
after free]
Cc: Amit Shah
Reviewed-by: Pankaj
From: Micky Yun Chan
This patch is to add standard commands defined in docs/interop/vhost-user.rst
For vhost-user-* program
Signed-off-by: Micky Yun Chan (michiboo)
---
contrib/vhost-user-blk/vhost-user-blk.c | 108 ++--
docs/interop/vhost-user.json| 31
I agree, I just sent the updated version.
On Thu, Dec 5, 2019 at 9:39 PM Marc-André Lureau
wrote:
> Hi
>
> On Mon, Nov 25, 2019 at 9:17 AM Micky Yun Chan(michiboo)
> wrote:
> >
> > From: Micky Yun Chan
> >
> > This patch is to add standard commands defined in
> docs/interop/vhost-user.rst
> >
On Wed, Dec 04, 2019 at 08:43:31PM +0100, Greg Kurz wrote:
> Guest hangs have been observed recently on POWER9 hosts, specifically LC92x
> "Boston" systems, when the guests are being rebooted multiple times. The
> issue isn't POWER9 specific though. It is caused by a very long standing bug
> when
The following changes since commit 1bdc319ab5d289ce6b822e06fb2b13666fd9278e:
Update version for v4.2.0-rc4 release (2019-12-03 17:56:30 +)
are available in the Git repository at:
g...@github.com:aik/qemu.git tags/qemu-slof-20191209
for you to fetch changes up to
On Fri, Dec 06, 2019 at 07:44:06PM +0100, Greg Kurz wrote:
> Convert all targets to use cpu_class_set_parent_reset() with the following
> coccinelle script:
>
> @@
> type CPUParentClass;
> CPUParentClass *pcc;
> CPUClass *cc;
> identifier parent_fn;
> identifier child_fn;
> @@
>
On Fri, Dec 06, 2019 at 07:43:54PM +0100, Greg Kurz wrote:
> Use it in include/hw/core/cpu.h and convert all targets to use it as
> well with:
>
> perl -pi \
> -e 's/void\s+\(\*(parent_reset)\)\(CPUState\s+\*\w+\)/CPUReset \1/;' \
> $(git ls-files 'target/*.h')
>
> Signed-off-by: Greg Kurz
On Fri, Dec 06, 2019 at 07:44:00PM +0100, Greg Kurz wrote:
> Similarly to what we already do with qdev, use a helper to overload the
> reset QOM methods of the parent in children classes, for clarity.
>
> Signed-off-by: Greg Kurz
Reviewed-by: David Gibson
> ---
> hw/core/cpu.c |8
On 12/2/19 11:47 AM, Jason Wang wrote:
On 2019/12/2 上午12:45, David Ahern wrote:
On 11/26/19 4:07 AM, Prashant Bhole wrote:
From: Jason Wang
This patch introduces an ioctl way to set an offloaded XDP program
to tun driver. This ioctl will be used by qemu to offload XDP program
from
On Fri, Oct 18, 2019 at 06:07:31PM +0200, Michael Tretter wrote:
> From: Rajan Vaja
>
> Add firmware DT node in ZynqMP device tree. This node
> uses bindings as per new firmware interface driver.
>
> Signed-off-by: Rajan Vaja
> Signed-off-by: Michal Simek
> Signed-off-by: Michael Tretter
On Fri, Dec 06, 2019 at 06:07:58AM +0100, Philippe Mathieu-Daudé wrote:
> On 12/5/19 8:35 PM, Laszlo Ersek wrote:
> > On 12/05/19 17:50, Ard Biesheuvel wrote:
> > > On Thu, 5 Dec 2019 at 16:27, Philippe Mathieu-Daudé
> > > wrote:
> > > >
> > > > On 12/5/19 5:13 PM, Laszlo Ersek wrote:
> > > > >
On 12/8/19 3:51 AM, Greg Kurz wrote:
On Sat, 7 Dec 2019 23:56:55 +1100
Gavin Shan wrote:
On 12/7/19 3:58 AM, Greg Kurz wrote:
On Fri, 6 Dec 2019 17:33:37 +1100
Gavin Shan wrote:
The @cpu_option shouldn't be NULL, otherwise assertion from g_strsplit()
should be raised as below message
Public bug reported:
I use qemu-i386 with IntelHaxm on Windows 10 x64 host with Windows 7 x86 guest.
I run the guest till OS loads and create a snapshot with savevm, then close
qemu, run it again and try to load the snapshot with loadvm. The guest crashes
or freezes. I dumped registers on
These were designed to facilitate testing but should provide enough function to
be useful in other contexts.
Only a subset of the functions of each peripheral is implemented, mainly due to
the lack of a standard way to handle electrical connections (like GPIO pins).
Signed-off-by: Sarah Harris
Make AVR support buildable
Signed-off-by: Michael Rolnik
Tested-by: Philippe Mathieu-Daudé
Reviewed-by: Aleksandar Markovic
---
configure | 7 +++
default-configs/avr-softmmu.mak | 5 +
target/avr/Makefile.objs| 34 +
3
Signed-off-by: Michael Rolnik
---
qemu-doc.texi | 10 ++
1 file changed, 10 insertions(+)
diff --git a/qemu-doc.texi b/qemu-doc.texi
index 3ddf5c0a68..cea1008800 100644
--- a/qemu-doc.texi
+++ b/qemu-doc.texi
@@ -1757,6 +1757,7 @@ differences are mentioned in the following sections.
*
The test is based on
https://github.com/seharris/qemu-avr-tests/tree/master/free-rtos/Demo
demo which. If working correctly, prints 'ABCDEFGHIJKLMNOPQRSTUVWX' out.
it also demostrates that timer and IRQ are working
Signed-off-by: Michael Rolnik
Reviewed-by: Philippe Mathieu-Daudé
Tested-by:
Include AVR maintaners in MAINTAINERS file
Signed-off-by: Michael Rolnik
---
MAINTAINERS | 21 +
1 file changed, 21 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 5e5e3e52d6..9ab7ed0865 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -163,6 +163,27 @@ S:
Add AVR related definitions into QEMU
Signed-off-by: Michael Rolnik
Tested-by: Philippe Mathieu-Daudé
Reviewed-by: Aleksandar Markovic
---
qapi/machine.json | 3 ++-
include/disas/dis-asm.h| 6 ++
include/sysemu/arch_init.h | 1 +
arch_init.c| 2 ++
4 files
This includes:
- MOV, MOVW
- LDI, LDS LDX LDY LDZ
- LDDY, LDDZ
- STS, STX STY STZ
- STDY, STDZ
- LPM, LPMX
- ELPM, ELPMX
- SPM, SPMX
- IN, OUT
- PUSH, POP
- XCH
- LAS, LAC LAT
Signed-off-by: Michael Rolnik
---
target/avr/translate.c | 861
Print out 'T' through serial port
Signed-off-by: Michael Rolnik
Reviewed-by: Philippe Mathieu-Daudé
Tested-by: Philippe Mathieu-Daudé
Acked-by: Thomas Huth
---
tests/boot-serial-test.c | 10 ++
tests/Makefile.include | 2 ++
2 files changed, 12 insertions(+)
diff --git
I hope I did not miss anything.
On Sun, Dec 8, 2019 at 8:39 PM Michael Rolnik wrote:
> This series of patches adds 8bit AVR cores to QEMU.
> All instruction, except BREAK/DES/SPM/SPMX, are implemented. Not fully
> tested yet.
> However I was able to execute simple code with functions. e.g
This includes:
- LSR, ROR
- ASR
- SWAP
- SBI, CBI
- BST, BLD
- BSET, BCLR
Signed-off-by: Michael Rolnik
---
target/avr/translate.c | 243 +
1 file changed, 243 insertions(+)
diff --git a/target/avr/translate.c
Signed-off-by: Michael Rolnik
Tested-by: Philippe Mathieu-Daudé
Reviewed-by: Aleksandar Markovic
---
tests/machine-none-test.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/tests/machine-none-test.c b/tests/machine-none-test.c
index 5953d31755..3e5c74e73e 100644
---
A simple board setup that configures an AVR CPU to run a given firmware image.
This is all that's useful to implement without peripheral emulation as AVR CPUs
include a lot of on-board peripherals.
NOTE: this is not a real board
NOTE: it's used for CPU testing
Signed-off-by: Michael
Signed-off-by: Michael Rolnik
---
include/hw/misc/avr_mask.h | 47
hw/misc/avr_mask.c | 112 +
hw/misc/Kconfig| 3 +
hw/misc/Makefile.objs | 2 +
4 files changed, 164 insertions(+)
create mode 100644
This includes:
- BREAK
- NOP
- SLEEP
- WDR
Signed-off-by: Michael Rolnik
---
target/avr/translate.c | 174 +
1 file changed, 174 insertions(+)
diff --git a/target/avr/translate.c b/target/avr/translate.c
index d8d8f11933..68025112ff
Signed-off-by: Michael Rolnik
Reviewed-by: Philippe Mathieu-Daudé
Tested-by: Philippe Mathieu-Daudé
---
target/avr/translate.c | 143 +
1 file changed, 143 insertions(+)
create mode 100644 target/avr/translate.c
diff --git a/target/avr/translate.c
These were designed to facilitate testing but should provide enough function to
be useful in other contexts.
Only a subset of the functions of each peripheral is implemented, mainly due to
the lack of a standard way to handle electrical connections (like GPIO pins).
Signed-off-by: Sarah Harris
Co-developed-by: Richard Henderson
Co-developed-by: Michael Rolnik
Signed-off-by: Michael Rolnik
Tested-by: Philippe Mathieu-Daudé
---
target/avr/translate.c | 234 +
1 file changed, 234 insertions(+)
diff --git a/target/avr/translate.c
Provide function disassembles executed instruction when `-d in_asm` is
provided
Example:
`./avr-softmmu/qemu-system-avr -bios free-rtos/Demo/AVR_ATMega2560_GCC/demo.elf
-d in_asm` will produce something like the following
```
...
IN:
0x014a: CALL 0x3808
IN: main
This includes:
- CPU data structures
- object model classes and functions
- migration functions
- GDB hooks
Co-developed-by: Michael Rolnik
Co-developed-by: Sarah Harris
Signed-off-by: Michael Rolnik
Signed-off-by: Sarah Harris
Signed-off-by: Michael Rolnik
Acked-by: Igor Mammedov
This includes:
- RJMP, IJMP, EIJMP, JMP
- RCALL, ICALL, EICALL, CALL
- RET, RETI
- CPSE, CP, CPC, CPI
- SBRC, SBRS, SBIC, SBIS
- BRBC, BRBS
Signed-off-by: Michael Rolnik
Tested-by: Philippe Mathieu-Daudé
---
target/avr/translate.c | 537
This includes:
- ADD, ADC, ADIW
- SBIW, SUB, SUBI, SBC, SBCI
- AND, ANDI
- OR, ORI, EOR
- COM, NEG
- INC, DEC
- MUL, MULS, MULSU
- FMUL, FMULS, FMULSU
- DES
Signed-off-by: Michael Rolnik
Tested-by: Philippe Mathieu-Daudé
---
target/avr/translate.c | 734
This series of patches adds 8bit AVR cores to QEMU.
All instruction, except BREAK/DES/SPM/SPMX, are implemented. Not fully tested
yet.
However I was able to execute simple code with functions. e.g fibonacci
calculation.
This series of patches include a non real, sample board.
No fuses support
This includes:
- encoding of all 16 bit instructions
- encoding of all 32 bit instructions
Signed-off-by: Michael Rolnik
Tested-by: Philippe Mathieu-Daudé
---
target/avr/insn.decode | 194 +
1 file changed, 194 insertions(+)
create mode 100644
Stubs for unimplemented instructions and helpers for instructions that need to
interact with QEMU.
SPM and WDR are unimplemented because they require emulation of complex
peripherals.
The implementation of SLEEP is very limited due to the lack of peripherals to
generate wake interrupts.
Memory
Hi All~
No news for a long time.
Please give me more comments about this series.
Thanks
Zhang Chen
On 11/19/2019 8:30 PM, Zhang, Chen wrote:
From: Zhang Chen
Advanced Watch Dog is an universal monitoring module on VMM side, it can be
used to detect network down(VMM to guest, VMM to VMM,
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