QMP qom-get for a link property returns the canonical path of the link's
target:
$ socat "READLINE,history=$HOME/.qmp_history,prompt=QMP> "
UNIX-CONNECT:$HOME/work/images/test-qmp
[...]
QMP> {"execute": "qom-get", "arguments": {"path": "/machine", "property":
"acpi-device"}}
{"re
Thanks for clarifying, Jan.
In the meantime I tried a number of so-called solutions published on
Reddit and other places, none of which seems to work.
So if I understand it correctly, there is currently no solution to the
incorrect l3 cache layout for Zen architecture CPUs. At best a
workaround f
On 2020/5/25 下午8:23, Philippe Mathieu-Daudé wrote:
libFuzzer found using 'qemu-system-i386 -M q35':
qemu: hardware error: e1000e: PSRCTL.BSIZE0 cannot be zero
CPU #0:
EAX= EBX= ECX= EDX=0663
ESI= EDI= EBP= ESP=
EIP=fff0 EFL=00
"Dr. David Alan Gilbert" writes:
> * Markus Armbruster (arm...@redhat.com) wrote:
>> "Dr. David Alan Gilbert" writes:
>>
>> > * Philippe Mathieu-Daudé (phi...@redhat.com) wrote:
>> >> On 5/20/20 5:11 PM, Dr. David Alan Gilbert (git) wrote:
>> >> > From: "Dr. David Alan Gilbert"
>> >> >
>>
On 28.05.2020 11:28, Alex Bennée wrote:
Pavel Dovgalyuk writes:
On 27.05.2020 18:20, Alex Bennée wrote:
Pavel Dovgalyuk writes:
This patch adds a base for testing kernel boot recording and replaying.
Each test has the phase of recording and phase of replaying.
Virtual machines just boot
On 28.05.2020 16:26, Alex Bennée wrote:
Pavel Dovgalyuk writes:
On 27.05.2020 18:41, Alex Bennée wrote:
Pavel Dovgalyuk writes:
This patch adds a test for record/replay an execution of x86_64 machine.
Execution scenario includes simple kernel boot, which allows testing
basic hardware int
Hi!
Strange thing with your pull requests: I receive only small part of them.. I
thought it's my problem of receiving part, but now I've checked that in mailing
list archive there are same only two emails: 00/11 and 08/11
https://lists.gnu.org/archive/html/qemu-devel/2020-05/msg08061.html
28.
All QEMU patches should be sent to the qemu-devel mailing list also
and to David as he is the PPC maintainer.
On 5/29/20 2:04 AM, Gustavo Romero wrote:
> This commit fixes typos in spapr_vio_reg_to_irq() comments and a macro
> indentation.
>
> Signed-off-by: Gustavo Romero
Acked-by: Cédric Le
On 29/05/2020 00.16, Alistair Francis wrote:
> The ISA specific Spike machines have been deprecated in QEMU since 4.1,
> let's finally remove them.
>
> Signed-off-by: Alistair Francis
> Reviewed-by: Philippe Mathieu-Daudé
> Reviewed-by: Bin Meng
> ---
> docs/system/deprecated.rst | 17 +--
>
On 200528 1853, Philippe Mathieu-Daudé wrote:
> We don't need to serialize over QTest chardev when we can
> directly access the MMIO address space via the first
> registered CPU view.
> Rename the currents tests as $TEST-qtest, add add faster
> tests that don't use the qtest chardev.
>
> virtio-ne
On Thu, May 28, 2020 at 04:59:06PM -0600, Alex Williamson wrote:
> On Wed, 27 May 2020 09:48:22 +0100
> "Dr. David Alan Gilbert" wrote:
> > * Yan Zhao (yan.y.z...@intel.com) wrote:
> > > BTW, for viommu, the downtime data is as below. under the same network
> > > condition and guest memory size, a
Public bug reported:
Hi Expert,
x-blockdev-change met some error, during testing colo
Host os:
CentOS Linux release 7.6.1810 (Core)
Reproduce steps:
1. create colo vm following
https://github.com/qemu/qemu/blob/master/docs/COLO-FT.txt
2. kill secondary vm and remove the nbd child from the quoru
Patchew URL:
https://patchew.org/QEMU/20200528205114.42078-1-to...@linux.vnet.ibm.com/
Hi,
This series failed the docker-mingw@fedora build test. Please find the testing
commands and
their output below. If you have Docker installed, you can probably reproduce it
locally.
=== TEST SCRIPT BEGI
Patchew URL:
https://patchew.org/QEMU/20200528205114.42078-1-to...@linux.vnet.ibm.com/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Message-id: 20200528205114.42078-1-to...@linux.vnet.ibm.com
Subject: [PATCH 0/2] Add support for SEV Launch S
Patchew URL:
https://patchew.org/QEMU/20200528205114.42078-1-to...@linux.vnet.ibm.com/
Hi,
This series failed the asan build test. Please find the testing commands and
their output below. If you have Docker installed, you can probably reproduce it
locally.
=== TEST SCRIPT BEGIN ===
#!/bin/bas
Patchew URL:
https://patchew.org/QEMU/20200528205114.42078-1-to...@linux.vnet.ibm.com/
Hi,
This series failed the docker-quick@centos7 build test. Please find the testing
commands and
their output below. If you have Docker installed, you can probably reproduce it
locally.
=== TEST SCRIPT BEG
Spec said: The driver uses this to selectively prevent the device from
executing requests from this virtqueue. 1 - enabled; 0 - disabled.
Though write 0 to queue_enable is forbidden by the sepc, we should not
assume that the value is 1.
Fix this by ignoring the write value other than 1.
Cc: Mich
Patchew URL:
https://patchew.org/QEMU/20200528193758.51454-1-r.bolsha...@yadro.com/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Message-id: 20200528193758.51454-1-r.bolsha...@yadro.com
Subject: [PATCH 00/13] i386: hvf: Remove HVFX86Emulator
[...]
>
> -def qmp(self, cmd, conv_keys=True, **args):
> -"""
> -Invoke a QMP command and return the response dict
> -"""
> +@classmethod
> +def _qmp_args(cls, _conv_keys: bool = True, **args: Any) -> Dict[str,
> Any]:
> qmp_args = dict()
>
I thought there were qemu-img for that. Since qemu-nbd allows mounting
images a rw block devices, it's logical to think that you can use it for
that purpose. Will try to reproduce again the issue in case it was a
kernel problem instead of qemu-nbd.
--
You received this bug notification because yo
It sounds like maybe these disks have been partitioned in a format that
only Windows understands. Can you tell me what the windows disk manager
claims the partition table format to be?
If you still think that maybe there's a QEMU bug, please give more
details:
- host kernel version
- qemu versio
Patchew URL:
https://patchew.org/QEMU/20200528162011.16258-1-vishal.l.ve...@intel.com/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Message-id: 20200528162011.16258-1-vishal.l.ve...@intel.com
Subject: [PATCH v3 0/3] account for NVDIMM nodes
On Wed, 27 May 2020 09:48:22 +0100
"Dr. David Alan Gilbert" wrote:
> * Yan Zhao (yan.y.z...@intel.com) wrote:
> > BTW, for viommu, the downtime data is as below. under the same network
> > condition and guest memory size, and no running dirty data/memory produced
> > by device.
> > (1) viommu off
Logical and physical block sizes in QEMU are limited to 32 KiB.
This appears unnecessarily tight, and we've seen bigger block sizes
handy at times.
Lift the limitation up to 2 MiB which appears to be good enough for
everybody, and matches the qcow2 cluster size limit.
Signed-off-by: Roman Kagan
Convert all size-related properties in BlockConf to 32bit. This will
accommodate bigger block sizes (in a followup patch). This also allows
to make them all accept size suffixes, either via DEFINE_PROP_BLOCKSIZE
or via DEFINE_PROP_SIZE32.
Also, since min_io_size is exposed to the guest by scsi a
Add getter for size32, and use it for blocksize, too.
In its human-readable branch, it reports approximate size in
human-readable units next to the exact byte value, like the getter for
64bit size does.
Adjust the expected test output accordingly.
Signed-off-by: Roman Kagan
Reviewed-by: Eric Bl
Introduce size32 property type which handles size suffixes (k, m, g)
just like size property, but is uint32_t rather than uint64_t. It's
going to be useful for properties that are byte sizes but are inherently
32bit, like BlkConf.opt_io_size or .discard_granularity (they are
switched to this new p
It appears convenient to be able to specify physical_block_size and
logical_block_size using common size suffixes.
Teach the blocksize property setter to interpret them. Also express the
upper and lower limits in the respective units.
Signed-off-by: Roman Kagan
Reviewed-by: Eric Blake
---
hw/
Several block device properties related to blocksize configuration must
be in certain relationship WRT each other: physical block must be no
smaller than logical block; min_io_size, opt_io_size, and
discard_granularity must be a multiple of a logical block.
To ensure these requirements are met, ad
The width of opt_io_size in virtio_blk_config is 32bit. However, it's
written with virtio_stw_p; this may result in value truncation, and on
big-endian systems with legacy virtio in completely bogus readings in
the guest.
Use the appropriate accessor to store it.
Signed-off-by: Roman Kagan
Revi
Make it easier (more visible) to maintain the limits on the blocksize
properties in sync with the respective description, by using macros both
in the code and in the description.
Signed-off-by: Roman Kagan
Reviewed-by: Eric Blake
---
hw/core/qdev-properties.c | 21 +++--
1 file
BlockConf includes several properties counted in bytes.
Enhance their handling in some aspects, specifically
- accept common size suffixes (k, m)
- perform consistency checks on the values
- lift the upper limit on physical_block_size and logical_block_size
Also fix the accessor for opt_io_size
On Thu, 28 May 2020 04:01:02 -0400
Yan Zhao wrote:
> > > > This is my understanding of the protocol as well, when the device is
> > > > running, pending_bytes might drop to zero if no internal state has
> > > > changed and may be non-zero on the next iteration due to device
> > > > activity. Whe
Changes since v3:
- Add the SRAT augmentation for ARM's virt-acpi-build as well (Igor)
- Update patches 1 and 3 for the test binaries to include ARM tests.
Changes since v2:
- Change a repetitive OBJECT(dev) to a stored 'Object' (Igor)
- No need to return 'numamem' back to build_srat (Igor)
Chang
In anticipation of a change to the SRAT generation in qemu, add the AML
file to diffs-allowed.
Signed-off-by: Vishal Verma
---
tests/qtest/bios-tables-test-allowed-diff.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/tests/qtest/bios-tables-test-allowed-diff.h
b/tests/qtest/bios-tables
On Thu, May 28, 2020 at 04:45:19PM -0500, Eric Blake wrote:
> On 5/28/20 4:39 PM, Roman Kagan wrote:
> > Introduce size32 property type which handles size suffixes (k, m) just
> > like size property, but is uint32_t rather than uint64_t.
>
> Does it handle 'g' as well? (even though the set of vali
On Wed, 27 May 2020 12:53:30 -0400
Peter Xu wrote:
> On Wed, May 27, 2020 at 06:27:38PM +0200, Philippe Mathieu-Daudé wrote:
> > On 5/27/20 6:16 PM, Peter Xu wrote:
> > > On Wed, May 27, 2020 at 05:53:16PM +0200, Philippe Mathieu-Daudé wrote:
> > > +for (i = 0; i < ARRAY_SIZE(iommu);
Update expected SRAT files for the change to account for NVDIMM NUMA
nodes in the SRAT.
AML diffs:
tests/data/acpi/pc/SRAT.dimmpxm:
--- /tmp/asl-3P2IL0.dsl 2020-05-28 15:11:02.326439263 -0600
+++ /tmp/asl-1N4IL0.dsl 2020-05-28 15:11:02.325439280 -0600
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler ver
I don't recommend you use VDI images in this way; we do not intend to
support performant RW access; support for VDI images is there to convert
to qcow2 or raw, generally.
That said, some questions that might be interesting to know the answer
to:
- Try converting your VDI image to raw or qcow2 and
Signed-off-by: Alistair Francis
Reviewed-by: Bin Meng
---
docs/system/deprecated.rst | 33 ++---
target/riscv/cpu.h | 7 ---
target/riscv/cpu.c | 28
tests/qtest/machine-none-test.c | 4 ++--
4 files ch
v4:
- Remove all of the < PRIV_VERSION_1_10_0 checks
- Move the documentation to the "Recently removed features" section
- Document the OpenSBI deprecation
v3:
- Don't use SiFive CPUs for Spike machine
v2:
- Remove the CPUs and ISA seperatley
Alistair Francis (4):
hw/riscv: spike: Remove
NVDIMMs can belong to their own proximity domains, as described by the
NFIT. In such cases, the SRAT needs to have Memory Affinity structures
in the SRAT for these NVDIMMs, otherwise Linux doesn't populate node
data structures properly during NUMA initialization. See the following
for an example fa
Update the -bios deprecation documentation to describe the new
behaviour.
Signed-off-by: Alistair Francis
---
docs/system/deprecated.rst | 28 +---
1 file changed, 13 insertions(+), 15 deletions(-)
diff --git a/docs/system/deprecated.rst b/docs/system/deprecated.rst
inde
Signed-off-by: Alistair Francis
Reviewed-by: Bin Meng
Reviewed-by: Philippe Mathieu-Daudé
---
include/hw/riscv/opentitan.h | 3 +++
hw/riscv/opentitan.c | 19 +--
2 files changed, 20 insertions(+), 2 deletions(-)
diff --git a/include/hw/riscv/opentitan.h b/include/hw/r
The ISA specific Spike machines have been deprecated in QEMU since 4.1,
let's finally remove them.
Signed-off-by: Alistair Francis
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Bin Meng
---
docs/system/deprecated.rst | 17 +--
include/hw/riscv/spike.h | 6 +-
hw/riscv/spike.c
The Ibex core contains a PLIC that although similar to the RISC-V spec
is not RISC-V spec compliant.
This patch implements a Ibex PLIC in a somewhat generic way.
As the current RISC-V PLIC needs tidying up, my hope is that as the Ibex
PLIC move towards spec compliance this PLIC implementation can
The RISC-V ISA spec version 1.09.1 has been deprecated in QEMU since
4.1. It's not commonly used so let's remove support for it.
Signed-off-by: Alistair Francis
---
docs/system/deprecated.rst| 20 +--
target/riscv/cpu.h| 1 -
target/riscv/cpu.c
Signed-off-by: Alistair Francis
Reviewed-by: Bin Meng
Reviewed-by: Philippe Mathieu-Daudé
---
include/hw/riscv/opentitan.h | 13 +
hw/riscv/opentitan.c | 24 ++--
2 files changed, 35 insertions(+), 2 deletions(-)
diff --git a/include/hw/riscv/opentitan.h
This adds a barebone OpenTitan machine to QEMU.
Signed-off-by: Alistair Francis
Reviewed-by: Bin Meng
---
default-configs/riscv32-softmmu.mak | 1 +
default-configs/riscv64-softmmu.mak | 11 +-
include/hw/riscv/opentitan.h| 68 ++
hw/riscv/opentitan.c| 184 ++
Ibex is a small and efficient, 32-bit, in-order RISC-V core with
a 2-stage pipeline that implements the RV32IMC instruction set
architecture.
For more details on lowRISC see here:
https://github.com/lowRISC/ibex
Signed-off-by: Alistair Francis
Reviewed-by: Bin Meng
Reviewed-by: LIU Zhiwei
---
Signed-off-by: Alistair Francis
Reviewed-by: Bin Meng
---
target/riscv/pmp.c | 14 +-
1 file changed, 9 insertions(+), 5 deletions(-)
diff --git a/target/riscv/pmp.c b/target/riscv/pmp.c
index 0e6b640fbd..9418660f1b 100644
--- a/target/riscv/pmp.c
+++ b/target/riscv/pmp.c
@@ -233,12
This is the initial commit of the Ibex UART device. Serial TX is
working, while RX has been implemeneted but untested.
This is based on the documentation from:
https://docs.opentitan.org/hw/ip/uart/doc/
Signed-off-by: Alistair Francis
---
include/hw/char/ibex_uart.h | 110
hw/char/ibex
Previously if we didn't enable the MMU it would be enabled in the
realize() function anyway. Let's ensure that if we don't want the MMU we
disable it. We also don't need to enable the MMU as it will be enalbed
in realize() by default.
Signed-off-by: Alistair Francis
---
target/riscv/cpu.c | 7 ++
The PMP is enabled by default via the "pmp" property so there is no need
for us to set it in the init function. As all CPUs have PMP support just
remove the set_feature() call in the CPU init functions.
Signed-off-by: Alistair Francis
---
target/riscv/cpu.c | 7 ---
1 file changed, 7 deletio
As the functions declared in this header use the symbol_fn_t
typedef itself declared in "hw/loader.h", we need to include
it here to make the header file self-contained.
Signed-off-by: Alistair Francis
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Bin Meng
---
include/hw/riscv/boot.h | 1 +
OpenTitan is an open source silicon Root of Trust (RoT) project. This
series adds initial support for the OpenTitan machine to QEMU.
This series add the Ibex CPU to the QEMU RISC-V target. It then adds the
OpenTitan machine, the Ibex UART and the Ibex PLIC.
The UART has been tested sending and re
Bring our these files up to speed with pylint 2.5.0.
Add a pylintrc file to formalize which pylint subset
we are targeting.
The similarity ignore is there to suppress similarity
reports across imports, which for typing constants,
are going to trigger this report erroneously.
Signed-off-by: John S
Mostly, ignore the "no bare except" rule, because flake8 is not
contextual and cannot determine if we re-raise. Pylint can, though, so
always prefer pylint for that.
Signed-off-by: John Snow
Reviewed-by: Philippe Mathieu-Daudé
---
python/qemu/.flake8| 2 ++
python/qemu/accel.py | 9
The reset vector is set in the init function don't set it again in
realize.
Signed-off-by: Alistair Francis
Reviewed-by: Bin Meng
---
target/riscv/cpu.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index 059d71f2c7..5eb3c02735 100
This is a quick series to delint the files under python/qemu, with one
extra fix outside of that domain.
This was split out from my longer series attempting to package
python/qemu. This part is a nice standalone chunk.
John Snow (4):
scripts/qmp: Fix shebang and imports
python/machine.py: rem
There's more wrong with these scripts; They are in various stages of
disrepair. That's beyond the scope of this current patchset.
This just mechanically corrects the imports and the shebangs, as part of
ensuring that the python/qemu/lib refactoring didn't break anything
needlessly.
Signed-off-by:
Catch only the timeout error; if there are other problems, allow the
stack trace to be visible.
Signed-off-by: John Snow
Reviewed-by: Philippe Mathieu-Daudé
---
python/qemu/machine.py | 33 +
1 file changed, 21 insertions(+), 12 deletions(-)
diff --git a/python/
On 5/28/20 4:39 PM, Roman Kagan wrote:
Add getter for size32, and use it for blocksize, too.
In its human-readable branch, it reports approximate size in
human-readable units next to the exact byte value, like the getter for
64bit size does.
Adjust the expected test output accordingly.
Signed-
On 5/28/20 4:39 PM, Roman Kagan wrote:
Convert all size-related properties in BlockConf to 32bit. This will
allow to accomodate bigger block sizes (in a followup patch).
s/allow to accomodate/accommodate/
This also allows to make them all accept size suffixes, either via
DEFINE_PROP_BLOCKSIZ
On 5/28/20 4:39 PM, Roman Kagan wrote:
It appears convenient to be able to specify physical_block_size and
logical_block_size using common size suffixes.
Teach the blocksize property setter to interpret them. Also express the
upper and lower limits in the respective units.
Signed-off-by: Roman
On 5/28/20 4:39 PM, Roman Kagan wrote:
Introduce size32 property type which handles size suffixes (k, m) just
like size property, but is uint32_t rather than uint64_t.
Does it handle 'g' as well? (even though the set of valid 32-bit sizes
with a g suffix is rather small ;)
It's going to
be
On 5/28/20 3:51 PM, Tobin Feldman-Fitzthum wrote:
From: Tobin Feldman-Fitzthum
AMD SEV allows a guest owner to inject a secret blob
into the memory of a virtual machine. The secret is
encrypted with the SEV Transport Encryption Key and
integrity is guaranteed with the Transport Integrity
Key. A
Add getter for size32, and use it for blocksize, too.
In its human-readable branch, it reports approximate size in
human-readable units next to the exact byte value, like the getter for
64bit size does.
Adjust the expected test output accordingly.
Signed-off-by: Roman Kagan
---
v6 -> v7:
- spli
On 5/28/20 3:32 AM, Laurent Vivier wrote:
> Le 28/05/2020 à 12:08, Peter Maydell a écrit :
>> On Tue, 19 May 2020 at 20:45, Richard Henderson
>> wrote:
>>> Makefile | 4 +-
>>> linux-user/elfload.c | 203 +-
>>> pc-bios/Makefile
Convert all size-related properties in BlockConf to 32bit. This will
allow to accomodate bigger block sizes (in a followup patch).
This also allows to make them all accept size suffixes, either via
DEFINE_PROP_BLOCKSIZE or via DEFINE_PROP_SIZE32.
Also, since min_io_size is exposed to the guest by
It appears convenient to be able to specify physical_block_size and
logical_block_size using common size suffixes.
Teach the blocksize property setter to interpret them. Also express the
upper and lower limits in the respective units.
Signed-off-by: Roman Kagan
---
v6 -> v7:
- split out into se
Make it easier (more visible) to maintain the limits on the blocksize
properties in sync with the respective description, by using macros both
in the code and in the description.
Signed-off-by: Roman Kagan
Reviewed-by: Eric Blake
---
v4 -> v5:
- split out into separate patch [Philippe]
hw/core
Logical and physical block sizes in QEMU are limited to 32 KiB.
This appears unnecessarily tight, and we've seen bigger block sizes
handy at times.
Lift the limitation up to 2 MiB which appears to be good enough for
everybody, and matches the qcow2 cluster size limit.
Signed-off-by: Roman Kagan
BlockConf includes several properties counted in bytes.
Enhance their handling in some aspects, specifically
- accept common size suffixes (k, m)
- perform consistency checks on the values
- lift the upper limit on physical_block_size and logical_block_size
Also fix the accessor for opt_io_size
Several block device properties related to blocksize configuration must
be in certain relationship WRT each other: physical block must be no
smaller than logical block; min_io_size, opt_io_size, and
discard_granularity must be a multiple of a logical block.
To ensure these requirements are met, ad
The width of opt_io_size in virtio_blk_config is 32bit. However, it's
written with virtio_stw_p; this may result in value truncation, and on
big-endian systems with legacy virtio in completely bogus readings in
the guest.
Use the appropriate accessor to store it.
Signed-off-by: Roman Kagan
Revi
Introduce size32 property type which handles size suffixes (k, m) just
like size property, but is uint32_t rather than uint64_t. It's going to
be useful for properties that are byte sizes but are inherently 32bit,
like BlkConf.opt_io_size or .discard_granularity (they are switched to
this new prop
This patchset contains two patches. The first enables QEMU
to facilitate the injection of a secret blob into the guest
memory.
The second enables QEMU to parse the guest ROM to determine
the address at which the secret should be injected.
Tobin Feldman-Fitzthum (2):
sev: add sev-inject-launch-s
On Thu, 2020-05-28 at 16:51 -0400, Tobin Feldman-Fitzthum wrote:
> --- a/qapi/misc-target.json
> +++ b/qapi/misc-target.json
> @@ -200,6 +200,26 @@
> { 'command': 'query-sev-capabilities', 'returns': 'SevCapability',
>'if': 'defined(TARGET_I386)' }
>
> +##
> +# @sev-inject-launch-secret:
> +
From: Tobin Feldman-Fitzthum
AMD SEV allows a guest owner to inject a secret blob
into the memory of a virtual machine. The secret is
encrypted with the SEV Transport Encryption Key and
integrity is guaranteed with the Transport Integrity
Key. Although QEMU faciliates the injection of the
launch
From: Tobin Feldman-Fitzthum
In addition to using QMP to provide the guest memory address
that the launch secret blob will be injected into, the
secret address can also be specified in the guest ROM. This
patch adds sev_find_secret_gpa, which scans the ROM page by
page to find a launch secret tab
DMA mapped pages, including those pinned by mdev vendor drivers, might
get unpinned and unmapped while migration is active and device is still
running. For example, in pre-copy phase while guest driver could access
those pages, host device or vendor driver can dirty these mapped pages.
Such pages s
Added a check such that only singleton IOMMU groups can pin pages.
>From the point when vendor driver pins any pages, consider IOMMU group
dirty page scope to be limited to pinned pages.
To optimize to avoid walking list often, added flag
pinned_page_dirty_scope to indicate if all of the vfio_grou
vfio_pfn.ref_count is always updated while holding iommu->lock, using
atomic variable is overkill.
Signed-off-by: Kirti Wankhede
Reviewed-by: Neo Jia
Reviewed-by: Eric Auger
Reviewed-by: Cornelia Huck
Reviewed-by: Yan Zhao
---
drivers/vfio/vfio_iommu_type1.c | 9 +
1 file changed, 5
VFIO_IOMMU_DIRTY_PAGES ioctl performs three operations:
- Start dirty pages tracking while migration is active
- Stop dirty pages tracking.
- Get dirty pages bitmap. Its user space application's responsibility to
copy content of dirty pages from source to destination during migration.
To prevent
- Defined MIGRATION region type and sub-type.
- Defined vfio_device_migration_info structure which will be placed at the
0th offset of migration region to get/set VFIO device related
information. Defined members of structure and usage on read/write access.
- Defined device states and state tr
Calculate and cache pgsize_bitmap when iommu->domain_list is updated
and iommu->external_domain is set for mdev device.
Add iommu->lock protection when cached pgsize_bitmap is accessed.
Signed-off-by: Kirti Wankhede
Reviewed-by: Neo Jia
Reviewed-by: Cornelia Huck
Reviewed-by: Yan Zhao
---
dri
Added migration capability in IOMMU info chain.
User application should check IOMMU info chain for migration capability
to use dirty page tracking feature provided by kernel module.
User application must check page sizes supported and maximum dirty
bitmap size returned by this capability structure
IOMMU container maintains a list of all pages pinned by vfio_pin_pages API.
All pages pinned by vendor driver through this API should be considered as
dirty during migration. When container consists of IOMMU capable device and
all pages are pinned and mapped, then all pages are marked dirty.
Added
Hi,
This patch set adds:
* IOCTL VFIO_IOMMU_DIRTY_PAGES to get dirty pages bitmap with
respect to IOMMU container rather than per device. All pages pinned by
vendor driver through vfio_pin_pages external API has to be marked as
dirty during migration. When IOMMU capable device is present in
Patchew URL: https://patchew.org/QEMU/20200528134035.32025-1-kra...@redhat.com/
Hi,
This series failed the asan build test. Please find the testing commands and
their output below. If you have Docker installed, you can probably reproduce it
locally.
=== TEST SCRIPT BEGIN ===
#!/bin/bash
export
On 5/28/2020 10:17 AM, Yan Zhao wrote:
The whole series works for us in general:
Reviewed-by: Yan Zhao
Thanks.
Kirti
On Wed, May 20, 2020 at 11:38:00PM +0530, Kirti Wankhede wrote:
Hi,
This patch set adds:
* IOCTL VFIO_IOMMU_DIRTY_PAGES to get dirty pages bitmap with
resp
Patchew URL: https://patchew.org/QEMU/20200528134035.32025-1-kra...@redhat.com/
Hi,
This series failed the docker-quick@centos7 build test. Please find the testing
commands and
their output below. If you have Docker installed, you can probably reproduce it
locally.
=== TEST SCRIPT BEGIN ===
#
On Thu, 28 May 2020, Gerd Hoffmann wrote:
#2 0x7f23e8bfbb13 in libusb_handle_events_timeout_completed () at
/lib64/libusb-1.0.so.0
#3 0x55e09854b7da in usb_host_abort_xfers (s=0x55e09b036dd0) at
hw/usb/host-libusb.c:963
Hmm, does reverting 76d0a9362c6a6a7d88aa18c84c4186c9107ecaef c
Signed-off-by: Roman Bolshakov
---
include/qemu/typedefs.h | 1 -
target/i386/cpu.h | 1 -
target/i386/hvf/hvf.c | 1 -
target/i386/hvf/x86.h | 4
4 files changed, 7 deletions(-)
diff --git a/include/qemu/typedefs.h b/include/qemu/typedefs.h
index ecf3cde26c..6ce0356f2c 100644
---
HVFX86EmulatorState carries it's own copy of x86 flags. It can be
dropped in favor of eflags in generic CPUX86State.
Signed-off-by: Roman Bolshakov
---
target/i386/hvf/hvf.c | 5 ++---
target/i386/hvf/x86.c | 2 +-
target/i386/hvf/x86.h | 42 --
Use the ones provided in target/i386/cpu.h instead.
Signed-off-by: Roman Bolshakov
---
target/i386/hvf/x86.c| 2 +-
target/i386/hvf/x86.h| 20
target/i386/hvf/x86_decode.c | 16 +++-
target/i386/hvf/x86_task.c | 2 +-
4 files changed, 9 insert
There's no similar field in CPUX86State, but it's needed for MMIO traps.
Signed-off-by: Roman Bolshakov
---
target/i386/cpu.h | 1 +
target/i386/hvf/hvf.c | 5 +
target/i386/hvf/x86.h | 1 -
target/i386/hvf/x86_emu.c | 12 ++--
4 files changed, 12 insertions(+), 7
The lazy flags are still needed for instruction decoder.
Signed-off-by: Roman Bolshakov
---
include/sysemu/hvf.h| 7 +
target/i386/cpu.h | 2 ++
target/i386/hvf/x86.h | 6
target/i386/hvf/x86_flags.c | 57 ++---
4 files changed,
HVFX86EmulatorState carries it's own copy of x86 registers. It can be
dropped in favor of regs in generic CPUX86State.
Signed-off-by: Roman Bolshakov
---
target/i386/hvf/x86.h | 13 +++--
target/i386/hvf/x86_emu.c | 18 +-
2 files changed, 16 insertions(+), 15 deletio
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