Re: [RFC PATCH 0/5] ebpf: Added ebpf helper for libvirtd.

2021-06-10 Thread Jason Wang
在 2021/6/10 下午2:55, Yuri Benditovich 写道: On Thu, Jun 10, 2021 at 9:41 AM Jason Wang wrote: 在 2021/6/9 下午6:04, Andrew Melnychenko 写道: Libvirt usually launches qemu with strict permissions. To enable eBPF RSS steering, qemu-ebpf-rss-helper was added. A silly question: Kernel had the

Re: [PATCH 3/4] target/riscv: Implement AIA local interrupt CSRs

2021-06-10 Thread Anup Patel
On Fri, Jun 11, 2021 at 4:49 AM Alistair Francis wrote: > > On Sat, May 15, 2021 at 12:34 AM Anup Patel wrote: > > > > We implement various AIA local interrupt CSRs for M-mode, HS-mode, > > and VS-mode. > > > > Signed-off-by: Anup Patel > > --- > > target/riscv/cpu.c| 27 +- > >

Re: [PATCH 2/4] target/riscv: Add CPU feature for AIA CSRs

2021-06-10 Thread Anup Patel
On Fri, Jun 11, 2021 at 4:46 AM Alistair Francis wrote: > > On Sat, May 15, 2021 at 12:35 AM Anup Patel wrote: > > > > We add experimental CPU feature to enable AIA CSRs. This experimental > > feature can be enabled by setting "x-aia=true" for CPU in the QEMU > > command-line parameters. > > > >

Re: [PATCH v2 04/37] target/riscv: 8-bit Addition & Subtraction Instruction

2021-06-10 Thread LIU Zhiwei
On 6/11/21 3:39 AM, Richard Henderson wrote: On 6/10/21 12:58 AM, LIU Zhiwei wrote:   include/tcg/tcg-op-gvec.h |  6 ++   tcg/tcg-op-gvec.c   | 47 Likewise, should be split from the larger patch. OK +static void gen_addv_mask_i32(TCGv_i32 d, TCGv_i32 a,

[PATCH] docs/nvdimm: update doc

2021-06-10 Thread Li Zhijian
The prompt was updated since def835f0da ('hostmem: Don't report pmem attribute if unsupported') Signed-off-by: Li Zhijian --- docs/nvdimm.txt | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/docs/nvdimm.txt b/docs/nvdimm.txt index 0aae682be3e..71cdbdf554b 100644 ---

Re: TCG op for 32 bit only cpu on qemu-riscv64

2021-06-10 Thread LIU Zhiwei
On 6/10/21 9:29 PM, Richard Henderson wrote: On 6/9/21 6:43 PM, LIU Zhiwei wrote: 1)First a multiply instruction, if the source value big enough, it will return a result with some bits not zero in MSW 32-bit. Multiply is fine.  Input bits outside the low 32 cannot appear in the low 32 of

Re: [PATCH v4 6/8] hw/intc: GICv3 redistributor ITS processing

2021-06-10 Thread Shashi Mallela
Have addressed all comments except the ones with responses(inline) below:- On Jun 8 2021, at 9:57 am, Peter Maydell wrote: > On Wed, 2 Jun 2021 at 19:00, Shashi Mallela wrote: > > > > Implemented lpi processing at redistributor to get lpi config info > > from lpi configuration table,determine

Re: [RFC PATCH v3 1/2] Adding Andes AX25 CPU model

2021-06-10 Thread Bin Meng
Hi Ruinland, On Thu, Jun 10, 2021 at 10:45 PM Ruinland Chuan-Tzu Tsai wrote: > > From: Ruinaldn ChuanTzu Tsai > > Adding the skeleton of Andes Technology AX25 CPU model for the future commits, > which will utilize custom/vendor CSR handling mechaism. typo: mechanism > --- >

Re: [PATCH 4/4] hw/riscv: virt: Use AIA INTC compatible string when available

2021-06-10 Thread Alistair Francis
On Sat, May 15, 2021 at 12:36 AM Anup Patel wrote: > > We should use the AIA INTC compatible string in the CPU INTC > DT nodes when the CPUs support AIA feature. This will allow > Linux INTC driver to use AIA local interrupt CSRs. > > Signed-off-by: Anup Patel Reviewed-by: Alistair Francis

Re: [PATCH 3/4] target/riscv: Implement AIA local interrupt CSRs

2021-06-10 Thread Alistair Francis
On Sat, May 15, 2021 at 12:34 AM Anup Patel wrote: > > We implement various AIA local interrupt CSRs for M-mode, HS-mode, > and VS-mode. > > Signed-off-by: Anup Patel > --- > target/riscv/cpu.c| 27 +- > target/riscv/cpu.h| 52 +- > target/riscv/cpu_helper.c | 245 -

Re: [PATCH 2/4] target/riscv: Add CPU feature for AIA CSRs

2021-06-10 Thread Alistair Francis
On Sat, May 15, 2021 at 12:35 AM Anup Patel wrote: > > We add experimental CPU feature to enable AIA CSRs. This experimental > feature can be enabled by setting "x-aia=true" for CPU in the QEMU > command-line parameters. > > Signed-off-by: Anup Patel > --- > target/riscv/cpu.c | 5 + >

Re: [PATCH 2/2] target/riscv: remove force HS exception

2021-06-10 Thread Alistair Francis
On Thu, Jun 3, 2021 at 5:12 AM Jose Martins wrote: > > There is no need to "force an hs exception" as the current privilege > level, the state of the global ie and of the delegation registers should > be enough to route the interrupt to the appropriate privilege level in > riscv_cpu_do_interrupt.

Re: [PATCH 1/2] target/riscv: fix VS interrupts forwarding to HS

2021-06-10 Thread Alistair Francis
On Thu, Jun 3, 2021 at 5:13 AM Jose Martins wrote: > > VS interrupts (2, 6, 10) were not correctly forwarded to hs-mode when > not delegated in hideleg (which was not being taken into account). This > was mainly because hs level sie was not always considered enabled when > it should. The spec

Re: [PATCH] target/riscv: hardwire bits in hideleg and hedeleg

2021-06-10 Thread Alistair Francis
On Sun, May 23, 2021 at 1:59 AM Jose Martins wrote: > > The specification mandates for certain bits to be hardwired in the > hypervisor delegation registers. This was not being enforced. > > Signed-off-by: Jose Martins > --- > target/riscv/csr.c | 13 +++-- > 1 file changed, 11

[PATCH v2 4/8] ui/gtk: Implement wait_dmabuf function

2021-06-10 Thread Vivek Kasireddy
Cc: Gerd Hoffmann Signed-off-by: Vivek Kasireddy --- ui/gtk.c | 15 +++ 1 file changed, 15 insertions(+) diff --git a/ui/gtk.c b/ui/gtk.c index 6132bab52f..cd884ca26c 100644 --- a/ui/gtk.c +++ b/ui/gtk.c @@ -583,6 +583,19 @@ static void gd_gl_release_dmabuf(DisplayChangeListener

Re: [PATCH v2 2/3] hw/timer: Initial commit of Ibex Timer

2021-06-10 Thread Alistair Francis
On Wed, Jun 9, 2021 at 5:57 PM Paolo Bonzini wrote: > > On 09/06/21 01:48, Alistair Francis wrote: > > Add support for the Ibex timer. This is used with the RISC-V > > mtime/mtimecmp similar to the SiFive CLINT. > > > > We currently don't support changing the prescale or the timervalue. > > > >

[PATCH v2 2/8] ui/egl: Add egl helpers to help with synchronization

2021-06-10 Thread Vivek Kasireddy
These egl helpers would be used for creating and waiting on a sync object. Cc: Gerd Hoffmann Signed-off-by: Vivek Kasireddy --- include/ui/console.h | 2 ++ include/ui/egl-helpers.h | 3 +++ ui/egl-helpers.c | 44 3 files changed, 49

[PATCH v2 5/8] ui: Create sync objects only for blobs

2021-06-10 Thread Vivek Kasireddy
For now, create sync objects only for dmabufs that are blobs. Cc: Gerd Hoffmann Signed-off-by: Vivek Kasireddy --- hw/display/virtio-gpu-udmabuf.c | 2 ++ include/ui/console.h| 1 + include/ui/egl-helpers.h| 1 + ui/gtk-egl.c| 10 ++

Re: [PATCH v1 1/1] target/riscv: Use target_ulong for the DisasContext misa

2021-06-10 Thread Alistair Francis
On Mon, May 31, 2021 at 2:27 PM Alistair Francis wrote: > > The is_32bit() check in translate.c expects a 64-bit guest to have a > 64-bit misa value otherwise the macro check won't work. This patches > fixes that and fixes a Coverity issue at the same time. > > Fixes: CID 1453107 > Signed-off-by:

[PATCH v2 8/8] virtio-gpu: Add gl_flushed callback

2021-06-10 Thread Vivek Kasireddy
Adding this callback provides a way to determine when the UI has submitted the buffer to the Host windowing system. Making the guest wait for this event will ensure that the dmabuf/buffer updates are synchronized. Cc: Gerd Hoffmann Signed-off-by: Vivek Kasireddy --- hw/display/virtio-gpu.c |

[PATCH v2 1/8] ui/gtk: Create a common release_dmabuf helper

2021-06-10 Thread Vivek Kasireddy
Since the texture release mechanism is same for both gtk-egl and gtk-glarea, move the helper from gtk-egl to common gtk code so that it can be shared by both gtk backends. Cc: Gerd Hoffmann Signed-off-by: Vivek Kasireddy --- include/ui/gtk.h | 2 -- ui/gtk-egl.c | 8 ui/gtk.c

[PATCH v2 6/8] ui/gtk-egl: Wait for the draw signal for dmabuf blobs

2021-06-10 Thread Vivek Kasireddy
Instead of immediately drawing and submitting, queue and wait for the draw signal if the dmabuf submitted is a blob. Cc: Gerd Hoffmann Signed-off-by: Vivek Kasireddy --- include/ui/gtk.h | 2 ++ ui/gtk-egl.c | 14 ++ ui/gtk.c | 2 +- 3 files changed, 17 insertions(+),

[PATCH v2 3/8] ui: Add a helper to wait on a dmabuf sync object

2021-06-10 Thread Vivek Kasireddy
This will be called by virtio-gpu in the subsequent patches. Cc: Gerd Hoffmann Signed-off-by: Vivek Kasireddy --- include/ui/console.h | 5 + ui/console.c | 10 ++ 2 files changed, 15 insertions(+) diff --git a/include/ui/console.h b/include/ui/console.h index

[PATCH v2 0/8] virtio-gpu: Add a default synchronization mechanism for blobs

2021-06-10 Thread Vivek Kasireddy
When the Guest and Host are using Blob resources, there is a chance that they may use the underlying storage associated with a Blob at the same time leading to glitches such as flickering or tearing. To prevent these from happening, the Host needs to ensure that it waits until its Blit is

[PATCH v2 7/8] virtio-gpu: Add dmabuf helpers for synchronization

2021-06-10 Thread Vivek Kasireddy
These helpers will be used in the next subsequent patches to wait until a dmabuf object (via a texture) has been used by the UI to render and submit its buffer. Cc: Gerd Hoffmann Signed-off-by: Vivek Kasireddy --- hw/display/virtio-gpu-udmabuf.c | 28

Re: [PATCH v2 2/3] hw/timer: Initial commit of Ibex Timer

2021-06-10 Thread Alistair Francis
On Wed, Jun 9, 2021 at 11:44 AM Bin Meng wrote: > > On Wed, Jun 9, 2021 at 7:49 AM Alistair Francis > wrote: > > > > Add support for the Ibex timer. This is used with the RISC-V > > mtime/mtimecmp similar to the SiFive CLINT. > > > > We currently don't support changing the prescale or the

Re: [RFC PATCH v3 2/2] Adding preliminary custom/vendor CSR handling mechanism

2021-06-10 Thread Alistair Francis
On Fri, Jun 11, 2021 at 12:44 AM Ruinland Chuan-Tzu Tsai wrote: > > From: Ruinaldn ChuanTzu Tsai > > For now we add a custom CSR handling mechanism to handle non-standard CSR read > or write. > > The write_stub() and read_zero() are provided for quick placeholder usage if > such CSRs' behavior

Re: [RFC PATCH v3 1/2] Adding Andes AX25 CPU model

2021-06-10 Thread Alistair Francis
On Fri, Jun 11, 2021 at 12:44 AM Ruinland Chuan-Tzu Tsai wrote: > > From: Ruinaldn ChuanTzu Tsai > > Adding the skeleton of Andes Technology AX25 CPU model for the future commits, > which will utilize custom/vendor CSR handling mechaism. You are missing a SoB line. See

Re: [PATCH v9 2/6] [RISCV_PM] Support CSRs required for RISC-V PM extension except for the h-mode

2021-06-10 Thread Alistair Francis
On Thu, May 27, 2021 at 4:23 AM Alexey Baturo wrote: > > Signed-off-by: Alexey Baturo Hey, Thanks for the patch. Sorry it takes me so long to get to. It would help if you could split this patch up just a little bit more. Overall it looks good. Thanks for updating it to use the new CSR

[PATCH] tcg/arm: Fix tcg_out_op function signature

2021-06-10 Thread Jose R. Ziviani
Commit 5e8892db93 fixed several function signatures but tcg_out_op for arm is missing. This patch fixes it as well. Signed-off-by: Jose R. Ziviani --- tcg/arm/tcg-target.c.inc | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/tcg/arm/tcg-target.c.inc

Re: [PATCH 1/4] target/riscv: Add defines for AIA local interrupt CSRs

2021-06-10 Thread Alistair Francis
On Sat, May 15, 2021 at 12:33 AM Anup Patel wrote: > > The RISC-V AIA specification extends RISC-V local interrupts and > introduces new CSRs. This patch adds defines for the new AIA > local interrupt CSRs. > > Signed-off-by: Anup Patel Reviewed-by: Alistair Francis Alistair > --- >

Re: [RFC PATCH v2 2/2] cputlb: implement load_helper_unaligned() for unaligned loads

2021-06-10 Thread Mark Cave-Ayland
On 10/06/2021 22:41, Richard Henderson wrote: On 6/9/21 7:10 AM, Philippe Mathieu-Daudé wrote: +    oi = make_memop_idx(MO_UB, mmu_idx); +    if (memop_big_endian(op)) { +    for (i = 0; i < size; ++i) { +    /* Big-endian load.  */ +    uint8_t val8 =

Re: [RFC PATCH v2 2/2] cputlb: implement load_helper_unaligned() for unaligned loads

2021-06-10 Thread Richard Henderson
On 6/9/21 7:10 AM, Philippe Mathieu-Daudé wrote: +oi = make_memop_idx(MO_UB, mmu_idx); +if (memop_big_endian(op)) { +for (i = 0; i < size; ++i) { +/* Big-endian load. */ +uint8_t val8 = helper_ret_ldub_mmu(env, addr + i, oi, retaddr); +val |=

[PATCH] qemu-img: Use "depth":-1 to make backing probes obvious

2021-06-10 Thread Eric Blake
The recently-added NBD context qemu:allocation-depth makes an obvious case for why it is important to distinguish between locally-present data (even with that data is sparse) [shown as depth 1 over NBD], and data that could not be found anywhere in the backing chain [shown as depth 0]. But

[PATCH RFC 1/1] linux-user/s390x: save/restore condition code state during signal handling

2021-06-10 Thread Jonathan Albrecht
When handling a signal, the signal handler may have clobbered the condition code set by the interrupted thread. Signed-off-by: Jonathan Albrecht Buglink: https://bugs.launchpad.net/qemu/+bug/1886793 Buglink: https://bugs.launchpad.net/qemu/+bug/1893040 --- linux-user/s390x/signal.c | 35

[PATCH RFC 0/1] linux-user/s390x: save/restore condition code state during signal handling

2021-06-10 Thread Jonathan Albrecht
Peter Bao and I have been looking at some issues with qemu user mode x86_64 host/s390x guest when running go1.14+ executables. >From the qemu cpu traces, it looks like the condition code is not restored after a signal handler is run. This affects go1.14+ because it uses signals heavily to

Re: iotest 233 failing

2021-06-10 Thread Daniel P . Berrangé
On Thu, Jun 10, 2021 at 10:31:14PM +0100, Daniel P. Berrangé wrote: > On Thu, Jun 10, 2021 at 03:34:46PM -0500, Eric Blake wrote: > > I'm now getting failures on iotest 233: > > > > 233 fail [15:26:01] [15:26:03] 2.1s (last: 1.3s) output > > mismatch (see 233.out.bad) > > ---

Re: iotest 233 failing

2021-06-10 Thread Daniel P . Berrangé
On Thu, Jun 10, 2021 at 03:34:46PM -0500, Eric Blake wrote: > I'm now getting failures on iotest 233: > > 233 fail [15:26:01] [15:26:03] 2.1s (last: 1.3s) output mismatch > (see 233.out.bad) > --- /home/eblake/qemu/tests/qemu-iotests/233.out > +++ 233.out.bad > @@ -65,6 +65,6 @@ >

Re: [PATCH V2 1/2] vhost-vdpa: skip ram device from the IOTLB mapping

2021-06-10 Thread Si-Wei Liu
On 6/2/2021 1:41 AM, Jason Wang wrote: vDPA is not tie to any specific hardware, for safety and simplicity, vhost-vDPA doesn't allow MMIO area to be mapped via IOTLB. Only the doorbell could be mapped via mmap(). So this patch exclude skip the ram device from the IOTLB mapping.

Re: [PATCH V2 2/2] vhost-vdpa: map virtqueue notification area if possible

2021-06-10 Thread Si-Wei Liu
Looks good. On 6/2/2021 1:41 AM, Jason Wang wrote: This patch implements the vq notification mapping support for vhost-vDPA. This is simply done by using mmap()/munmap() for the vhost-vDPA fd during device start/stop. For the device without notification mapping support, we fall back to

Re: [PATCH] qemu-{img,nbd}: Don't report zeroed cluster as a hole

2021-06-10 Thread Eric Blake
On Thu, Jun 10, 2021 at 11:09:05PM +0300, Nir Soffer wrote: > > But: > > > > $ qemu-img map --output=json -f qcow2 > > json:'{"driver":"qcow2","backing":null, \ > > "file":{"driver":"file","filename":"top.qcow2"}}' > > [{ "start": 0, "length": 65536, "depth": 0, "zero": true, "data": false}, >

Re: [PATCH 0/1] vfio-ccw: Fix garbage sense data on I/O error

2021-06-10 Thread Eric Farman
On Thu, 2021-06-10 at 16:25 -0400, Matthew Rosato wrote: > On 6/10/21 4:20 PM, Eric Farman wrote: > > Hi Conny, > > > > Per our offline discussion, here's a fix for the error when a guest > > issues "dasdfmt -M quick". It basically reverts commit 334e76850bbb > > ("vfio/ccw: update sense data if

iotest 233 failing

2021-06-10 Thread Eric Blake
I'm now getting failures on iotest 233: 233 fail [15:26:01] [15:26:03] 2.1s (last: 1.3s) output mismatch (see 233.out.bad) --- /home/eblake/qemu/tests/qemu-iotests/233.out +++ 233.out.bad @@ -65,6 +65,6 @@ == final server log == qemu-nbd: option negotiation failed: Verify failed:

Re: [PATCH 2/4] Python QEMU utils: introduce a generic feature list

2021-06-10 Thread Wainer dos Santos Moschetta
Hi, On 6/8/21 8:55 PM, Cleber Rosa Junior wrote: On Tue, Jun 8, 2021 at 5:42 PM Wainer dos Santos Moschetta mailto:waine...@redhat.com>> wrote: Hi, On 6/8/21 11:09 AM, Cleber Rosa wrote: > Which can be used to check for any "feature" that is available as a > QEMU command

Re: [PATCH 0/1] vfio-ccw: Fix garbage sense data on I/O error

2021-06-10 Thread Matthew Rosato
On 6/10/21 4:20 PM, Eric Farman wrote: Hi Conny, Per our offline discussion, here's a fix for the error when a guest issues "dasdfmt -M quick". It basically reverts commit 334e76850bbb ("vfio/ccw: update sense data if a unit check is pending") and modifies the check that builds sense data in

[PATCH 0/1] vfio-ccw: Fix garbage sense data on I/O error

2021-06-10 Thread Eric Farman
Hi Conny, Per our offline discussion, here's a fix for the error when a guest issues "dasdfmt -M quick". It basically reverts commit 334e76850bbb ("vfio/ccw: update sense data if a unit check is pending") and modifies the check that builds sense data in the TSCH handler. I opted to NOT disable

[PATCH 1/1] vfio-ccw: Keep passthrough sense data intact

2021-06-10 Thread Eric Farman
For virtual devices, there is space for sense data to be built and later copied into the IRB's ECW space once a TSCH is handled. For passthrough devices, the IRB is passed up from hardware. There might already be sense data in the ECW, in which case it would be unusual to overwrite the IRB

[Bug 1914870] Re: libvixl compilation failure on Debian unstable

2021-06-10 Thread Thomas Huth
Fix has been committed here: https://git.qemu.org/?p=qemu.git;a=commitdiff;h=2fed21d25b3a9562869 ** Changed in: qemu Status: In Progress => Fix Committed -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU.

Re: [PATCH] qemu-{img,nbd}: Don't report zeroed cluster as a hole

2021-06-10 Thread Nir Soffer
On Thu, Jun 10, 2021 at 9:35 PM Eric Blake wrote: > > On Tue, Jun 08, 2021 at 07:38:10PM +0300, Nir Soffer wrote: > > The example I provided was not detailed enough, what we actually do is: > > > > qemu-nbd .. 'json:{"driver": "qcow2", "backing": null, "file": > > {"driver": "file",

Re: [PATCH 2/4] Python QEMU utils: introduce a generic feature list

2021-06-10 Thread Willian Rampazzo
On Tue, Jun 8, 2021 at 11:09 AM Cleber Rosa wrote: > > Which can be used to check for any "feature" that is available as a > QEMU command line option, and that will return its list of available > options. > > This is a generalization of the list_accel() utility function, which > is itself

Re: [PATCH 3/4] Acceptance Tests: introduce method to require a feature and option

2021-06-10 Thread Willian Rampazzo
On Tue, Jun 8, 2021 at 11:09 AM Cleber Rosa wrote: > > In this context, and according to the qemu.utils.list_feature() utility > function, a feature is something is available as a QEMU command line > option that can take the "help" value. > > This builds on top of that utility function, and

Re: [PATCH v2 05/37] target/riscv: SIMD 16-bit Shift Instructions

2021-06-10 Thread Richard Henderson
On 6/10/21 12:58 AM, LIU Zhiwei wrote: include/tcg/tcg-op-gvec.h | 9 ++ tcg/tcg-op-gvec.c | 28 +++ Again, should be split out, with a Reviewed-by: Richard Henderson r~

Re: [PATCH 2/4] Python QEMU utils: introduce a generic feature list

2021-06-10 Thread Willian Rampazzo
On Tue, Jun 8, 2021 at 8:55 PM Cleber Rosa Junior wrote: > > > > On Tue, Jun 8, 2021 at 5:42 PM Wainer dos Santos Moschetta > wrote: >> >> Hi, >> >> On 6/8/21 11:09 AM, Cleber Rosa wrote: >> > Which can be used to check for any "feature" that is available as a >> > QEMU command line option, and

Re: [PATCH v2 04/37] target/riscv: 8-bit Addition & Subtraction Instruction

2021-06-10 Thread Richard Henderson
On 6/10/21 12:58 AM, LIU Zhiwei wrote: include/tcg/tcg-op-gvec.h | 6 ++ tcg/tcg-op-gvec.c | 47 Likewise, should be split from the larger patch. +static void gen_addv_mask_i32(TCGv_i32 d, TCGv_i32 a, TCGv_i32 b, TCGv_i32 m) +{ +

Re: [PATCH 49/55] target/arm: Implement MVE VQDMULL (vector)

2021-06-10 Thread Richard Henderson
On 6/10/21 12:08 PM, Peter Maydell wrote: On Wed, 9 Jun 2021 at 21:20, Richard Henderson wrote: On 6/7/21 9:58 AM, Peter Maydell wrote: +++ b/target/arm/mve.decode @@ -39,6 +39,8 @@ @1op_nosz &1op qd=%qd qm=%qm size=0 @2op .. size:2

Re: [PATCH 2/2] tests: migration-test: Add dirty ring test

2021-06-10 Thread Peter Xu
On Thu, Jun 10, 2021 at 08:01:44PM +0100, Dr. David Alan Gilbert wrote: > > +#include > > Does that get you the system headers, which may or may not have > KVM_CAP_DIRTY_LOG_RING if you're on an old host, or does it get you > qemu's linux-headers which definitely does? I tested it and it's

Re: [PATCH 4/4] Jobs based on custom runners: add CentOS Stream 8

2021-06-10 Thread Willian Rampazzo
On Tue, Jun 8, 2021 at 11:10 AM Cleber Rosa wrote: > > This introduces three different parts of a job designed to run > on a custom runner managed by Red Hat. The goals include: > > a) serve as a model for other organizations that want to onboard > their own runners, with their specific

Re: [PATCH 52/55] target/arm: Implement MVE VCADD

2021-06-10 Thread Peter Maydell
On Wed, 9 Jun 2021 at 22:16, Richard Henderson wrote: > > On 6/7/21 9:58 AM, Peter Maydell wrote: > > +/* > > + * VCADD Qd == Qm at size MO_32 is UNPREDICTABLE; we choose not to diagnose > > + * so we can reuse the DO_2OP macro. (Our implementation calculates the > > + * "expected" results in

Re: [PATCH 49/55] target/arm: Implement MVE VQDMULL (vector)

2021-06-10 Thread Peter Maydell
On Wed, 9 Jun 2021 at 21:20, Richard Henderson wrote: > > On 6/7/21 9:58 AM, Peter Maydell wrote: > > +++ b/target/arm/mve.decode > > @@ -39,6 +39,8 @@ > > @1op_nosz &1op qd=%qd qm=%qm > > size=0 > > @2op .. size:2

Re: [PATCH 2/2] tests: migration-test: Add dirty ring test

2021-06-10 Thread Dr. David Alan Gilbert
* Peter Xu (pet...@redhat.com) wrote: > Add dirty ring test if kernel supports it. Add the dirty ring parameter on > source should be mostly enough, but let's change the dest too to make them > match always. > > Signed-off-by: Peter Xu > --- > tests/qtest/migration-test.c | 51

Re: [PATCH 1/2] tests: migration-test: Still run the rest even if uffd missing

2021-06-10 Thread Dr. David Alan Gilbert
* Peter Xu (pet...@redhat.com) wrote: > Currently we'll skip the whole migration-test if uffd missing. > > It's a bit harsh - we can still run the rest besides postcopy! Enable them > when we still can. > > It'll happen more frequently now after kernel UFFD_USER_MODE_ONLY introduced > in >

Re: [PATCH 0/4] Jobs based on custom runners: add CentOS Stream 8

2021-06-10 Thread Willian Rampazzo
On Tue, Jun 8, 2021 at 11:09 AM Cleber Rosa wrote: > > This builds on top the "GitLab Custom Runners and Jobs (was: QEMU > Gating CI)" series, showing an example of how other entities can > add their own custom jobs to the GitLab CI pipeline. > > First of all, it may be useful to see an actual

Re: [PATCH v4 04/32] block/nbd: connect_thread_func(): do qio_channel_set_delay(false)

2021-06-10 Thread Eric Blake
On Thu, Jun 10, 2021 at 01:07:34PM +0300, Vladimir Sementsov-Ogievskiy wrote: > nbd_open() does it (through nbd_establish_connection()). > Actually we lost that call on reconnect path in 1dc4718d849e1a1fe > "block/nbd: use non-blocking connect: fix vm hang on connect()" > when we have introduced

[PATCH 1/1] hw: virt: consider hw_compat_6_0

2021-06-10 Thread Heinrich Schuchardt
virt-6.0 must consider hw_compat_6_0. Signed-off-by: Heinrich Schuchardt --- hw/arm/virt.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 840758666d..8bc3b408fe 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -2764,6 +2764,8 @@

Re: [PATCH] qemu-{img,nbd}: Don't report zeroed cluster as a hole

2021-06-10 Thread Eric Blake
On Tue, Jun 08, 2021 at 07:38:10PM +0300, Nir Soffer wrote: > The example I provided was not detailed enough, what we actually do is: > > qemu-nbd .. 'json:{"driver": "qcow2", "backing": null, "file": > {"driver": "file", "filename": "top.qcow2"}}' > > So there is no backing chain and

Re: [PATCH] hw/nvme: be more careful when deasserting IRQs

2021-06-10 Thread Klaus Jensen
On Jun 10 13:46, Jakub Jermář wrote: An IRQ vector used by a completion queue cannot be deasserted without first checking if the same vector does not need to stay asserted for some other completion queue. Signed-off-by: Jakub Jermar --- hw/nvme/ctrl.c | 21 +++-- 1 file changed,

Re: [PATCH v2 03/37] target/riscv: 16-bit Addition & Subtraction Instructions

2021-06-10 Thread Richard Henderson
On 6/10/21 12:58 AM, LIU Zhiwei wrote: Include 5 groups: Wrap-around (dropping overflow), Signed Halving, Unsigned Halving, Signed Saturation, and Unsigned Saturation. Signed-off-by: LIU Zhiwei --- include/tcg/tcg-op-gvec.h | 10 + target/riscv/helper.h | 30

Re: [PATCH] accel/tcg: Use MiB in tcg_init_machine

2021-06-10 Thread Philippe Mathieu-Daudé
On 6/10/21 6:40 PM, Richard Henderson wrote: > Suggested-by: Alex Bennée > Signed-off-by: Richard Henderson > --- > > This sits in the middle of my "Clean up code_gen_buffer allocation" > patch set. Alex mentioned it during review, and I had already made > the change. > > This is the only

RE: [PATCH] tcg: Fix documentation for tcg_constant_* vs tcg_temp_free_*

2021-06-10 Thread Luis Fernando Fujita Pires
From: Richard Henderson > At some point during the development of tcg_constant_*, I changed my mind > about whether such temps should be able to be passed to tcg_temp_free_*. > The final version committed allows this, but the commentary was not updated > to match. > > Fixes: c0522136adf >

Re: [PATCH v4 01/32] co-queue: drop extra coroutine_fn marks

2021-06-10 Thread Vladimir Sementsov-Ogievskiy
10.06.2021 20:22, Eric Blake wrote: On Thu, Jun 10, 2021 at 01:07:31PM +0300, Vladimir Sementsov-Ogievskiy wrote: qemu_co_queue_next() and qemu_co_queue_restart_all() just call aio_co_wake() which works well in non-coroutine context. So these functions can be called from non-coroutine context

Re: [PATCH] hw/nvme: be more careful when deasserting IRQs

2021-06-10 Thread Klaus Jensen
+cc qemu-block, maintainers On Jun 10 13:46, Jakub Jermář wrote: An IRQ vector used by a completion queue cannot be deasserted without first checking if the same vector does not need to stay asserted for some other completion queue. Signed-off-by: Jakub Jermar --- hw/nvme/ctrl.c | 21

Re: Re: [RFC v1] virtio/vsock: add two more queues for datagram types

2021-06-10 Thread Jiang Wang .
On Thu, Jun 10, 2021 at 2:40 AM Stefano Garzarella wrote: > > On Thu, Jun 10, 2021 at 12:14:24AM +, Jiang Wang wrote: > >Datagram sockets are connectionless and unreliable. > >The sender does not know the capacity of the receiver > >and may send more packets than the receiver can handle. > >

RE: [PATCH] accel/tcg: Use MiB in tcg_init_machine

2021-06-10 Thread Luis Fernando Fujita Pires
From: Richard Henderson > Suggested-by: Alex Bennée > Signed-off-by: Richard Henderson > --- > > This sits in the middle of my "Clean up code_gen_buffer allocation" > patch set. Alex mentioned it during review, and I had already made the > change. > > This is the only patch in the set that

Re: [PATCH v4 01/32] co-queue: drop extra coroutine_fn marks

2021-06-10 Thread Eric Blake
On Thu, Jun 10, 2021 at 01:07:31PM +0300, Vladimir Sementsov-Ogievskiy wrote: > qemu_co_queue_next() and qemu_co_queue_restart_all() just call > aio_co_wake() which works well in non-coroutine context. So these > functions can be called from non-coroutine context as well. And > actually

Re: [PATCH v2 1/3] target/ppc: Turn ppc_tlb_invalid_all in a noop

2021-06-10 Thread Bruno Piazera Larsen
On 10/06/2021 13:46, Lucas Mateus Castro (alqotel) wrote: The function ppc_tlb_invalid_all is now a no op when compiling without TCG. Signed-off-by: Lucas Mateus Castro (alqotel) --- target/ppc/mmu_helper.c | 4 1 file changed, 4 insertions(+) diff --git a/target/ppc/mmu_helper.c

[Bug 1913919] Re: Heap-buffer-overflow in sdhci_write_dataport

2021-06-10 Thread Thomas Huth
Ok, thanks for confirmation, then let's close this ticket here. If you encounter such a problem again, please open a new ticket in the new gitlab issue tracker. ** Changed in: qemu Status: Incomplete => Fix Released -- You received this bug notification because you are a member of qemu-

Re: [PATCH v2 3/3] target/ppc: moved ppc_store_sdr1 to mmu_common.c

2021-06-10 Thread Bruno Piazera Larsen
On 10/06/2021 13:46, Lucas Mateus Castro (alqotel) wrote: Moved ppc_store_sdr1 to mmu_common.c as it was originally in mmu_helper.c. Signed-off-by: Lucas Mateus Castro (alqotel) --- target/ppc/cpu.c| 28 target/ppc/mmu_common.c | 28

[PATCH v2 2/3] target/ppc: divided mmu_helper.c in 2 files

2021-06-10 Thread Lucas Mateus Castro (alqotel)
Moved functions in mmu_helper.c that should be compiled in build to mmu_common.c, moved declaration of functions that both files use to cpu.h and moved struct declarations and inline functions needed by both to target/ppc/internal.h. Updated meson.build to compile the new file. ppc6xx_tlb_getnum

[PATCH v2 3/3] target/ppc: moved ppc_store_sdr1 to mmu_common.c

2021-06-10 Thread Lucas Mateus Castro (alqotel)
Moved ppc_store_sdr1 to mmu_common.c as it was originally in mmu_helper.c. Signed-off-by: Lucas Mateus Castro (alqotel) --- target/ppc/cpu.c| 28 target/ppc/mmu_common.c | 28 2 files changed, 28 insertions(+), 28 deletions(-)

[PATCH v2 0/3] target/ppc: mmu cleanup

2021-06-10 Thread Lucas Mateus Castro (alqotel)
This patch series aims to clean up some of the code mmu_helper.c, including removing the #includes inside ifdef. Helpers are in mmu_helper.c now and code that is needed in a !TCG build is in mmu_common.c. Comments are welcome, thanks, Lucas Mateus. Based-on:

[PATCH v2 1/3] target/ppc: Turn ppc_tlb_invalid_all in a noop

2021-06-10 Thread Lucas Mateus Castro (alqotel)
The function ppc_tlb_invalid_all is now a no op when compiling without TCG. Signed-off-by: Lucas Mateus Castro (alqotel) --- target/ppc/mmu_helper.c | 4 1 file changed, 4 insertions(+) diff --git a/target/ppc/mmu_helper.c b/target/ppc/mmu_helper.c index 1ecb36e85a..e7ba39c9e1 100644 ---

[PATCH] tcg: Fix documentation for tcg_constant_* vs tcg_temp_free_*

2021-06-10 Thread Richard Henderson
At some point during the development of tcg_constant_*, I changed my mind about whether such temps should be able to be passed to tcg_temp_free_*. The final version committed allows this, but the commentary was not updated to match. Fixes: c0522136adf Reported-by: Peter Maydell Signed-off-by:

[PATCH] accel/tcg: Use MiB in tcg_init_machine

2021-06-10 Thread Richard Henderson
Suggested-by: Alex Bennée Signed-off-by: Richard Henderson --- This sits in the middle of my "Clean up code_gen_buffer allocation" patch set. Alex mentioned it during review, and I had already made the change. This is the only patch in the set that has not been posted and reviewed. Rather

Re: [Bug 1913919] Re: Heap-buffer-overflow in sdhci_write_dataport

2021-06-10 Thread Alexander Bulekov
There were a few patches some months ago that fixed the sdhci issues, and OSS-Fuzz said that all of the heap-overflows that it has seen in sdhci have been fixed. -Alex On 210610 1544, Thomas Huth wrote: > Can you still reproduce this issue with the latest git version of QEMU? > ... for me, it

Re: [PATCH v3 26/26] virtiofsd: Ask qemu to drop CAP_FSETID if client asked for it

2021-06-10 Thread Stefan Hajnoczi
On Thu, Jun 10, 2021 at 04:29:42PM +0100, Dr. David Alan Gilbert wrote: > * Dr. David Alan Gilbert (dgilb...@redhat.com) wrote: > > * Stefan Hajnoczi (stefa...@redhat.com) wrote: > > > > > > Instead I was thinking about VHOST_USER_DMA_READ/WRITE messages > > > containing the address (a device

Re: [RFC PATCH v3 2/2] Adding preliminary custom/vendor CSR handling mechanism

2021-06-10 Thread Richard Henderson
On 6/10/21 7:44 AM, Ruinland Chuan-Tzu Tsai wrote: --- /dev/null +++ b/target/riscv/andes_cpu_bits.h @@ -0,0 +1,113 @@ +/* = AndeStar V5 machine mode CSRs = */ --- /dev/null +++ b/target/riscv/csr_andes.inc.c @@ -0,0 +1,153 @@ +/* Andes Custom Registers */ --- /dev/null +++

Re: [PATCH v2] qga-win: Free GMatchInfo properly

2021-06-10 Thread Daniel P . Berrangé
On Thu, Jun 10, 2021 at 07:08:36PM +0300, Konstantin Kostiuk wrote: > On Thu, Jun 10, 2021 at 7:02 PM Daniel P. Berrangé > wrote: > > > On Thu, Jun 10, 2021 at 06:58:11PM +0300, Kostiantyn Kostiuk wrote: > > > The g_regex_match function creates match_info even if it > > > returns FALSE. So we

Re: [PATCH v2] qga-win: Free GMatchInfo properly

2021-06-10 Thread Konstantin Kostiuk
On Thu, Jun 10, 2021 at 7:02 PM Daniel P. Berrangé wrote: > On Thu, Jun 10, 2021 at 06:58:11PM +0300, Kostiantyn Kostiuk wrote: > > The g_regex_match function creates match_info even if it > > returns FALSE. So we should always call g_match_info_free. > > A better solution is using g_autoptr for

Re: [PATCH v2] qga-win: Free GMatchInfo properly

2021-06-10 Thread Daniel P . Berrangé
On Thu, Jun 10, 2021 at 06:58:11PM +0300, Kostiantyn Kostiuk wrote: > The g_regex_match function creates match_info even if it > returns FALSE. So we should always call g_match_info_free. > A better solution is using g_autoptr for match_info variable. > > Signed-off-by: Kostiantyn Kostiuk > ---

Re: [PATCH v2] qga-win: Free GMatchInfo properly

2021-06-10 Thread Philippe Mathieu-Daudé
On 6/10/21 5:58 PM, Kostiantyn Kostiuk wrote: > The g_regex_match function creates match_info even if it > returns FALSE. So we should always call g_match_info_free. > A better solution is using g_autoptr for match_info variable. > > Signed-off-by: Kostiantyn Kostiuk > --- >

Re: [RFC PATCH v2 1/2] qapi: Inline qmp_marshal_output() functions

2021-06-10 Thread Philippe Mathieu-Daudé
On 6/10/21 1:06 PM, Markus Armbruster wrote: > Philippe Mathieu-Daudé writes: > >> On 6/10/21 11:33 AM, Markus Armbruster wrote: >>> Eric Blake writes: >>> On Wed, Jun 09, 2021 at 08:49:54PM +0200, Philippe Mathieu-Daudé wrote: > In case we need to use QAPI types but no QAPI command /

[Bug 1888714] Re: Memory Leak in hpet_timer results in unusable machine

2021-06-10 Thread Thomas Huth
Still reproduces with the current git version (commit 7fe7fae8b48e3f9c647) ** Tags added: fuzzer test ** Changed in: qemu Status: New => Confirmed -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU.

Re: [PATCH] qga-win: Free GMatchInfo properly

2021-06-10 Thread Konstantin Kostiuk
Thanks, Daniel! A new patch was sent. Best wishes, Kostiantyn Kostiuk On Thu, Jun 10, 2021 at 6:23 PM Daniel P. Berrangé wrote: > On Thu, Jun 10, 2021 at 05:53:35PM +0300, Konstantin Kostiuk wrote: > > Hi All, > > > > For freeing GMatchInfo struct, a special function is required. I'm not >

[PATCH v2] qga-win: Free GMatchInfo properly

2021-06-10 Thread Kostiantyn Kostiuk
The g_regex_match function creates match_info even if it returns FALSE. So we should always call g_match_info_free. A better solution is using g_autoptr for match_info variable. Signed-off-by: Kostiantyn Kostiuk --- qga/commands-win32.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-)

[Bug 1880355] Re: Length restrictions for fw_cfg_dma_transfer?

2021-06-10 Thread Thomas Huth
Can you still reproduce this problem with the current git version of QEMU? ... for me, the command now returns immediately. ** Changed in: qemu Status: New => Incomplete -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU.

[Bug 1913919] Re: Heap-buffer-overflow in sdhci_write_dataport

2021-06-10 Thread Thomas Huth
Can you still reproduce this issue with the latest git version of QEMU? ... for me, it does not crash anymore. ** Changed in: qemu Status: New => Incomplete -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU.

[PATCH v2] migration/rdma: Use huge page register VM memory

2021-06-10 Thread LIZHAOXIN1 [李照鑫]
When using libvirt for RDMA live migration, if the VM memory is too large, it will take a lot of time to deregister the VM at the source side, resulting in a long downtime (VM 64G, deregister vm time is about 400ms). Although the VM's memory uses 2M huge pages, the MLNX driver still uses 4K

回复: [PATCH] migration/rdma: Use huge page register VM memory

2021-06-10 Thread LIZHAOXIN1 [李照鑫]
Yes, When I configured two NUMAs for the VM, the name of the memory is 'ram-node*', and other architectures had different names. As you suggested, I use qemu_ram_pagesize() and qemu_real_host_page_size to determine which Ramblocks use huge page. I will send the patch second version later. when

Re: qemu: arm: mounting ubifs using nandsim on busybox

2021-06-10 Thread Pintu Agarwal
On Thu, 10 Jun 2021 at 19:22, Richard Weinberger wrote: > > Pintu, > > - Ursprüngliche Mail - > > Von: "Pintu Agarwal" > >> nandsim works as expected. It creates a new and *erased* NAND for you. > >> So you have no UBI volumes. Therfore UBIFS cannot be mounted. > >> I suggest creating a

回复: [PATCH] migration/rdma: Use huge page register VM memory

2021-06-10 Thread LIZHAOXIN1 [李照鑫]
Yes, 'pc.ram' is the specific name for x86. I have read that memory_region_allocate_system_memory assigns different names to other architectures. Thanks for your reminding. Regards, lizhaoxin. -邮件原件- 发件人: Daniel P. Berrangé 发送时间: 2021年6月7日 22:18 收件人: LIZHAOXIN1 [李照鑫] 抄送:

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