Hi Kevin,
Thank you for your reply and detailed answers.
In my scenario is the iSCSI SAN environment. The network storage device
is connected to the physical machine via iSCSI, and LVM is used as the
middle layer between the storage device and the VM for storage
management and metadata
From: Klaus Jensen
Rename the trace events related to writing the event index and reading
the doorbell value to make it more clear that the event is associated
with an actual update (write or read respectively).
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Keith Busch
Signed-off-by: Klaus
From: Klaus Jensen
Replace the local Error variable with errp and ERRP_GUARD() and change
the return value to bool.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Klaus Jensen
---
hw/nvme/ctrl.c | 25 -
1 file changed, 12 insertions(+), 13 deletions(-)
diff --git
From: Klaus Jensen
Prior to reading the shadow doorbell cq head, we have to update the
eventidx. Otherwise, we risk that the driver will skip an mmio doorbell
write. This happens on riscv64, as reported by Guenter.
Adding the missing update to the cq eventidx fixes the issue.
Fixes:
From: Klaus Jensen
Replace various ->parent_obj use with the equivalent QOM accessors.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Klaus Jensen
---
hw/nvme/ctrl.c | 89 +++---
1 file changed, 48 insertions(+), 41 deletions(-)
diff --git
From: Klaus Jensen
The eventidx and doorbell value are not handling endianness correctly.
Fix this.
Fixes: 3f7fe8de3d49 ("hw/nvme: Implement shadow doorbell buffer support")
Cc: qemu-sta...@nongnu.org
Reported-by: Guenter Roeck
Reviewed-by: Keith Busch
Signed-off-by: Klaus Jensen
---
From: Klaus Jensen
Hi Peter,
The following changes since commit 528d9f33cad5245c1099d77084c78bb2244d5143:
Merge tag 'pull-tcg-20230106' of https://gitlab.com/rth7680/qemu into staging
(2023-01-08 11:23:17 +)
are available in the Git repository at:
From: Klaus Jensen
Remove an unnecessary local Error value in nvme_realize(). In the
process, change nvme_check_constraints() to return a bool.
Reviewed-by: Markus Armbruster
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Klaus Jensen
---
hw/nvme/ctrl.c | 48
On 2023/1/11 13:00, Alistair Francis wrote:
On Wed, Dec 28, 2022 at 4:23 PM Weiwei Li wrote:
This patchset implements RISC-V Zc* extension v1.0.0.RC5.7 version instructions.
Specification:
https://github.com/riscv/riscv-code-size-reduction/tree/main/Zc-specification
The port is available
On Tue, Jan 10, 2023 at 5:11 AM Eric Auger wrote:
>
> Hi,
>
> On 1/9/23 14:24, Eric Auger wrote:
> > Hi,
> >
> > we have a trouble with virtio-iommu and protected assigned devices
> > downstream to a pcie-to-pci bridge. In that use case we observe the
> > assigned devices are not put to any
This patch replaces hw_error to guest error log for [read|write]b
accesses when mode_16bit is enabled. This avoids aborting qemu.
Fixes: 1248f8d4cbc3 ("hw/lan9118: Add basic 16-bit mode support.")
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1433
Reported-by: Qiang Liu
Signed-off-by:
On 10/1/23 23:01, BALATON Zoltan wrote:
On Tue, 10 Jan 2023, Philippe Mathieu-Daudé wrote:
The 'hwaddr' type is defined in "exec/hwaddr.h" as:
hwaddr is the type of a physical address
(its size can be different from 'target_ulong').
All definitions use the 'HWADDR_' prefix, except
This patch series adds options to select a preferred codec and also
to forward a dmabuf directly to the encoder module that is part of
the Spice server. Currently, gstreamer:h264 is the only combination
tested but additional work is ongoing to test other combinations.
Tested with: -device
Giving users an option to choose a particular codec will enable
them to make an appropriate decision based on their hardware and
use-case.
Cc: Gerd Hoffmann
Cc: Marc-André Lureau
Cc: Dongwon Kim
Signed-off-by: Vivek Kasireddy
---
qemu-options.hx | 5 +
ui/spice-core.c | 14
This patch adds support for gl=on and port != 0. In other words,
with this option enabled, it should be possible to stream the
content associated with the dmabuf without making any additional
copies.
The encoder (that is part of Spice Server) extracts the dmabuf
fd from the drawable (RedDrawable)
On Wed, Jan 11, 2023 at 4:17 AM Daniel Henrique Barboza
wrote:
>
> All RISCV CPUs are setting cpu->cfg during their cpu_init() functions,
> meaning that there's no reason to skip all the misa validation and setup
> if misa_ext was set beforehand - especially since we're setting an
> updated value
On Wed, Jan 11, 2023 at 4:17 AM Daniel Henrique Barboza
wrote:
>
> There is an informal contract between the cpu_init() functions and
> riscv_cpu_realize(): if cpu->env.misa_ext is zero, assume that the
> default settings were loaded via register_cpu_props() and do validations
> to set
On Wed, Jan 11, 2023 at 12:40 PM Parav Pandit wrote:
>
>
> > From: Jason Wang
> > Sent: Tuesday, January 10, 2023 11:35 PM
> >
> > On Tue, Jan 10, 2023 at 11:02 AM Parav Pandit wrote:
> > >
> > > Hi Jason,
> > >
> > > > From: Jason Wang
> > > > Sent: Monday, December 5, 2022 10:25 PM
> > >
> >
Peter Maydell writes:
> On Tue, 10 Jan 2023 at 16:26, Markus Armbruster wrote:
>> Peter Maydell writes:
>> > Does it actually require '.' on the PATH, or does it just want
>> > a qemu-img binary on the PATH? (eg your distro one in /usr/bin).
>> > I don't have '.' on my PATH and it works for
On 1/9/23 14:42, Fabiano Rosas wrote:
This function is needed by common code (ptw.c), so move it along with
the other regime_* functions in internal.h. When we enable the build
without TCG, the tlb_helper.c file will not be present.
Signed-off-by: Fabiano Rosas
---
Richard: this cannot into
On 1/10/23 12:14, Daniel Henrique Barboza wrote:
+/*
+ * Register CPU props based on env.misa_ext. If a non-zero
+ * value was set, register only the required cpu->cfg.ext_*
+ * properties and leave. env.misa_ext = 0 means that we want
+ * all the default properties to be registered.
+ */
On Mon, Jan 2, 2023 at 9:54 PM Daniel Henrique Barboza
wrote:
>
> Hi,
>
> This new version is still rebased on top of [1]:
>
> "[PATCH v2 00/12] hw/riscv: Improve Spike HTIF emulation fidelity"
>
> from Bin Meng.
>
> The change from v4 is on patch 9 where we added an extra flag in
>
On Wed, Jan 11, 2023 at 6:17 AM Daniel Henrique Barboza
wrote:
>
> Hi,
>
> I found this bug when testing my avocado changes in riscv-to-apply.next.
> The sifive_u board, both 32 and 64 bits, stopped booting OpenSBI. The
> guest hangs indefinitely.
>
> Git bisect points that this patch broke
On Wed, Dec 28, 2022 at 4:23 PM Weiwei Li wrote:
>
> This patchset implements RISC-V Zc* extension v1.0.0.RC5.7 version
> instructions.
>
> Specification:
> https://github.com/riscv/riscv-code-size-reduction/tree/main/Zc-specification
>
> The port is available here:
>
> From: Jason Wang
> Sent: Tuesday, January 10, 2023 11:35 PM
>
> On Tue, Jan 10, 2023 at 11:02 AM Parav Pandit wrote:
> >
> > Hi Jason,
> >
> > > From: Jason Wang
> > > Sent: Monday, December 5, 2022 10:25 PM
> >
> > >
> > > A dumb question, any reason we need bother with virtio-net? It
On Tue, Jan 10, 2023 at 11:02 AM Parav Pandit wrote:
>
> Hi Jason,
>
> > From: Jason Wang
> > Sent: Monday, December 5, 2022 10:25 PM
>
> >
> > A dumb question, any reason we need bother with virtio-net? It looks to me
> > it's
> > not a must and would complicate migration compatibility.
>
>
qemu-user can hang in a multi-threaded fork. One common
reason is that when creating a TB, between fork and exec
we manipulate a GTree whose memory allocator (GSlice) is
not fork-safe.
Although POSIX does not mandate it, the system's allocator
(e.g. tcmalloc, libc malloc) is probably fork-safe.
The only reason to add this tree is to control the memory allocator
used. Some users (e.g. TCG) cannot work reliably in multi-threaded
environments (e.g. forking in user-mode) with GTree's allocator, GSlice.
See https://gitlab.com/qemu-project/qemu/-/issues/285 for details.
Importing GTree is a
Context:
https://gitlab.com/qemu-project/qemu/-/issues/285
So far the only fix that we have had posted on the list is
https://lists.gnu.org/archive/html/qemu-devel/2022-10/msg00391.html
by Daniel. The approach that I'm following here should have
the same outcome, except that it doesn't change
On 1/9/23 21:52, Richard Henderson wrote:
On 1/9/23 14:42, Fabiano Rosas wrote:
We want to move sme_helper into the tcg directory, but the cpregs
accessor functions cannot go along, otherwise they would be separate
from the respective ARMCPRegInfo definition which needs to be compiled
with
On 1/10/23 00:29, Philippe Mathieu-Daudé wrote:
+static const char *sname[] = {
Oh,
const char * const sname[]
should have caught that the first time.
r~
On Tue, Jan 10, 2023 at 20:58:01 +, Alex Bennée wrote:
> Emilio Cota writes:
(snip)
> > +static inline void qht_do_if_first_in_stripe(const struct qht_map *map,
> > + struct qht_bucket *b,
> > + void
Dear Fred,
On Tue, Jan 10, 2023 at 9:57 PM Konrad, Frederic
wrote:
> Hi,
>
> > -Original Message-
> > From: qemu-devel-bounces+fkonrad=amd@nongnu.org
> On Behalf Of
> > Qiang Liu
> > Sent: 09 January 2023 07:00
> > To: qemu-devel@nongnu.org
> > Cc: Qiang Liu ; Alistair Francis <
>
Add ability to dump /tmp/perf-.map and jit-.dump.
The first one allows the perf tool to map samples to each individual
translation block. The second one adds the ability to resolve symbol
names, line numbers and inspect JITed code.
Example of use:
perf record qemu-x86_64 -perfmap ./a.out
Add libdw-based functions for loading and querying debuginfo. Load
debuginfo from the system and the linux-user loaders.
This is useful for the upcoming perf support, which can then put
human-readable guest symbols instead of raw guest PCs into perfmap and
jitdump files.
Signed-off-by: Ilya
When exiting due to an exit() syscall, qemu-user calls
preexit_cleanup(), but this is currently not the case when exiting due
to a signal. This leads to various buffers not being flushed (e.g.,
for gprof, for gcov, and for the upcoming perf support).
Add the missing call.
Signed-off-by: Ilya
v2:
https://lists.gnu.org/archive/html/qemu-devel/2022-11/msg02385.html
https://lists.gnu.org/archive/html/qemu-devel/2023-01/msg01026.html
v2 -> v3:
* Enable only for CONFIG_LINUX (Alex).
* Use qemu_get_thread_id() instead of gettid() (Alex).
* Fix CI (Alex).
On Tue, 10 Jan 2023, Mark Cave-Ayland wrote:
On 04/01/2023 21:59, BALATON Zoltan wrote:
OpenBIOS cannot run FCode ROMs yet but it can detect NDRV in VGA card
ROM and add it to the device tree for MacOS. Pass the NDRV this way
instead of via fw_cfg. This solves the problem with OpenBIOS also
On Tue, 10 Jan 2023, Mark Cave-Ayland wrote:
On 04/01/2023 21:59, BALATON Zoltan wrote:
The mac99 machine emulates different machines depending on machine
properties or even if it is run as qemu-system-ppc64 or
qemu-system-ppc. This is very confusing for users and many hours were
lost trying to
On Tue, 10 Jan 2023, Mark Cave-Ayland wrote:
On 04/01/2023 21:59, BALATON Zoltan wrote:
Setting emulated machine type with a property called "via" is
confusing users so deprecate the "via" option in favour of newly added
explicit machine types. The default via=cuda option is not a valid
config
Richard Henderson writes:
> Begin staging in support for TCGv_i128 with Int128.
> Define the type enumerator, the typedef, and the
> helper-head.h macros.
>
> This cannot yet be used, because you can't allocate
> temporaries of this new type.
>
> Signed-off-by: Richard Henderson
Reviewed-by:
On Tue, Jan 10, 2023 at 06:18:29PM -0500, John Snow wrote:
> On Tue, Jan 10, 2023 at 3:34 AM Peter Delevoryas wrote:
> >
> > On macOS, private $TMPDIR's are the default. These $TMPDIR's are
> > generated from a user's unix UID and UUID [1], which can create a
> > relatively long path:
> >
> >
On Tue, Jan 10, 2023 at 3:34 AM Peter Delevoryas wrote:
>
> On macOS, private $TMPDIR's are the default. These $TMPDIR's are
> generated from a user's unix UID and UUID [1], which can create a
> relatively long path:
>
> /var/folders/d7/rz20f6hd709c1ty8f6_6y_z4gn/T/
>
> QEMU's avocado
On 10/01/2023 09:53, Thomas Huth wrote:
The basic idea of this patch set is to change hw/rtc/mc146818rtc.c into
target independent code so that the file only has to be compiled once
instead of multiple times (and that it can be used in a qemu-system-all
binary once we get there).
The first
On 08/01/2023 02:36, Richard Henderson wrote:
Changes for v4:
* About half of the v3 series has been merged,
* AArch64 host requires even argument register.
* target/{arm,ppc,s390x,i386} uses included here.
Patches requiring review:
On 06/01/2023 21:33, ~henca wrote:
From: Henrik Carlqvist
SUN Type 4, 5 and 5c keyboards have dip switches to choose the language
layout of the keyboard. Solaris makes an ioctl to query the value of the
dipswitches and uses that value to select keyboard layout. Also the SUN
bios like the one
Am 9. Januar 2023 19:24:16 UTC schrieb John Snow :
>On Tue, Sep 6, 2022 at 10:27 AM Bernhard Beschow wrote:
>>
>> Am 19. Februar 2022 08:08:17 UTC schrieb Liav Albani :
>> >This is a preparation before I send v3 of ich6-ide controller emulation
>> >patch.
>> >I figured that it's more trivial
On Wed, Jan 11, 2023 at 6:17 AM Daniel Henrique Barboza
wrote:
>
> All RISCV CPUs are setting cpu->cfg during their cpu_init() functions,
> meaning that there's no reason to skip all the misa validation and setup
> if misa_ext was set beforehand - especially since we're setting an
> updated value
On Wed, Jan 11, 2023 at 6:17 AM Daniel Henrique Barboza
wrote:
>
> There is an informal contract between the cpu_init() functions and
> riscv_cpu_realize(): if cpu->env.misa_ext is zero, assume that the
> default settings were loaded via register_cpu_props() and do validations
> to set
On 04/01/2023 21:59, BALATON Zoltan wrote:
Setting emulated machine type with a property called "via" is
confusing users so deprecate the "via" option in favour of newly added
explicit machine types. The default via=cuda option is not a valid
config (no real Mac has this combination of
On Tue, Jan 10, 2023 at 1:19 AM Chao Peng wrote:
> >
> > Regarding the userspace side of things, please include Vishal's selftests
> > in v11,
> > it's impossible to properly review the uAPI changes without seeing the
> > userspace
> > side of things. I'm in the process of reviewing Vishal's
On 04/01/2023 21:59, BALATON Zoltan wrote:
The mac99 machine emulates different machines depending on machine
properties or even if it is run as qemu-system-ppc64 or
qemu-system-ppc. This is very confusing for users and many hours were
lost trying to explain it or finding out why commands users
On Wed, Jan 11, 2023 at 6:21 AM Daniel Henrique Barboza
wrote:
>
>
>
> On 1/10/23 08:43, Daniel Henrique Barboza wrote:
> >
> >
> > On 1/8/23 00:33, Bin Meng wrote:
> >> On Mon, Jan 2, 2023 at 7:55 PM Daniel Henrique Barboza
> >> wrote:
> >>> The microchip_icicle_kit, sifive_u, spike and virt
On Mon, Jan 2, 2023 at 9:55 PM Daniel Henrique Barboza
wrote:
>
> The microchip_icicle_kit, sifive_u, spike and virt boards are now doing
> the same steps when '-kernel' is used:
>
> - execute load_kernel()
> - load init_rd()
> - write kernel_cmdline
>
> Let's fold everything inside
On Mon, Jan 2, 2023 at 9:57 PM Daniel Henrique Barboza
wrote:
>
> The only remaining caller is riscv_load_kernel_and_initrd() which
> belongs to the same file.
>
> Signed-off-by: Daniel Henrique Barboza
> Reviewed-by: Philippe Mathieu-Daudé
> Reviewed-by: Bin Meng
Reviewed-by: Alistair
On Mon, Jan 2, 2023 at 9:55 PM Daniel Henrique Barboza
wrote:
>
> All callers are using kernel_filename as machine->kernel_filename.
>
> This will also simplify the changes in riscv_load_kernel() that we're
> going to do next.
>
> Cc: Palmer Dabbelt
> Signed-off-by: Daniel Henrique Barboza
>
On Mon, Jan 2, 2023 at 9:55 PM Daniel Henrique Barboza
wrote:
>
> 'filename', 'mem_size' and 'fdt' from riscv_load_initrd() can all be
> retrieved by the MachineState object for all callers.
>
> Cc: Palmer Dabbelt
> Signed-off-by: Daniel Henrique Barboza
> Reviewed-by: Philippe Mathieu-Daudé
>
On Mon, Jan 2, 2023 at 9:55 PM Daniel Henrique Barboza
wrote:
>
> The sifive_u, spike and virt machines are writing the 'bootargs' FDT
> node during their respective create_fdt().
>
> Given that bootargs is written only when '-append' is used, and this
> option is only allowed with the '-kernel'
On Mon, Jan 2, 2023 at 9:54 PM Daniel Henrique Barboza
wrote:
>
> riscv_load_initrd() returns the initrd end addr while also writing a
> 'start' var to mark the addr start. These informations are being used
> just to write the initrd FDT node. Every existing caller of
> riscv_load_initrd() is
On Mon, Jan 2, 2023 at 9:54 PM Daniel Henrique Barboza
wrote:
>
> riscv_load_firmware(), riscv_load_initrd() and riscv_load_kernel() works
> under the assumption that a 'filename' parameter is always not NULL.
>
> This is currently the case since all callers of these functions are
> checking for
On Mon, Jan 2, 2023 at 9:53 PM Daniel Henrique Barboza
wrote:
>
> This test is used to do a quick sanity check to ensure that we're able
> to run the existing QEMU FW image.
>
> 'sifive_u', 'spike' and 'virt' riscv64 machines, and 'sifive_u' and
> 'virt' 32 bit machines are able to run the
Hi,
I mentioned that the bug were found in riscv-to-apply.next but forgot to
mentioned that the patches were also based on top of it as well:
https://github.com/alistair23/qemu/tree/riscv-to-apply.next
Thanks,
Daniel
On 1/10/23 17:14, Daniel Henrique Barboza wrote:
Hi,
I found this bug
On 04/01/2023 21:59, BALATON Zoltan wrote:
OpenBIOS cannot run FCode ROMs yet but it can detect NDRV in VGA card
ROM and add it to the device tree for MacOS. Pass the NDRV this way
instead of via fw_cfg. This solves the problem with OpenBIOS also
adding the NDRV to ati-vga which it does not
On 04/01/2023 21:59, BALATON Zoltan wrote:
We already have machine in a local variable so no need to use
qdev_get_machine(), also remove now unneded line break.
Signed-off-by: BALATON Zoltan
---
hw/ppc/mac_newworld.c | 3 +--
hw/ppc/mac_oldworld.c | 3 +--
2 files changed, 2
On 04/01/2023 21:59, BALATON Zoltan wrote:
The header hw/input/adb.h is included by some files that don't need
it. Clean it up and include only where necessary.
Signed-off-by: BALATON Zoltan
---
hw/misc/macio/cuda.c | 2 --
hw/misc/macio/pmu.c | 3 ---
hw/misc/mos6522.c
On Tue, 10 Jan 2023 at 19:25, Daniel P. Berrangé wrote:
>
> On Fri, Jan 06, 2023 at 03:39:31PM +, Peter Maydell wrote:
> > Yeah. It would be good if we didn't deadlock without printing
> > the assertion, though...
> >
> > I guess we could improve qtest_kill_qemu() so it doesn't wait
> >
On Tue, 10 Jan 2023 at 18:29, Paolo Bonzini wrote:
>
> The following changes since commit 3d83b78285d6e96636130f7d449fd02e2d4deee0:
>
> Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging
> (2023-01-08 14:27:40 +)
>
> are available in the Git repository at:
>
>
On Tue, 10 Jan 2023, Philippe Mathieu-Daudé wrote:
The 'hwaddr' type is defined in "exec/hwaddr.h" as:
hwaddr is the type of a physical address
(its size can be different from 'target_ulong').
All definitions use the 'HWADDR_' prefix, except TARGET_FMT_plx:
$ fgrep define
On 1/10/23 14:47, Stefan Berger wrote:
On 1/10/23 14:27, Daniel P. Berrangé wrote:
On Tue, Jan 10, 2023 at 01:50:26PM -0500, Stefan Berger wrote:
On 1/6/23 10:16, Stefan Berger wrote:
This here seems to be the root cause. An unknown control channel
command was received from the TPM
The 'hwaddr' type is defined in "exec/hwaddr.h" as:
hwaddr is the type of a physical address
(its size can be different from 'target_ulong').
All definitions use the 'HWADDR_' prefix, except TARGET_FMT_plx:
$ fgrep define include/exec/hwaddr.h
#define HWADDR_H
#define HWADDR_BITS 64
Emilio Cota writes:
> Fixes this tsan crash, easy to reproduce with any large enough program:
>
> $ tests/unit/test-qht
> 1..2
> ThreadSanitizer: CHECK failed: sanitizer_deadlock_detector.h:67
> "((n_all_locks_)) <
>
On 1/10/23 08:43, Daniel Henrique Barboza wrote:
On 1/8/23 00:33, Bin Meng wrote:
On Mon, Jan 2, 2023 at 7:55 PM Daniel Henrique Barboza
wrote:
The microchip_icicle_kit, sifive_u, spike and virt boards are now doing
the same steps when '-kernel' is used:
- execute load_kernel()
- load
All RISCV CPUs are setting cpu->cfg during their cpu_init() functions,
meaning that there's no reason to skip all the misa validation and setup
if misa_ext was set beforehand - especially since we're setting an
updated value in set_misa() in the end.
Put this code chunk into a new
Hi,
I found this bug when testing my avocado changes in riscv-to-apply.next.
The sifive_u board, both 32 and 64 bits, stopped booting OpenSBI. The
guest hangs indefinitely.
Git bisect points that this patch broke things:
8c3f35d25e7e98655c609b6c1e9f103b9240f8f8 is the first bad commit
commit
There is an informal contract between the cpu_init() functions and
riscv_cpu_realize(): if cpu->env.misa_ext is zero, assume that the
default settings were loaded via register_cpu_props() and do validations
to set env.misa_ext. If it's not zero, skip this whole process and
assume that the board
On Tue, Jan 10, 2023 at 12:52:32PM +0100, David Hildenbrand wrote:
> The following seems to work,
That looks much better at least from the diffstat pov (comparing to the
existing patch 1+5 and the framework changes), thanks.
> but makes analyze-migration.py angry:
>
> $
On 12/28/22 08:16, Alessandro Di Federico wrote:
## `target_ulong`
`target_ulong` is `uint32_t` in 32-bit targets and `uint64_t` in 64-bit
targets.
Problem: This is used in many many places to represent addresses in
code that could become target-independent.
Proposed solution: we can convert
On 1/5/23 10:34, Peter Maydell wrote:
This board disables QEMU's own PSCI implementation and relies on
a guest EL3 firmware to provide PSCI. So how will that EL3
firmware implement the "power on" to bring up the secondaries?
QEMU has the APIs to allow implementation of a model of a
hardware
On 1/10/23 14:27, Daniel P. Berrangé wrote:
On Tue, Jan 10, 2023 at 01:50:26PM -0500, Stefan Berger wrote:
On 1/6/23 10:16, Stefan Berger wrote:
This here seems to be the root cause. An unknown control channel
command was received from the TPM emulator backend by the control channel
On Fri, Jan 06, 2023 at 10:16:36AM -0500, Stefan Berger wrote:
>
>
> On 1/6/23 07:10, Peter Maydell wrote:
> > I'm seeing an intermittent hang on the s390 CI runner in the
> > bios-tables-test test. It looks like we've deadlocked because:
> >
> > * the TPM device is waiting for data on its
We were using quite and old runner on our machines and running into
issues with stalling jobs. Gitlab in the meantime now reliably provide
the latest packaged versions of the runner under a stable URL. This
update:
- creates a per-arch subdir for builds
- switches from binary tarballs to deb
I think this was because older Ubuntu's didn't alias clang to whatever
the latest version was. They do now so lets use that and not break.
Signed-off-by: Alex Bennée
---
.gitlab-ci.d/custom-runners/ubuntu-22.04-aarch64.yml | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
On Fri, Jan 06, 2023 at 03:39:31PM +, Peter Maydell wrote:
> On Fri, 6 Jan 2023 at 15:16, Stefan Berger wrote:
> >
> >
> >
> > On 1/6/23 07:10, Peter Maydell wrote:
> > > I'm seeing an intermittent hang on the s390 CI runner in the
> > > bios-tables-test test. It looks like we've deadlocked
On Tue, Jan 10, 2023 at 01:50:26PM -0500, Stefan Berger wrote:
>
>
> On 1/6/23 10:16, Stefan Berger wrote:
>> This here seems to be the root cause. An unknown control channel
>> command was received from the TPM emulator backend by the control channel
>> thread and we end up in
From: David Woodhouse
Add the array of virq ports to each vCPU so that we can deliver timers,
debug ports, etc. Global virqs are allocated against vCPU 0 initially,
but can be migrated to other vCPUs (when we implement that).
The kernel needs to know about VIRQ_TIMER in order to accelerate
From: David Woodhouse
Signed-off-by: David Woodhouse
---
hw/i386/kvm/xen_evtchn.c | 29 +
hw/i386/kvm/xen_evtchn.h | 3 +++
target/i386/kvm/xen-emu.c | 17 +
3 files changed, 49 insertions(+)
diff --git a/hw/i386/kvm/xen_evtchn.c
From: David Woodhouse
Signed-off-by: David Woodhouse
Signed-off-by: Paul Durrant
---
hw/char/xen_console.c| 8 ++--
hw/display/xenfb.c | 20 +-
hw/xen/xen-operations.c | 63
include/hw/xen/xen_backend_ops.h | 26
From: Emanuele Giuseppe Esposito
This API allows the accelerators to prevent vcpus from issuing
new ioctls while execting a critical section marked with the
accel_ioctl_inhibit_begin/end functions.
Note that all functions submitting ioctls must mark where the
ioctl is being called with
On Tue, Jan 10, 2023 at 04:34:49PM +0100, Jason A. Donenfeld wrote:
> Hi Michael,
>
> Could you queue up this patch and mark it as a fix for 7.2.1? It is a
> straight-up bug fix for a 7.2 regression that's now affected several
> users.
OK. In the future pls cc me if you want me to merge a patch.
From: Marc-André Lureau
Fedora 35 is EOL.
Update to upstream lcitool, that dropped f35 and added f37.
Signed-off-by: Marc-André Lureau
Reviewed-by: Thomas Huth
Message-Id: <20230110132700.833690-7-marcandre.lur...@redhat.com>
Signed-off-by: Alex Bennée
---
On Tue, Jan 10, 2023 at 3:38 AM Vladimir Sementsov-Ogievskiy
wrote:
>
> Add similar method for consistency.
>
> Signed-off-by: Vladimir Sementsov-Ogievskiy
> ---
> tests/qemu-iotests/iotests.py | 4
> 1 file changed, 4 insertions(+)
>
> diff --git a/tests/qemu-iotests/iotests.py
Am 10.01.23 um 16:13 schrieb Peter Maydell:
Meson supports an "uninstall", so we can easily allow it to work by
not suppressing the forwarding of it from Make to meson.
We originally suppressed this because Meson's 'uninstall' has a hole
in it: it will remove everything that is installed by a
Hi Paolo,
On 1/10/23 17:02, Paolo Bonzini wrote:
> From: Eric Auger
>
> To avoid compilation errors when -Werror=maybe-uninitialized is used,
> replace 'case 3' by 'default'.
>
> Otherwise we get:
>
> ../target/i386/ops_sse.h: In function ‘helper_vpermdq_ymm’:
>
From: Joe Richey
When in 64-bit mode, IDT entiries are 16 bytes, so `intno * 16` is used
for base/limit/offset calculations. However, even in 64-bit mode, the
exception error code still uses bits [3,16) for the invlaid interrupt
index.
This means the error code should still be `intno * 8 + 2`
From: Joao Martins
Which is used to fetch xenstore PFN and port to be used
by the guest. This is preallocated by the toolstack when
guest will just read those and use it straight away.
Signed-off-by: Joao Martins
Signed-off-by: David Woodhouse
---
target/i386/kvm/xen-emu.c | 39
From: Emilio Cota
Related: #1381
Signed-off-by: Emilio Cota
Reviewed-by: Philippe Mathieu-Daudé
Message-Id: <20230108164731.61469-3-c...@braap.org>
Signed-off-by: Alex Bennée
---
accel/tcg/translator.c | 15 ++-
1 file changed, 10 insertions(+), 5 deletions(-)
diff --git
* Kei IKEDA (s2280...@st.go.tuat.ac.jp) wrote:
> Hi!
>
> I am experimenting with post-copy by modifying qemu-6.0.0 in my research.
> I transfer a VM between two machines but it fails most of the time with
> these error messages.
>
> ```
> qemu-system-x86_64: postcopy_ram_listen_thread: loadvm
From: Keith Packard
'lock_user' allocates a host buffer to shadow a target buffer,
'unlock_user' copies that host buffer back to the target and frees the
host memory. If the completion function uses the target buffer, it
must be called after unlock_user to ensure the data are present.
This
On 10/01/2023 16.13, Peter Maydell wrote:
Meson supports an "uninstall", so we can easily allow it to work by
not suppressing the forwarding of it from Make to meson.
We originally suppressed this because Meson's 'uninstall' has a hole
in it: it will remove everything that is installed by a
On Tue, Jan 10, 2023 at 12:06 PM John Snow wrote:
>
>
>
> On Tue, Jan 10, 2023, 3:53 AM Vladimir Sementsov-Ogievskiy
> wrote:
>>
>> On 7/12/22 00:21, John Snow wrote:
>> > On Mon, Jul 11, 2022 at 5:16 PM John Snow wrote:
>> >>
>> >> On Fri, Jun 24, 2022 at 3:53 PM Vladimir Sementsov-Ogievskiy
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