Re: [Qemu-devel] [PATCH 0/2] tcx/cg3: fix warnings reported by Coverity

On 01/05/17 08:39, Mark Cave-Ayland wrote: > This patchset fixes up a couple of issues from my last set of tcx/cg3 updates > spotted by Coverity as reported by Peter. > > Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk> > > Mark Cave-Ayland (2): >

Re: [Qemu-devel] [PATCHv6 3/5] fw_cfg: move assert() and linking of fw_cfg device to the machine into instance_init()

On 27/06/17 01:49, Eduardo Habkost wrote: > On Sun, Jun 25, 2017 at 07:58:04PM +0100, Mark Cave-Ayland wrote: >> On 23/06/17 19:50, Eduardo Habkost wrote: >> >>>> Really, please go back to the earlier discussion around fw_cfg_init1() >>>> and you'll see my

Re: [Qemu-devel] [PATCH 4/4] ppc: ensure we update the decrementer value during migration

On 14/09/17 04:52, David Gibson wrote: > On Wed, Sep 13, 2017 at 07:58:23PM +0200, Laurent Vivier wrote: >> On 13/09/2017 19:11, Mark Cave-Ayland wrote: >>> On 13/09/17 08:12, David Gibson wrote: >>> >>>> This is subtly incorrect. It sets the DECR on load t

Re: [Qemu-devel] [PATCH 3/4] ppc: add CPU access_type into the migration stream

On 13/09/17 08:19, David Gibson wrote: >> When pausing a VM, does execution stop at the end of the current TB >> rather than immediately? If so, perhaps someone could confirm that >> guarantee is good enough for access_type? > > I'm pretty sure it has to; we'd have to come up out of an

Re: [Qemu-devel] [Qemu-ppc] [PATCH 2/4] ppc: add CPU IRQ state to PPC VMStateDescription

On 13/09/17 07:02, David Gibson wrote: >>> Alexey - do you recall from your analysis why these fields were no >>> longer deemed necessary, and how your TCG tests were configured? >> >> I most certainly did not do analysis (my bad. sorry) - I took the patch >> from David as he left the team, fixed

Re: [Qemu-devel] [PATCH 4/4] ppc: ensure we update the decrementer value during migration

On 13/09/17 08:12, David Gibson wrote: > This is subtly incorrect. It sets the DECR on load to exactly the > value that was saved. That effectively means that the DECR is frozen > for the migration downtime, which probably isn't what we want. > > Instead we need to save the DECR as an offset

Re: [Qemu-devel] [PATCH 4/8] macio: convert pmac_ide_ops from old_mmio

On 18/09/17 21:36, David Gibson wrote: > On Sun, Sep 17, 2017 at 06:15:44PM +0100, Mark Cave-Ayland wrote: >> Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk> > > Nice, but there are some details I'm not sure about. > >>

Re: [Qemu-devel] [PATCH 8/8] openpic: Fix problem when IRQ transitions from edge to level

On 18/09/17 21:39, David Gibson wrote: > On Sun, Sep 17, 2017 at 06:15:48PM +0100, Mark Cave-Ayland wrote: >> From: Benjamin Herrenschmidt <b...@kernel.crashing.org> >> >> Some interrupts get triggered before the OS has setup the >> right interrupt type

Re: [Qemu-devel] [PATCH 7/8] openpic: add missing timer fields to vmstate_openpic_timer

On 18/09/17 23:44, David Gibson wrote: > So, adding new things to the migration stream always requires some > thought. The commit message should contain a rationale for why the > proposed representation is a good one. In particular is it one that's > unlikely to be difficult if the device

[Qemu-devel] [PATCHv2] macio: convert pmac_ide_ops from old_mmio

Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk> --- hw/ide/macio.c | 181 +++- 1 file changed, 75 insertions(+), 106 deletions(-) diff --git a/hw/ide/macio.c b/hw/ide/macio.c index db5db39..18ae952 100644 --- a/hw/ide/m

Re: [Qemu-devel] [PATCHv2] macio: convert pmac_ide_ops from old_mmio

On 20/09/17 05:29, David Gibson wrote: > On Tue, Sep 19, 2017 at 09:02:54PM +0100, Mark Cave-Ayland wrote: >> Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk> > > This didn't apply for me. Can you rebase on top of ppc-for-2.11, please. (goes and looks) Okay

[Qemu-devel] [PATCH 1/2] ppc/ide/macio: Add missing registers

From: Benjamin Herrenschmidt The timing register exists on all variants of MacIO IDE, we just store and return its value. The interrupts register only exists on KeyLargo but it doesn't hurt to have it. The lack of this register causes MacOS X to hangs under some

[Qemu-devel] [PATCH 2/2] macio: convert pmac_ide_ops from old_mmio

Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk> --- hw/ide/macio.c | 181 +++- 1 file changed, 75 insertions(+), 106 deletions(-) diff --git a/hw/ide/macio.c b/hw/ide/macio.c index db5db39..18ae952 100644 --- a/hw/ide/m

[Qemu-devel] [PATCH 0/2] macio patches

Here are the macio patches taken from my previous "ppc: more Mac-related fixups" patchset with the v2 pmac_ide_ops conversion changes as requested. Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk> Benjamin Herrenschmidt (1): ppc/ide/macio: Add missing regi

Re: [Qemu-devel] [PATCHv2] macio: convert pmac_ide_ops from old_mmio

On 20/09/17 07:00, David Gibson wrote: > On Wed, Sep 20, 2017 at 06:56:37AM +0100, Mark Cave-Ayland wrote: >> On 20/09/17 05:29, David Gibson wrote: >> >>> On Tue, Sep 19, 2017 at 09:02:54PM +0100, Mark Cave-Ayland wrote: >>>> Signed-off-by: Mark Cave-A

Re: [Qemu-devel] [PATCH] pci: allow 32-bit PCI IO accesses to pass through the PCI bridge

On 22/09/17 23:18, Laszlo Ersek wrote: > On 09/22/17 14:18, Mark Cave-Ayland wrote: >> Whilst the underlying PCI bridge implementation supports 32-bit PCI IO >> accesses, unfortunately they are truncated at the legacy 64K limit. >> >> Signed-off-by: Mark Cave-Ayland <

Re: [Qemu-devel] [PULL 00/11] Ide patches

On 18/09/17 19:14, Peter Maydell wrote: > On 18 September 2017 at 19:00, Peter Maydell wrote: >> On 18 September 2017 at 18:55, John Snow wrote: >>> On 09/16/2017 10:34 AM, Peter Maydell wrote: Hi; I'm afraid this doesn't build with clang:

Re: [Qemu-devel] [PULL 00/11] Ide patches

On 20/09/17 18:55, John Snow wrote: > Guh. From which distro does your GCC 4.7 hail? > > Regardless, I suppose I will revert to Eric's workaround, though I like > the way it reads an awful lot less. Thanks John - it's just a standard Debian Wheezy installation on amd64. ATB, Mark.

Re: [Qemu-devel] [PATCH] ide: fix enum comparison for gcc 4.7

On 20/09/17 20:41, John Snow wrote: > Apparently GCC gets bent over comparing enum values against zero. > Replace the conditional with something less readable. > > Signed-off-by: John Snow > --- > hw/ide/core.c | 2 +- > include/hw/ide/internal.h | 3 +-- > 2

Re: [Qemu-devel] [PATCH] ide: fix enum comparison for gcc 4.7

On 20/09/17 22:33, John Snow wrote: > On 09/20/2017 05:28 PM, Mark Cave-Ayland wrote: >> On 20/09/17 20:41, John Snow wrote: >> >>> Apparently GCC gets bent over comparing enum values against zero. >>> Replace the conditional with something less readable. >

Re: [Qemu-devel] [PATCH 1/2] net: add Sun HME (Happy Meal Ethernet) on-board NIC

On 13/09/17 14:03, Artyom Tarasenko wrote: > Looks good to me, but networking is not my domain, so can only give Acked-by. > > Dmitry, Jason can you please take a look at it? > > Regards, > Artyom No further comments, so applied to my qemu-sparc branch. ATB, Mark.

Re: [Qemu-devel] [PATCH 2/2] sun4u: use sunhme as default on-board NIC

On 13/09/17 13:54, Artyom Tarasenko wrote: > On Fri, Sep 8, 2017 at 3:58 PM, Mark Cave-Ayland > <mark.cave-ayl...@ilande.co.uk> wrote: >> Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk> > > Reviewed-by: Artyom Tarasenko <atar4q...@gmail.com&

Re: [Qemu-devel] [PATCH 0/6] convert some omap/palm devices from using old_mmio

On 16/09/17 17:46, Peter Maydell wrote: > This patchset converts a handful of old devices from the old_mmio > fields in MemoryRegionOps. We don't have very many devices still > using old_mmio, so it would be nice to get rid of the remainder > and drop the field entirely at some point. That

[Qemu-devel] [PATCH 5/8] ppc/mac: More rework of the DBDMA emulation

update dbdma_unassigned_rw() and dbdma_unassigned_flush() to have the expected behaviour now that flush is handled slightly differently. Signed-off-by: Benjamin Herrenschmidt <b...@kernel.crashing.org> Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk> --- hw/misc/macio/

[Qemu-devel] [PATCH 0/8] ppc: more Mac-related fixups

an issue since migration of the Mac machines is fairly unreliable right now. With many thanks to Howard Spoelstra over at emaculation for helping test against a larger set of images than I currently have available myself. Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk> Be

[Qemu-devel] [PATCH 3/8] ppc/ide/macio: Add missing registers

From: Benjamin Herrenschmidt The timing register exists on all variants of MacIO IDE, we just store and return its value. The interrupts register only exists on KeyLargo but it doesn't hurt to have it. The lack of this register causes MacOS X to hangs under some

[Qemu-devel] [PATCH 7/8] openpic: add missing timer fields to vmstate_openpic_timer

Observation of the code shows indicates that several timer fields are missing from the migration stream. Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk> --- hw/intc/openpic.c |9 ++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/hw/intc/openpic.

[Qemu-devel] [PATCH 8/8] openpic: Fix problem when IRQ transitions from edge to level

From: Benjamin Herrenschmidt Some interrupts get triggered before the OS has setup the right interrupt type. If an edge interrupt is latched that way, not delivered (still masked), then the interrupt is changed to level and isn't asserted anymore, it will be stuck

[Qemu-devel] [PATCH 1/8] ppc: QOMify g3beige machine

Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk> --- hw/ppc/mac_oldworld.c | 17 +++-- 1 file changed, 15 insertions(+), 2 deletions(-) diff --git a/hw/ppc/mac_oldworld.c b/hw/ppc/mac_oldworld.c index fcac399..5d1171d 100644 --- a/hw/ppc/mac_oldworld.c +++ b/

[Qemu-devel] [PATCH 4/8] macio: convert pmac_ide_ops from old_mmio

Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk> --- hw/ide/macio.c | 154 +--- 1 file changed, 56 insertions(+), 98 deletions(-) diff --git a/hw/ide/macio.c b/hw/ide/macio.c index db5db39..428fbfc 100644 --- a/hw/ide/m

[Qemu-devel] [PATCH 6/8] ppc: Fix OpenPIC model

From: Benjamin Herrenschmidt Apple uses an IBM MPIC2A without timers, it has 64 sources. Signed-off-by: Benjamin Herrenschmidt --- hw/intc/openpic.c| 35 +++ hw/ppc/mac_newworld.c|2 +-

[Qemu-devel] [PATCH 2/8] ppc/mac: Advertise a high clock frequency for NewWorld Macs

From: Benjamin Herrenschmidt We use 900Mhz, otherwise MacOS X 10.5 refuses to install. Signed-off-by: Benjamin Herrenschmidt --- hw/ppc/mac_newworld.c |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git

[Qemu-devel] [PATCH] pci: allow 32-bit PCI IO accesses to pass through the PCI bridge

Whilst the underlying PCI bridge implementation supports 32-bit PCI IO accesses, unfortunately they are truncated at the legacy 64K limit. Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk> --- hw/pci/pci_bridge.c |3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)

[Qemu-devel] [PULL] qemu-sparc updates

:38:42 +0100) qemu-sparc update Mark Cave-Ayland (2): net: add Sun HME (Happy Meal Ethernet) on-board NIC sun4u: use sunhme as default on-board NIC default

Re: [Qemu-devel] [PATCH 0/8] sun4m : sparc32_dma tidy-ups

On 10/10/17 09:21, Artyom Tarasenko wrote: > On Mon, Oct 9, 2017 at 11:06 PM, Mark Cave-Ayland > <mark.cave-ayl...@ilande.co.uk> wrote: >> This patchset aims to tidy-up the sparc32_dma code by improving the >> modelling of the espdma/ledma devices using both QOM and the me

[Qemu-devel] [PATCHv2 05/13] sun4m_iommu: move TYPE_SUN4M_IOMMU declaration to sun4m.h

This is in preparation to allow the type to be used elsewhere. Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk> --- hw/dma/sun4m_iommu.c | 14 -- include/hw/sparc/sun4m.h | 16 2 files changed, 16 insertions(+), 14 deletions(-) diff --gi

[Qemu-devel] [PATCHv2 08/13] sparc32_dma: make esp device child of espdma device

This makes it possible to reference the esp device from the espdma device as required, and by wiring up the device ourselves in sun4m.c we can drop use of the esp_init() function. Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk> --- hw/dma/sparc32_dma.c

[Qemu-devel] [PATCH 0/3] sun4m: implement memory region IOMMU translation and DMA API

Cave-Ayland <mark.cave-ayl...@ilande.co.uk> Based-on: 1508004545-28578-1-git-send-email-mark.cave-ayl...@ilande.co.uk ([PATCHv2 00/13] sun4m: sparc32_dma tidy-ups) Mark Cave-Ayland (3): sun4m: implement IOMMU translation using IOMMU memory region sparc32_dma: switch over to using IOMMU

[Qemu-devel] [PATCH 3/3] sun4m_iommu: remove legacy sparc_iommu_memory_rw() function

With the switch to the IOMMU memory region and DMA API, this is no longer required. Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk> --- hw/dma/sun4m_iommu.c | 33 - include/hw/sparc/sun4m.h | 16 2 files chang

[Qemu-devel] [PATCHv3 13/13] sparc32_dma: add len to esp/le DMA memory tracing

This is surprisingly useful when trying to debug DMA issues. Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk> --- hw/dma/sparc32_dma.c |8 hw/dma/trace-events |8 2 files changed, 8 insertions(+), 8 deletions(-) diff --git a/hw/dma/sparc32_dma.

[Qemu-devel] [PATCHv3 09/13] lance: move TYPE_LANCE and SysBusPCNetState from lance.c to sun4m.h

This enables them to be used outside of lance.c. Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk> CC: Jason Wang <jasow...@redhat.com> --- hw/net/lance.c |9 - include/hw/sparc/sun4m.h | 13 + 2 files changed, 13 insertions(+),

[Qemu-devel] [PATCHv2 02/13] sparc32_dma: split esp and le into separate DMA devices

time, allowing us to drop the SPARC32_DMA_DEVICE realize function and the is_ledma device property. Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk> --- hw/dma/sparc32_dma.c | 63 -- hw/sparc/sun4m.c |3 +-- 2 files c

[Qemu-devel] [PATCHv2 00/13] sun4m: sparc32_dma tidy-ups

the code, and the code for wiring up the espdma/ledma and respective devices is also a lot more readable. Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk> v2: - Make esp/lance devices children of espdma/ledma devices respectively - Add len parameter to ledma/espdma tracepoints

[Qemu-devel] [PATCHv2 04/13] sun4m: move DMA device wiring from sparc32_dma_init() to sun4m_hw_init()

into the relevant SPARC32 DMA devices; there will be a final refactoring of sparc32_dma_init() once this work is complete. Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk> --- hw/sparc/sun4m.c | 29 - 1 file changed, 16 insertions(+), 13 deletions(-) diff

[Qemu-devel] [PATCHv2 06/13] sparc32_dma: use object link instead of qdev property to pass IOMMU reference

This enables us to remove the last remaining (opaque) qdev property. Whilst we are here, also update iommu_init() to use TYPE_SUN4M_IOMMU instead of a hardcoded string. Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk> --- hw/dma/sparc32_dma.c | 13 + hw/sparc/s

[Qemu-devel] [PATCH 1/3] sun4m: implement IOMMU translation using IOMMU memory region

Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk> --- hw/dma/sun4m_iommu.c | 62 ++ include/hw/sparc/sun4m.h |5 2 files changed, 67 insertions(+) diff --git a/hw/dma/sun4m_iommu.c b/hw/dma/sun4m_iommu.c index 8

[Qemu-devel] [PATCH 2/3] sparc32_dma: switch over to using IOMMU memory region and DMA API

Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk> --- hw/dma/sparc32_dma.c | 17 +++-- 1 file changed, 11 insertions(+), 6 deletions(-) diff --git a/hw/dma/sparc32_dma.c b/hw/dma/sparc32_dma.c index fbb072a..5438831 100644 --- a/hw/dma/sparc32_dma.c +++ b/

[Qemu-devel] [PATCHv3 00/13] sun4m: sparc32_dma tidy-ups

the code, and the code for wiring up the espdma/ledma and respective devices is also a lot more readable. Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk> v3: - Add missing sysbus.h include to esp.h in patch 7 v2: - Make esp/lance devices children of espdma/ledma devices respec

[Qemu-devel] [PATCHv3 04/13] sun4m: move DMA device wiring from sparc32_dma_init() to sun4m_hw_init()

into the relevant SPARC32 DMA devices; there will be a final refactoring of sparc32_dma_init() once this work is complete. Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk> --- hw/sparc/sun4m.c | 29 - 1 file changed, 16 insertions(+), 13 deletions(-) diff

[Qemu-devel] [PATCHv3 03/13] sparc32_dma: move type declarations from sparc32_dma.c to sparc32_dma.h

Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk> --- hw/dma/sparc32_dma.c | 34 -- include/hw/sparc/sparc32_dma.h | 37 + 2 files changed, 37 insertions(+), 34 deletions(-) diff --git a/

[Qemu-devel] [PATCHv3 11/13] sparc32_dma: introduce new SPARC32_DMA type container object

and wire up the remaining board memory regions/IRQs. Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk> --- hw/dma/sparc32_dma.c | 70 hw/sparc/sun4m.c | 66 ++--- include/hw

[Qemu-devel] [PATCHv3 08/13] sparc32_dma: make esp device child of espdma device

This makes it possible to reference the esp device from the espdma device as required, and by wiring up the device ourselves in sun4m.c we can drop use of the esp_init() function. Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk> --- hw/dma/sparc32_dma.c

[Qemu-devel] [PATCHv2 12/13] sparc32_dma: remove is_ledma hack and replace with memory region alias

-after-57.html. With the memory API we can now simply alias the incorrect access onto its intended destination allowing us to remove the hack. Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk> --- hw/dma/sparc32_dma.c | 20 ++-- include/hw

[Qemu-devel] [PATCHv3 05/13] sun4m_iommu: move TYPE_SUN4M_IOMMU declaration to sun4m.h

This is in preparation to allow the type to be used elsewhere. Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk> --- hw/dma/sun4m_iommu.c | 14 -- include/hw/sparc/sun4m.h | 16 2 files changed, 16 insertions(+), 14 deletions(-) diff --gi

[Qemu-devel] [PATCHv3 02/13] sparc32_dma: split esp and le into separate DMA devices

time, allowing us to drop the SPARC32_DMA_DEVICE realize function and the is_ledma device property. Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk> --- hw/dma/sparc32_dma.c | 63 -- hw/sparc/sun4m.c |3 +-- 2 files c

[Qemu-devel] [PATCHv3 06/13] sparc32_dma: use object link instead of qdev property to pass IOMMU reference

This enables us to remove the last remaining (opaque) qdev property. Whilst we are here, also update iommu_init() to use TYPE_SUN4M_IOMMU instead of a hardcoded string. Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk> --- hw/dma/sparc32_dma.c | 13 + hw/sparc/s

[Qemu-devel] [PATCHv2 03/13] sparc32_dma: move type declarations from sparc32_dma.c to sparc32_dma.h

Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk> --- hw/dma/sparc32_dma.c | 34 -- include/hw/sparc/sparc32_dma.h | 37 + 2 files changed, 37 insertions(+), 34 deletions(-) diff --git a/

[Qemu-devel] [PATCHv2 01/13] sparc32_dma: rename SPARC32_DMA type to SPARC32_DMA_DEVICE

Also update the function names to match as appropriate. While we're here rename the type from sparc32_dma to sparc32-dma in order to match the current QOM convention. Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk> --- hw/dma/sparc32_dma.c

[Qemu-devel] [PATCHv2 07/13] esp: move TYPE_ESP and SysBusESPState from esp.c to esp.h

This enables them to be used outside of esp.c. Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk> CC: Paolo Bonzini <pbonz...@redhat.com> --- hw/scsi/esp.c | 13 - include/hw/scsi/esp.h | 13 + 2 files changed, 13 insertions(+),

[Qemu-devel] [PATCHv2 13/13] sparc32_dma: add len to esp/le DMA memory tracing

This is surprisingly useful when trying to debug DMA issues. Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk> --- hw/dma/sparc32_dma.c |8 hw/dma/trace-events |8 2 files changed, 8 insertions(+), 8 deletions(-) diff --git a/hw/dma/sparc32_dma.

[Qemu-devel] [PATCHv2 11/13] sparc32_dma: introduce new SPARC32_DMA type container object

and wire up the remaining board memory regions/IRQs. Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk> --- hw/dma/sparc32_dma.c | 70 hw/sparc/sun4m.c | 66 ++--- include/hw

[Qemu-devel] [PATCHv3 12/13] sparc32_dma: remove is_ledma hack and replace with memory region alias

-after-57.html. With the memory API we can now simply alias the incorrect access onto its intended destination allowing us to remove the hack. Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk> --- hw/dma/sparc32_dma.c | 20 ++-- include/hw

[Qemu-devel] [PATCHv3 01/13] sparc32_dma: rename SPARC32_DMA type to SPARC32_DMA_DEVICE

Also update the function names to match as appropriate. While we're here rename the type from sparc32_dma to sparc32-dma in order to match the current QOM convention. Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk> --- hw/dma/sparc32_dma.c

[Qemu-devel] [PATCHv3 07/13] esp: move TYPE_ESP and SysBusESPState from esp.c to esp.h

This enables them to be used outside of esp.c. Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk> CC: Paolo Bonzini <pbonz...@redhat.com> --- hw/scsi/esp.c | 13 - include/hw/scsi/esp.h | 14 ++ 2 files changed, 14 insertions(+),

[Qemu-devel] [PATCHv3 10/13] sparc32_dma: make lance device child of ledma device

This makes it possible to reference the lance device from the ledma device as required. Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk> --- hw/dma/sparc32_dma.c | 23 ++- hw/sparc/sun4m.c

[Qemu-devel] [PATCHv2 09/13] lance: move TYPE_LANCE and SysBusPCNetState from lance.c to sun4m.h

This enables them to be used outside of lance.c. Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk> CC: Jason Wang <jasow...@redhat.com> --- hw/net/lance.c |9 - include/hw/sparc/sun4m.h | 13 + 2 files changed, 13 insertions(+),

[Qemu-devel] [PATCHv2 10/13] sparc32_dma: make lance device child of ledma device

This makes it possible to reference the lance device from the ledma device as required. Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk> --- hw/dma/sparc32_dma.c | 23 ++- hw/sparc/sun4m.c

[Qemu-devel] [PATCH] sun4u: fix assert when adding NICs which aren't the in-built model

Cave-Ayland <mark.cave-ayl...@ilande.co.uk> --- hw/sparc64/sun4u.c |4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/sparc64/sun4u.c b/hw/sparc64/sun4u.c index 2edd1cc..bf89252 100644 --- a/hw/sparc64/sun4u.c +++ b/hw/sparc64/sun4u.c @@ -490,10 +490,10 @@ stati

Re: [Qemu-devel] [PATCHv3 00/13] sun4m: sparc32_dma tidy-ups

On 14/10/17 20:23, no-re...@patchew.org wrote: > Hi, > > This series seems to have some coding style problems. See output below for > more information: > > Type: series > Message-id: 1508006342-5304-1-git-send-email-mark.cave-ayl...@ilande.co.uk > Subject: [Qemu-devel] [PATCHv3 00/13] sun4m:

Re: [Qemu-devel] [PATCH v2 33/40] sparc: sparc: use generic cpu_model parsing

On 05/10/17 14:51, Igor Mammedov wrote: > Signed-off-by: Igor Mammedov > Reviewed-by: Philippe Mathieu-Daudé > Tested-by: Philippe Mathieu-Daudé > --- > CC: mark.cave-ayl...@ilande.co.uk > CC: atar4q...@gmail.com > --- > hw/sparc/sun4m.c

Re: [Qemu-devel] [PATCH v2 33/40] sparc: sparc: use generic cpu_model parsing

-> sparc_cpu_type_name() Yeah, that's what I was fairly sure the outcome was but couldn't quite see it in that patchset. In that case: Acked-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk> ATB, Mark.

[Qemu-devel] [PATCH 0/2] sun4u: add Sun HME (Happy Meal Ethernet) on-board NIC

-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk> Mark Cave-Ayland (2): net: add Sun HME (Happy Meal Ethernet) on-board NIC sun4u: use sunhme as default on-board NIC default-configs/sparc64-softmmu.mak |1 + hw/net/Makefile.objs|1 + hw/net/su

[Qemu-devel] [PATCH 1/2] net: add Sun HME (Happy Meal Ethernet) on-board NIC

Enable it by default for the sparc64-softmmu configuration. Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk> --- default-configs/sparc64-softmmu.mak |1 + hw/net/Makefile.objs|1 + hw/net/sunhme.c

[Qemu-devel] [PATCH 2/2] sun4u: use sunhme as default on-board NIC

Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk> --- hw/sparc64/sun4u.c | 25 + 1 file changed, 21 insertions(+), 4 deletions(-) diff --git a/hw/sparc64/sun4u.c b/hw/sparc64/sun4u.c index 5e59269..c3280aa 100644 --- a/hw/sparc64/sun4u.c +++ b/hw/s

Re: [Qemu-devel] [PATCH 1/1] net: Add SunGEM device emulation as found on Apple UniNorth

On 06/09/17 04:16, David Gibson wrote: > On Tue, Sep 05, 2017 at 11:13:43AM +1000, David Gibson wrote: >> On Mon, Sep 04, 2017 at 07:39:38PM +0100, Mark Cave-Ayland wrote: >>> From: Benjamin Herrenschmidt <b...@kernel.crashing.org> >>> >>> This adds a si

Re: [Qemu-devel] [PATCH 0/4] net: introduce common net_crc32() and net_crc32_le() functions

On 18/08/17 15:15, Mark Cave-Ayland wrote: > Whilst trying to debug a CRC32 endian issue for NIC multicast hash lookups, it > struck me that it would make sense to have a common set of standard ethernet > CRC32 functions (both little and big endian variants) in net.c. > > The fi

[Qemu-devel] [PULL] Update OpenBIOS images

) Update OpenBIOS images Mark Cave-Ayland (1): Update OpenBIOS images to 314d4f8 built from submodule. pc-bios/openbios-ppc | Bin 754936 -> 754936 bytes pc-bios/openbios-sparc32 | Bin 382048 -> 382048

Re: [Qemu-devel] [PATCH 3/4] ppc: add CPU access_type into the migration stream

On 11/09/17 11:57, David Gibson wrote: > On Sun, Sep 10, 2017 at 03:37:34PM +0100, Mark Cave-Ayland wrote: >> This is referenced in cpu_ppc_handle_mmu_fault() and so should be included >> in the migration stream. > > That is not, on its own, sufficient reason. > >>

Re: [Qemu-devel] [Qemu-ppc] [PATCH 2/4] ppc: add CPU IRQ state to PPC VMStateDescription

On 11/09/17 11:48, David Gibson wrote: > On Mon, Sep 11, 2017 at 10:30:33AM +0100, Dr. David Alan Gilbert wrote: >> * Greg Kurz (gr...@kaod.org) wrote: >>> On Sun, 10 Sep 2017 15:37:33 +0100 >>> Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk> wrote: >>>

Re: [Qemu-devel] [PATCH 1/1] net: Add SunGEM device emulation as found on Apple UniNorth

On 06/09/17 07:56, David Gibson wrote: Applied to ppc-for-2.11. >>> >>> Until I discovered that it breaks compile with >>> --enable-trace-backend=ust. So I've removed it again. >> >> Oh that's interesting. I've had --enable-trace-backend=simple as part of >> my default build for a long

[Qemu-devel] [PATCHv2 1/1] net: Add SunGEM device emulation as found on Apple UniNorth

stants into sungem.c as required - Switch to using tracepoints for debugging - Split register blocks into separate memory regions - Use arrays in SunGEMState to hold register values - Add state-saving support Signed-off-by: Benjamin Herrenschmidt <b...@kernel.crashing.org> Signed-off-by: Mark

[Qemu-devel] [PATCHv2 0/1] net: Add SunGEM device emulation as found on Apple UniNorth

regions - Use arrays in SunGEMState to hold register values - Add state-saving support Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk> v2 - Fix tracepoints for trace backends outside of QEMU - Introduce PCI_BASE_ADDRESS_SPACE_MEMORY instead of using the value 0 di

Re: [Qemu-devel] [PATCHv3 1/2] pci: move check for existing devfn into new pci_bus_devfn_available() helper

On 04/09/17 11:01, Yi Min Zhao wrote: > I want to ask a question. According to the next patch, you check > bus->devices[devfn] > and reserved bit separately. Why not move the reserved bit check here? > I think bus->devices[devfn] != NULL or revsered bit set means slot is > unavailable. Primarily

Re: [Qemu-devel] [PATCH 1/4] ppc: change CPUPPCState access_type from int to uint8_t

On 10/09/17 17:30, Laurent Vivier wrote: > On 10/09/2017 16:37, Mark Cave-Ayland wrote: >> This change was suggested by Alexey in advance of a subsequent commit which >> adds access_type into vmstate_ppc_cpu. >> >> Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@i

[Qemu-devel] [PATCH 0/4] ppc: migration fixes for TCG

. Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk> Mark Cave-Ayland (4): ppc: change CPUPPCState access_type from int to uint8_t ppc: add CPU IRQ state to PPC VMStateDescription ppc: add CPU access_type into the migration stream ppc: ensure we update the decrementer

[Qemu-devel] [PATCH 4/4] ppc: ensure we update the decrementer value during migration

initialisation which typically corresponds to several seconds. Hence when restoring the image, the guest would effectively "lose" decrementer interrupts during this time causing confusion in the guest. Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk> --- target/ppc/

[Qemu-devel] [PATCH 2/4] ppc: add CPU IRQ state to PPC VMStateDescription

it we bump the vmstate_ppc version from 5 to 6 to handle the additional fields. Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk> --- target/ppc/machine.c |6 +- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/target/ppc/machine.c b/target/ppc/machine

[Qemu-devel] [PATCH 3/4] ppc: add CPU access_type into the migration stream

This is referenced in cpu_ppc_handle_mmu_fault() and so should be included in the migration stream. Note: the vmstate_ppc version number has already been bumped by the previous patch in this series. Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk> --- target/ppc/machine.c

[Qemu-devel] [PATCH 1/4] ppc: change CPUPPCState access_type from int to uint8_t

This change was suggested by Alexey in advance of a subsequent commit which adds access_type into vmstate_ppc_cpu. Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk> --- target/ppc/cpu.h |4 ++-- target/ppc/machine.c |4 +++- 2 files changed, 5 insertions(+), 3 del

Re: [Qemu-devel] [Qemu-ppc] [PATCH 2/4] ppc: add CPU IRQ state to PPC VMStateDescription

On 12/09/17 17:21, Dr. David Alan Gilbert wrote: >> Right, a subsection is certainly necessary to avoid breaking backwards >> migration. >> >> But apart from that I want to understand better exactly why this is >> necessary. What's the state that's being lost, and is it really not >> recoverable

Re: [Qemu-devel] [Qemu-ppc] [PATCH 2/4] ppc: add CPU IRQ state to PPC VMStateDescription

On 12/09/17 17:41, Mark Cave-Ayland wrote: > The commit message mentions that prior to the conversion some CPU state > was missing but it doesn't mention anything about dropping existing > fields as part of the conversion process so I suspect that this was an > accidental side-effec

Re: [Qemu-devel] [PATCH] pci: allow 32-bit PCI IO accesses to pass through the PCI bridge

On 24/09/17 16:43, Marcel Apfelbaum wrote: > Hi Mark, > >>> Based on the commit message, I assume this change is guest-visible. If >>> so, should it be made dependent on a compat property, so that it doesn't >>> cause problems with migration? >> >> In order to enable 32-bit IO accesses the PCI

[Qemu-devel] [PATCH 1/7] mac_dbdma: remove unused IO fields from DBDMAState

were accidentally left behind. Remove them, including the initialisation in DBDMA_init(). Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk> --- hw/misc/macio/mac_dbdma.c |2 -- include/hw/ppc/mac_dbdma.h |4 2 files changed, 6 deletions(-) diff --git a/hw/misc

[Qemu-devel] [PATCH 0/7] mac_dbdma: tidy-up and QOMify

not apply to master but on top of David's ppc-for-2.11 branch since there are merge conflicts with my previous patchset. Hopefully the Based-On line below is enough to keep patchew happy, even though it wasn't the final version applied to the ppc-for-2.11 branch. Signed-off-by: Mark Cave-Ayland

[Qemu-devel] [PATCH 4/7] macio: pass channel into MACIOIDEState via qdev property

One of the reasons macio_ide_register_dma() needs to exist is because the channel id isn't passed into the MACIO_IDE object. Pass in the channel id using a qdev property to remove this requirement. Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk> --- hw/ide/macio.c

[Qemu-devel] [PATCH 3/7] mac_dbdma: remove DBDMA_init() function

Instead we can now instantiate the MAC_DBDMA object directly within the macio device. We also add the DBDMA device as a child property so that it is possible to retrieve later. Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk> --- hw/misc/macio/mac_dbdma.c

[Qemu-devel] [PATCH 6/7] mac_dbdma: change DBDMA_register_channel to a MAC_DBDMA type method

Using this we can change the MACIO_IDE instance to register the channel itself via a type method instead of requiring a separate DBDMA_register_channel() function. As a consequence of this it is now possible to remove the old external macio_ide_register_dma() function. Signed-off-by: Mark Cave

[Qemu-devel] [PATCH 2/7] mac_dbdma: QOMify

Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk> --- hw/misc/macio/mac_dbdma.c | 59 include/hw/ppc/mac_dbdma.h |6 + 2 files changed, 55 insertions(+), 10 deletions(-) diff --git a/hw/misc/macio/mac_dbdma.c b/hw/misc

Re: [Qemu-devel] [PATCH 6/7] mac_dbdma: change DBDMA_register_channel to a MAC_DBDMA type method

On 26/09/17 04:47, David Gibson wrote: > On Sun, Sep 24, 2017 at 03:47:45PM +0100, Mark Cave-Ayland wrote: >> Using this we can change the MACIO_IDE instance to register the channel >> itself via a type method instead of requiring a separate >> DBDMA_regist

[Qemu-devel] [PATCH 5/7] macio: use object link between MACIO_IDE and MAC_DBDMA object

Using a standard QOM object link we can pass a reference to the MAC_DBDMA controller to the MACIO_IDE object which removes the last external parameter to macio_ide_register_dma(). Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk> --- hw/ide/macio.c|9 ++--- h

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