On 19/11/17 15:14, Philippe Mathieu-Daudé wrote:
> Hi Mark,
>
> On 11/17/2017 10:42 AM, Mark Cave-Ayland wrote:
>> This is in preparation for switching code in hw/sparc64 from DPRINTF over to
>> trace events.
>
> This could be squashed with next commit,
>
> Ei
On 20/11/17 17:51, Philippe Mathieu-Daudé wrote:
> Hi Mark,
>
> On 11/17/2017 10:42 AM, Mark Cave-Ayland wrote:
>> By making the special_base and mem_base values qdev properties, we can move
>> the remaining parts of pci_apb_init() into the pbm init() and r
On 19/11/17 14:12, Jean-Christophe DUBOIS wrote:
> Hello,
>
> I am using Qemu to emulate a Leon3 based board.
>
> In the software I am running on Qemu, I configured the virtual memory
> through MMU programming.
>
> In particular, I mapped the built-in UART to a 4K page.
>
> To check that my
On 20/11/17 01:02, Philippe Mathieu-Daudé wrote:
> Hi Mark,
>
> On 11/17/2017 10:42 AM, Mark Cave-Ayland wrote:
>> This enables us to remove the static array mapping in the ISA IRQ
>> handler (and the embedded reference to the APB device) by formalising
>> the interru
On 21/11/17 00:00, Richard Purdie wrote:
> Hi,
>
> I work on the Yocto Project and we use qemu to test boot our Linux
> images and run tests against them. We've been noticing some instability
> for ppc where the images sometimes hang, usually around udevd bring up
> time so just after booting
On 17/11/17 14:33, Artyom Tarasenko wrote:
> On Fri, Nov 17, 2017 at 2:42 PM, Mark Cave-Ayland
> <mark.cave-ayl...@ilande.co.uk> wrote:
>> After the previous refactoring it is now possible to use separate functions
>> to improve clarity of the interrupt paths. Simil
On 15/08/17 19:10, Richard Henderson wrote:
> [CC Peter re MemTxAttrs below]
>
> On 08/15/2017 09:38 AM, Mark Cave-Ayland wrote:
>> Working through an incorrect endian issue on qemu-system-sparc64, it has
>> become apparent that at least one OS makes use of the IE (
On 05/12/17 14:31, Eric Blake wrote:
On 12/05/2017 02:17 AM, Mark Cave-Ayland wrote:
This provides a standard ethernet CRC32 little-endian implementation.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk>
---
include/net/net.h | 2 ++
net/net.c
On 05/12/17 14:28, Eric Blake wrote:
On 12/05/2017 02:17 AM, Mark Cave-Ayland wrote:
Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk>
---
hw/net/eepro100.c | 19 +--
1 file changed, 1 insertion(+), 18 deletions(-)
-if
On 06/12/17 03:34, Philippe Mathieu-Daudé wrote:
Hi Mark,
On 12/05/2017 05:17 AM, Mark Cave-Ayland wrote:
Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk>
---
hw/net/sunhme.c | 25 +
1 file changed, 1 insertion(+), 24 deletions(-)
diff --git a/
On 05/12/17 15:13, Stefan Weil wrote:
Am 05.12.2017 um 09:17 schrieb Mark Cave-Ayland:
Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk>
---
hw/net/eepro100.c | 19 +--
1 file changed, 1 insertion(+), 18 deletions(-)
diff --git a/hw/net/eepro100.c b/
On 26/10/17 11:12, Mark Cave-Ayland wrote:
> On 25/10/17 18:47, Peter Maydell wrote:
>
>> On 25 October 2017 at 16:59, Mark Cave-Ayland
>> <mark.cave-ayl...@ilande.co.uk> wrote:
>>> This enables them to be used outside of lance.c.
>>>
>>
This is surprisingly useful when trying to debug DMA issues.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk>
Reviewed-by: Artyom Tarasenko <atar4q...@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <f4...@amsat.org>
---
hw/dma/sparc32_dma.c |8
h
into the relevant SPARC32 DMA devices; there will be a final
refactoring of sparc32_dma_init() once this work is complete.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk>
Reviewed-by: Artyom Tarasenko <atar4q...@gmail.com>
---
hw/sparc/sun4m.c | 29 -
-after-57.html.
With the memory API we can now simply alias the incorrect access onto its
intended destination allowing us to remove the hack.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk>
Reviewed-by: Artyom Tarasenko <atar4q...@gmail.com>
---
hw/dma/s
This makes it possible to reference the lance device from the ledma device as
required.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk>
Reviewed-by: Artyom Tarasenko <atar4q...@gmail.com>
---
hw/dma/sparc32_dma.c | 22 ++
hw/s
and wire up the remaining board memory regions/IRQs.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk>
Reviewed-by: Artyom Tarasenko <atar4q...@gmail.com>
---
hw/dma/sparc32_dma.c | 70
hw/sparc/sun4m.c
Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk>
Reviewed-by: Artyom Tarasenko <atar4q...@gmail.com>
---
hw/dma/sparc32_dma.c | 34 --
include/hw/sparc/sparc32_dma.h | 37 +
2 files
This makes it possible to reference the esp device from the espdma device as
required, and by wiring up the device ourselves in sun4m.c we can drop use
of the esp_init() function.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk>
Reviewed-by: Artyom Tarasenko <atar4q...@
Also update the function names to match as appropriate. While we're
here rename the type from sparc32_dma to sparc32-dma in order to
match the current QOM convention.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk>
Reviewed-by: Artyom Tarasenko <atar4q...@gmail.com>
This is in preparation to allow the type to be used elsewhere.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk>
Reviewed-by: Artyom Tarasenko <atar4q...@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <f4...@amsat.org>
---
hw/dma/sun4m_iommu.c | 14
This enables them to be used outside of esp.c.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk>
CC: Paolo Bonzini <pbonz...@redhat.com>
Reviewed-by: Artyom Tarasenko <atar4q...@gmail.com>
Reviewed-by: Peter Maydell <peter.mayd...@linaro.org>
---
hw/s
This enables us to remove the last remaining (opaque) qdev property. Whilst we
are here, also update iommu_init() to use TYPE_SUN4M_IOMMU instead of a
hardcoded string.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk>
Reviewed-by: Artyom Tarasenko <atar4q...@gmail.com&
time, allowing us to
drop the SPARC32_DMA_DEVICE realize function and the is_ledma device
property.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk>
Reviewed-by: Artyom Tarasenko <atar4q...@gmail.com>
---
hw/dma/sparc32_
This enables them to be used outside of lance.c.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk>
CC: Jason Wang <jasow...@redhat.com>
---
hw/net/lance.c | 11 +--
include/hw/net/lance.h | 41 +
2 files
the code, and the code for wiring up
the espdma/ledma and respective devices is also a lot more readable.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk>
v4:
- Rebase onto git master
- Update patch 9 to move lance QOM macros/SysBusPCNetState from sun4m.h to
lance.h as sug
On 25/10/17 18:47, Peter Maydell wrote:
> On 25 October 2017 at 16:59, Mark Cave-Ayland
> <mark.cave-ayl...@ilande.co.uk> wrote:
>> This enables them to be used outside of lance.c.
>>
>> Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk>
&g
:
sun4m: change TYPE_SUN4M_IOMMU macro from "iommu" to "sun4m-iommu"
(2017-10-31 17:25:37 +)
qemu-sparc update
--------
Mark Cave-Ayland (17):
On 27/10/17 17:42, Philippe Mathieu-Daudé wrote:
> Hi Mark,
>
> On 10/25/2017 12:59 PM, Mark Cave-Ayland wrote:
>> This patchset aims to tidy-up the sparc32_dma code by improving the
>> modelling of the espdma/ledma devices using both QOM and the memory
>> API which
On 27/10/17 17:18, Philippe Mathieu-Daudé wrote:
> On 10/25/2017 12:59 PM, Mark Cave-Ayland wrote:
>> Create a new SPARC32_DMA container object (including an appropriate container
>> memory region) and add instances of the SPARC32_ESPDMA_DEVICE and
>> SPARC32_LEDMA_DE
uld
>>> have a comment that isn't the same as the pcnet.h one.
>>> I don't particularly mind what it says, as long as it briefly
>>> explains what's in the file (and by implication what distinguishes
>>> things in this file from things in the other).
>>
>> Oka
On 30/10/17 13:22, Peter Maydell wrote:
> On 30 October 2017 at 13:10, Mark Cave-Ayland
> <mark.cave-ayl...@ilande.co.uk> wrote:
>> On 26/10/17 11:12, Mark Cave-Ayland wrote:
>>> On 25/10/17 18:47, Peter Maydell wrote:
>>>> On 25 October 2017 at 16:59, Mark
Following on from the previous commit, we can also do the same with
with legacy OBIO interrupts in pci_pbmA_map_irq().
Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk>
Reviewed-by: Artyom Tarasenko <atar4q...@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <f4...@ams
After the previous refactoring it is now possible to use separate functions
to improve the clarity of the interrupt paths.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk>
---
hw/pci-host/apb.c | 45 -
1 file changed, 20 inse
Cave-Ayland <mark.cave-ayl...@ilande.co.uk>
Reviewed-by: Artyom Tarasenko <atar4q...@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <f4...@amsat.org>
---
hw/pci-host/apb.c | 4 +---
hw/sparc64/sun4u.c| 29 ++---
include/hw/pci-host/apb.h
arrays of qemu_irq via various _init() functions.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk>
v3:
- Rebase onto master
- Split patch 11 into 2 patches, move busA configuration to pci_pbm_reset()
(based upon further discussions with Artyom off-list)
v2:
- Rebase onto
Since the EBus is effectively a PCI-ISA bridge then the underlying ISA bus
should be contained within the PCI bridge itself.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk>
Reviewed-by: Artyom Tarasenko <atar4q...@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <
Use DeviceClass rather than SysBusDeviceClass in pbm_host_class_init() and
adjust pci_pbm_init_device() accordingly.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk>
Reviewed-by: Philippe Mathieu-Daudé <f4...@amsat.org>
---
hw/pci-host/apb.c | 17 -
1
State),
-.instance_init = adb_mouse_initfn,
-.class_init = adb_mouse_class_init,
-.class_size = sizeof(ADBMouseClass),
-};
-
-
static void adb_register_types(void)
{
type_register_static(_bus_type_info);
type_register_static(_device_type_info);
-type_register_static(_kbd_type_info);
-type_register_static(_mouse_type_info);
}
type_init(adb_register_types)
diff --git a/hw/input/trace-events b/hw/input/trace-events
index 88150ef7a6..a8d46cb766 100644
--- a/hw/input/trace-events
+++ b/hw/input/trace-events
@@ -1,5 +1,13 @@
# See docs/devel/tracing.txt for syntax documentation.
+# hw/input/adb-kbd.c
+adb_kbd_no_key(void) "Ignoring NO_KEY"
+adb_kbd_writereg(int reg, uint8_t val) "reg %d val 0x%2.2x"
+adb_kbd_readreg(int reg, uint8_t val0, uint8_t val1) "reg %d obuf[0] 0x%2.2x
obuf[1] 0x%2.2x"
+# hw/input/adb-mouse.c
+adb_mouse_writereg(int reg, uint8_t val) "reg %d val 0x%2.2x"
+adb_mouse_readreg(int reg, uint8_t val0, uint8_t val1) "reg %d obuf[0] 0x%2.2x
obuf[1] 0x%2.2x"
+
# hw/input/ps2.c
ps2_put_keycode(void *opaque, int keycode) "%p keycode 0x%02x"
ps2_keyboard_event(void *opaque, int qcode, int down, unsigned int modifier, unsigned
int modifiers) "%p qcode %d down %d modifier 0x%x modifiers 0x%x"
Thanks Laurent - looks good to me.
Reviewed-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk>
ATB,
Mark.
() and thus completely remove the busA property from the
PBMPCIBridge state.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk>
---
hw/pci-host/apb.c | 29 +
include/hw/pci-host/apb.h | 3 ---
2 files changed, 13 insertions(+), 19 deletions(-)
diff
This also includes the related IOMMUState typedef and defines.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk>
Reviewed-by: Artyom Tarasenko <atar4q...@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <f4...@amsat.org>
---
hw/pci-host/
Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk>
Reviewed-by: Philippe Mathieu-Daudé <f4...@amsat.org>
---
hw/sparc64/sun4u.c | 12 ++--
hw/sparc64/trace-events | 3 +++
2 files changed, 5 insertions(+), 10 deletions(-)
diff --git a/hw/sparc64/sun4u.c
This enables us to remove these parameters from pci_apb_init().
Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk>
Reviewed-by: Artyom Tarasenko <atar4q...@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <f4...@amsat.org>
---
hw/pci-host/apb.c | 14 +---
Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk>
Reviewed-by: Philippe Mathieu-Daudé <f4...@amsat.org>
---
hw/pci-host/apb.c | 6 ++
hw/sparc64/sparc64.c | 2 ++
hw/sparc64/sun4u.c | 12
include/hw/pci-host/apb.h | 6 --
This belongs in the PCI-ISA bridge rather than at the machine level.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk>
Reviewed-by: Philippe Mathieu-Daudé <f4...@amsat.org>
---
hw/sparc64/sun4u.c | 78 --
1 file
This is a first step towards removing pci_apb_init() completely.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk>
Reviewed-by: Philippe Mathieu-Daudé <f4...@amsat.org>
---
hw/pci-host/apb.c | 8
hw/sparc64/sun4u.c| 6 --
include/hw/pci-ho
By making the special_base and mem_base values qdev properties, we can move
the remaining parts of pci_apb_init() into the pbm init() and realize()
functions.
This finally allows us to instantiate the APB directly using standard qdev
create/init functions in sun4u.c.
Signed-off-by: Mark Cave
, and rename isa_irq_handler() to
ebus_isa_irq_handler().
Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk>
Reviewed-by: Artyom Tarasenko <atar4q...@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <f4...@amsat.org>
---
hw/pci-host/apb.c | 2 +-
hw/sparc64/s
.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk>
Reviewed-by: Philippe Mathieu-Daudé <f4...@amsat.org>
---
hw/sparc64/sun4u.c | 19 ---
1 file changed, 12 insertions(+), 7 deletions(-)
diff --git a/hw/sparc64/sun4u.c b/hw/sparc64/sun4u.c
index 1672f256e7
This is in preparation for switching code in hw/sparc64 from DPRINTF over to
trace events.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk>
Reviewed-by: Artyom Tarasenko <atar4q...@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <f4...@amsat.org>
---
Makefile.
oken register implementation and instead return the uninorth
version corresponding to the hardware.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk>
---
hw/pci-host/uninorth.c | 11 +--
include/hw/pci-host/uninorth.h | 4 +++-
2 files changed, 8 insertions(+), 7
Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk>
---
hw/misc/macio/macio.c | 3 +++
hw/misc/macio/trace-events | 4
2 files changed, 7 insertions(+)
diff --git a/hw/misc/macio/macio.c b/hw/misc/macio/macio.c
index 79621eb879..f9a40eea81 100644
--- a/hw/misc/macio/m
>From testing all my local images the timer registers are only ever
read or written with 32-bit accesses.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk>
---
hw/misc/macio/macio.c | 4
1 file changed, 4 insertions(+)
diff --git a/hw/misc/macio/macio.c b/hw/m
>From testing all my local images the uninorth registers are only ever
read or written with 32-bit accesses.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk>
---
hw/pci-host/uninorth.c | 4
1 file changed, 4 insertions(+)
diff --git a/hw/pci-host/uninorth.c b/hw
it instead
with a single read-only version register as determined from looking at various
Darwin/Linux/BSD sources.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk>
Mark Cave-Ayland (4):
uninorth: add impl min_access_size and max_access_size to unin_ops
macio: add trace-
This patch adds gen_io_start()/gen_io_end() to various instructions as required
in order to boot my OpenBIOS test images on qemu-system-sparc64 with icount
enabled.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk>
---
target/sparc/translate.
Time of Day clock error: reason [Jumped by 0x134]".
Hopefully more sets of eyes will be able to point me in the right direction
related
to the Time of Day (m48t59) error and the TB exits in order to get this ready
for
commit.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.u
g two 8042 keyboard devices at the same address.
Resolve this by similarly removing the 8042 keyboard from the 40p machine as
done for the prep machine in commit 72d3d8f052.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk>
---
hw/ppc/prep.c | 1 -
1 file changed, 1 deletio
On 24/05/18 06:39, Mark Cave-Ayland wrote:
Commit 72d3d8f052 "hw/isa/superio: Add a keyboard/mouse controller (8042)"
added an 8042 keyboard device to the PC87312 superio device to replace that
being used by the prep machine.
Unfortunately this commit didn't do the same for the 4
On 22/05/18 09:30, Thomas Huth wrote:
Peter reported that the boot-serial tester sometimes runs into timeouts
with SPARC guests. It's currently completely unclear whether this is due
to too much load on the host machine (so that the guest really just ran
too slow), or whether there is something
to zero to fail and so the VGA internal
memory can be accessed correctly again.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk>
---
hw/ppc/prep.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/hw/ppc/prep.c b/hw/ppc/prep.c
index be4db6a687..5ed0bcd862 100644
--- a/hw/ppc/
On 09/06/18 11:01, Mark Cave-Ayland wrote:
Yeah, we can certainly remove a huge chunk of this by converting over to
the mos6522 device. My last set of updates to CUDA a couple of days ago
are probably the best reference, but I can probably find some time to do
the basic conversion for you
This is used in OpenBIOS to define the memory layout of the NVRAM device. Whilst
currently left at its default value, add the missing definition to ensure it is
reserved.
Signed-off-by: Mark Cave-Ayland
---
include/hw/ppc/ppc.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/hw/ppc
Commits b6712ea391 removed the macio_init() function but missed the header
prototype in mac.h. Remove it since it is no longer needed.
Signed-off-by: Mark Cave-Ayland
---
hw/ppc/mac.h | 3 ---
1 file changed, 3 deletions(-)
diff --git a/hw/ppc/mac.h b/hw/ppc/mac.h
index dac96317af..89fa8bbed7
investigate
the original migration issue, and removes the last remaining user of
VMSTATE_TIMER_PTR_TEST from the codebase.
Signed-off-by: Mark Cave-Ayland
Mark Cave-Ayland (4):
mos6522: fix vmstate_mos6522_timer version in vmstate_mos6522
cuda: embed mos6522_cuda device directly rather than using
This was accidentally introduced when extracting the 6522 VIA functionality
from the CUDA device, and prevents loadvm from completing successfully.
Signed-off-by: Mark Cave-Ayland
---
hw/misc/mos6522.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/misc/mos6522.c b/hw
the timebase under TCG.
Signed-off-by: Mark Cave-Ayland
---
hw/misc/macio/cuda.c | 44 ++--
hw/misc/mos6522.c| 2 +-
include/hw/misc/macio/cuda.h | 27 ---
include/hw/misc/mos6522.h| 2 ++
4 files changed, 33
that
it isn't required to store the timer frequency within vmstate_mos6522_timer
itself.
By moving the frequency initialisation to the device reset function then we
find that the realize function for both mos6522 and mos6522_cuda becomes
obsolete and can simply be removed.
Signed-off-by: Mark Cave-Ayland
Here are some trivial Mac fixes taken from various working branches in my
local git repository. Since they should need minimal review it seems
worthwhile to send them separately.
Signed-off-by: Mark Cave-Ayland
Mark Cave-Ayland (3):
ppc: remove obsolete pci_pmac_init() definitions from mac.h
and remove mos6522_timer_exist() as it is no
longer required.
Signed-off-by: Mark Cave-Ayland
---
hw/misc/mos6522.c | 9 +
1 file changed, 1 insertion(+), 8 deletions(-)
diff --git a/hw/misc/mos6522.c b/hw/misc/mos6522.c
index d0a0c9e5d9..e9b686ac92 100644
--- a/hw/misc/mos6522.c
+++ b/hw
Commits 7b19318bee and 8ce3f743c7 removed the pci_pmac_init() and
pci_pmac_u3_init() functions but missed the header prototypes in mac.h. Remove
them since they are no longer needed.
Signed-off-by: Mark Cave-Ayland
---
hw/ppc/mac.h | 6 --
1 file changed, 6 deletions(-)
diff --git a/hw/ppc
Mark Cave-Ayland (1):
Update OpenBIOS images to 8fe6f5f96f built from submodule.
pc-bios/openbios-ppc | Bin 754936 -> 763128 bytes
pc-bios/openbios-sparc32 | Bin 382048 -> 382048 bytes
pc-bios/openbios-sparc64 | Bin 1593408 -> 1593408 bytes
roms
This patch adds gen_io_start()/gen_io_end() to various instructions as required
in order to boot my OpenBIOS test images on qemu-system-sparc64 with icount
enabled.
Signed-off-by: Mark Cave-Ayland
---
target/sparc/translate.c | 97
1 file changed
Time of Day clock error: reason [Jumped by 0x134]".
Hopefully more sets of eyes will be able to point me in the right direction
related
to the Time of Day (m48t59) error and the TB exits in order to get this ready
for
commit.
Signed-off-by: Mark Cave-Ayland
v2:
- Rebase onto master
MP": {"version": {"qemu": {"micro": 91, "minor": 11, "major": 2},
"package": "build-all"}, "capabilities": []}}
{"return": {}}
RAMBlock "sun4m.afx" already registered, abort!
Aborted (core dumped)
Fix th
This patch adds gen_io_start()/gen_io_end() to various instructions as required
in order to boot my OpenBIOS test images on qemu-system-sparc64 with icount
enabled.
Signed-off-by: Mark Cave-Ayland
Reviewed-by: Richard Henderson
Signed-off-by: Mark Cave-Ayland
---
target/sparc/translate.c
ot;: 2},
"package": "build-all"}, "capabilities": []}}
{"return": {}}
RAMBlock "sun4u.prom" already registered, abort!
Aborted (core dumped)
This should not happen. Fix this problem by moving the affected code from
instance_init into a reali
-20180618
for you to fetch changes up to 46bb0137b8266ab8dedc3b9712f3d246bbd686ba:
SPARC64: add icount support (2018-06-17 11:13:06 +0100)
qemu-sparc queue
Mark Cave
on bits 1 and 2 of ports A and B.
Signed-off-by: Mark Cave-Ayland
---
hw/misc/mos6522.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/misc/mos6522.c b/hw/misc/mos6522.c
index ad5041d8c0..8d5b419825 100644
--- a/hw/misc/mos6522.c
+++ b/hw/misc/mos6522.c
@@ -40,7 +40,7
According to the 6522 datasheet the shift register (SR) interrupt flag is
cleared upon write with no mention of any other interrupt flags.
Signed-off-by: Mark Cave-Ayland
---
hw/misc/mos6522.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/misc/mos6522.c b/hw/misc
warnings.
Signed-off-by: Mark Cave-Ayland
---
hw/mips/mips_jazz.c | 19 ---
1 file changed, 16 insertions(+), 3 deletions(-)
diff --git a/hw/mips/mips_jazz.c b/hw/mips/mips_jazz.c
index 90cb306f53..1afbe3ce6a 100644
--- a/hw/mips/mips_jazz.c
+++ b/hw/mips/mips_jazz.c
@@ -145,10
jazz images and so this
is compile-tested only (although passes "make check") and needs an ACK from
someone (Hervé?).
Now that the last user of esp_init() is gone, patch 2 removes the legacy
function and its associated header.
Signed-off-by: Mark Cave-Ayland
Mark Cave-Ayland (2):
hw
Remove the legacy esp_init() function now that there are no more remaining
users.
Signed-off-by: Mark Cave-Ayland
---
hw/scsi/esp.c | 30 --
include/hw/scsi/esp.h | 5 -
2 files changed, 35 deletions(-)
diff --git a/hw/scsi/esp.c b/hw/scsi/esp.c
index
In the case where we have an interrupt generated externally from inputs to
bits 1 and 2 of port A and/or port B, it is necessary to expose
mos6522_update_irq() so it can be called by the interrupt source.
Signed-off-by: Mark Cave-Ayland
---
hw/misc/mos6522.c | 1 +
include/hw/misc
Cave-Ayland
Mark Cave-Ayland (3):
mos6522: only clear the shift register interrupt upon write
mos6522: remove additional interrupt flag filter from
mos6522_update_irq()
mos6522: expose mos6522_update_irq() through MOS6522DeviceClass
hw/misc/mos6522.c | 5 +++--
include/hw/misc
On 13/06/18 11:06, Paolo Bonzini wrote:
On 13/06/2018 11:47, Mark Cave-Ayland wrote:
+dev = qdev_create(NULL, TYPE_ESP);
+sysbus_esp = ESP_STATE(dev);
+esp = _esp->esp;
+esp->dma_memory_read = rc4030_dma_read;
+esp->dma_memory_write = rc4030_dma_write;
+esp-&g
On 13/06/18 12:19, Paolo Bonzini wrote:
On 13/06/2018 12:36, Mark Cave-Ayland wrote:
Check out hw/dma/sparc32_dma.c for some ugly examples:
espdma_memory_read()/espdma_memory_write() update the DMA address
pointer register after each read/write, and
ledma_memory_read()/ledma_memory_write
Time of Day clock error: reason [Jumped by 0x134]".
Hopefully more sets of eyes will be able to point me in the right direction
related
to the Time of Day (m48t59) error and the TB exits in order to get this ready
for
commit.
Signed-off-by: Mark Cave-Ayland
v3:
- Implement feedback from Ri
This patch adds gen_io_start()/gen_io_end() to various instructions as required
in order to boot my OpenBIOS test images on qemu-system-sparc64 with icount
enabled.
Signed-off-by: Mark Cave-Ayland
---
target/sparc/translate.c | 99
1 file changed
On 14/06/18 22:02, Richard Henderson wrote:
On 06/14/2018 12:53 AM, Mark Cave-Ayland wrote:
+if (dc->base.tb->cflags & CF_USE_ICOUNT) {
+gen_io_start();
+}
Need to use tb_cflags(dc->base.tb) for th
On 15/06/18 11:37, Thomas Huth wrote:
Hi Mark, hi Artyom,
while using valgrind to fix some issues with the rom_ptr() function
today, I noticed that there is one more problem in sun4u_load_kernel():
The kernel_top variable can be used uninitialized in some cases:
If load_elf() fails and the
On 15/06/18 06:15, Thomas Huth wrote:
On 05.04.2018 12:43, Thomas Huth wrote:
Several devices of the sun4m machines are using _fatal in
their instance_init function and thus can cause QEMU to abort
unexpectedly:
$ echo "{'execute':'qmp_capabilities'}"\
(ISASuperIODevice *sio,
uint8_t index)
static uint16_t get_parallel_iobase(ISASuperIODevice *sio, uint8_t index)
{
-return 0x3bc;
+return 0x378;
}
static unsigned int get_parallel_irq(ISASuperIODevice *sio, uint8_t index)
Reviewed-by: Mark Cave-Ayland
ATB,
Mark.
On 14/06/18 23:40, Richard Henderson wrote:
On 06/14/2018 12:28 PM, Mark Cave-Ayland wrote:
@@ -5834,6 +5928,11 @@ static void sparc_tr_tb_stop(DisasContextBase *dcbase,
CPUState *cs)
save_npc(dc);
tcg_gen_exit_tb(NULL, 0);
}
+} else if (dc
Time of Day clock error: reason [Jumped by 0x134]".
Hopefully more sets of eyes will be able to point me in the right direction
related
to the Time of Day (m48t59) error and the TB exits in order to get this ready
for
commit.
Signed-off-by: Mark Cave-Ayland
v4:
- Convert sparc_tr_tb_sto
This patch adds gen_io_start()/gen_io_end() to various instructions as required
in order to boot my OpenBIOS test images on qemu-system-sparc64 with icount
enabled.
Signed-off-by: Mark Cave-Ayland
---
target/sparc/translate.c | 111 ++-
1 file changed
to the firmware via
the fw_cfg interface so that it can present the correct device tree.
The default is cuda which is the current default and so will have no
change in behaviour.
Signed-off-by: Mark Cave-Ayland
---
hw/misc/macio/macio.c | 7 +
hw/ppc/mac.h | 6
hw/ppc
iling
list at https://mail.coreboot.org/pipermail/openbios/2018-June/010384.html.
Signed-off-by: Mark Cave-Ayland
Mark Cave-Ayland (7):
ppc: introduce Core99MachinesState for the mac99 machine
mac_newworld: add via machine option to control mac99 VIA/ADB
configuration
mac_newworld:
The programmer switch is wired up via an external GPIO pin and can be used
to aid debugging Mac guests.
Signed-off-by: Mark Cave-Ayland
---
hw/misc/macio/gpio.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/hw/misc/macio/gpio.c b/hw/misc/macio/gpio.c
index 5630afdf18
According to the Apple ADB documentation, register 3 is a 2-byte register
with the device address in the first byte, and the handler ID in the second
byte.
This is currently the opposite away to which QEMU returns them so switch the
order around.
Signed-off-by: Mark Cave-Ayland
---
hw/input
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