for guest
delivery.
Also add another sanity check to ensure similar bugs get caught.
Signed-off-by: Nicholas Piggin <npig...@gmail.com>
---
v3: David and I discussed this more on IRC, and agreed it's better to keep
such important MSR bit settings in the exception handler cases themselves.
Signed-off-by: Nicholas Piggin <npig...@gmail.com>
---
target-ppc/excp_helper.c | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/target-ppc/excp_helper.c b/target-ppc/excp_helper.c
index 53c4075..477af10 100644
--- a/target-ppc/excp_helper.c
+++ b/targ
On Thu, 20 Oct 2016 11:21:22 +0200
Thomas Huth <th...@redhat.com> wrote:
> On 20.10.2016 08:59, Nicholas Piggin wrote:
> > The H_SIGNAL_SYS_RESET hcall allows a guest CPU to raise a system
> > reset exception on other CPUs in the same guest.
> >
> > Sig
On Thu, 20 Oct 2016 15:08:07 +0200
Cédric Le Goater <c...@kaod.org> wrote:
> On 10/20/2016 08:59 AM, Nicholas Piggin wrote:
> > Signed-off-by: Nicholas Piggin <npig...@gmail.com>
> > ---
> > target-ppc/excp_helper.c | 8 ++--
> > 1 file changed, 6 inse
On Mon, 24 Oct 2016 12:16:19 +1100
David Gibson <da...@gibson.dropbear.id.au> wrote:
> On Fri, Oct 21, 2016 at 03:35:43PM +1100, Nicholas Piggin wrote:
> > On Fri, 21 Oct 2016 12:09:54 +1100
> > David Gibson <da...@gibson.dropbear.id.au> wrote:
> >
> &g
On Fri, 21 Oct 2016 12:09:15 +1100
David Gibson <da...@gibson.dropbear.id.au> wrote:
> On Thu, Oct 20, 2016 at 05:59:10PM +1100, Nicholas Piggin wrote:
> > Power ISA specifies ME bit handling for system reset interrupt:
> >
> > if the interrupt occurred while the
On Thu, 20 Oct 2016 18:49:22 +0200
Greg Kurz <gr...@kaod.org> wrote:
> On Thu, 20 Oct 2016 17:59:12 +1100
> Nicholas Piggin <npig...@gmail.com> wrote:
>
> > The H_SIGNAL_SYS_RESET hcall allows a guest CPU to raise a system
> > reset exception on other CPUs in the
On Fri, 21 Oct 2016 12:09:54 +1100
David Gibson <da...@gibson.dropbear.id.au> wrote:
> On Fri, Oct 21, 2016 at 12:40:58AM +1100, Nicholas Piggin wrote:
> > On Thu, 20 Oct 2016 15:08:07 +0200
> > Cédric Le Goater <c...@kaod.org> wrote:
> >
> > > On
The H_SIGNAL_SYS_RESET hcall allows a guest CPU to raise a system
reset exception on other CPUs in the same guest.
Signed-off-by: Nicholas Piggin <npig...@gmail.com>
---
hw/ppc/spapr_hcall.c | 42 ++
include/hw/ppc/spapr.h | 8 +++-
2 files c
On Thu, 20 Oct 2016 13:49:25 +0200
Greg Kurz <gr...@kaod.org> wrote:
> On Thu, 20 Oct 2016 17:59:09 +1100
> Nicholas Piggin <npig...@gmail.com> wrote:
>
> > Date: Thu, 20 Oct 2016 17:38:24 +1100
> > Subject: [PATCH 0/3] ppc: system reset interrupt fixes and new h
by the HV bit being set. After
changing that, the interrupt was being handled okay. Should there be
a more general check to ensure the HV bit is not set in the guest?
I implemented Linux support for the new hcall in crashdump code, and
it works.
Thanks,
Nick
Nicholas Piggin (3):
ppc: fix MSR_ME
Power ISA specifies ME bit handling for system reset interrupt:
if the interrupt occurred while the thread was in power-saving
mode, set to 1; otherwise not altered
Signed-off-by: Nicholas Piggin <npig...@gmail.com>
---
target-ppc/excp_helper.c | 4 ++--
1 file changed, 2 inse
return H_Success.
Signed-off-by: Nicholas Piggin <npig...@gmail.com>
---
Hi,
I have taken into account feedback since last posting, the comments
were appreciated.
http://lists.nongnu.org/archive/html/qemu-devel/2016-10/msg04881.html
- Improved changelog description.
- Shared code with QE
return H_Success.
Signed-off-by: Nicholas Piggin <npig...@gmail.com>
---
hw/ppc/spapr.c | 4 ++--
hw/ppc/spapr_hcall.c | 41 +
include/hw/ppc/spapr.h | 5 -
3 files changed, 47 insertions(+), 3 deletions(-)
diff --git a/hw/ppc/spapr.c
On Wed, 9 Aug 2017 14:05:46 +1000
David Gibson <da...@gibson.dropbear.id.au> wrote:
> On Wed, Aug 09, 2017 at 03:59:36AM +1000, Nicholas Piggin wrote:
> > Unicast H_SIGNAL_SYS_RESET does not find the target CPU if it
> > is not the current CPU.
> >
> > Sig
Unicast H_SIGNAL_SYS_RESET does not find the target CPU if it
is not the current CPU.
Signed-off-by: Nicholas Piggin <npig...@gmail.com>
---
Unfortunately this slipped through without my noticing because the
Linux driver for NMI IPIs has a fallback to using regular IPIs, and
because Lin
Cédric Le Goater's on April 11, 2019 4:34 pm:
> From: Benjamin Herrenschmidt
>
> H_PROD should be fully functional, H_CEDE is modified to
> ignore a proded CPU. H_CONFER is a stub to avoid returning
> an error.
Huh, I just implemented these a couple of days ago to test pseries
suspend, also
These implementations have a few deficiencies that are noted, but are
good enough for Linux to use.
Signed-off-by: Nicholas Piggin
---
Cleaned up checkpatch warnings, sorry I didn't realise that exists.
hw/ppc/spapr_hcall.c | 88
1 file changed, 88
These implementations have a few deficiencies that are noted, but are
good enough for Linux to use.
Signed-off-by: Nicholas Piggin
---
This has been tested with TCG with some Linux hacks to use H_JOIN/H_PROD
for suspend and CPU unplug (plus an implementation of ibm,suspend-me to
do the suspend
David Gibson's on April 15, 2019 2:13 pm:
> On Fri, Apr 12, 2019 at 07:36:03PM +1000, Nicholas Piggin wrote:
>> These implementations have a few deficiencies that are noted, but are
>> good enough for Linux to use.
>>
>> Signed-off-by: Nicholas Piggin
>> ---
>
David Gibson's on April 17, 2019 10:47 pm:
> On Wed, Apr 17, 2019 at 02:01:29PM +0200, Greg Kurz wrote:
>> On Wed, 17 Apr 2019 21:20:00 +1000
>> Nicholas Piggin wrote:
>> > [...]
>> > >> @@ -1860,6 +1928,9 @@ static void hypercall_register_t
Greg Kurz's on April 17, 2019 10:01 pm:
> On Wed, 17 Apr 2019 21:20:00 +1000
> Nicholas Piggin wrote:
>> [...]
>> >> @@ -1860,6 +1928,9 @@ static void hypercall_register_types(void)
>> >> /* hcall-splpar */
>> >> spapr_r
David Gibson's on April 17, 2019 10:47 am:
> On Mon, Apr 15, 2019 at 03:06:43PM +1000, Nicholas Piggin wrote:
>> It needs to be cleared at all vCPU dispatch points to SPEC, not just
>> when calling H_CEDE as Ben's patch had. I think complexity would be
>> significant for quest
David Gibson's on April 17, 2019 11:59 am:
> On Tue, Apr 16, 2019 at 02:55:52PM +1000, Nicholas Piggin wrote:
>> These implementations have a few deficiencies that are noted, but are
>> good enough for Linux to use.
>>
>> Signed-off-by: Nicholas Piggin
>> ---
These implementations have a few deficiencies that are noted, but are
good enough for Linux to use.
Signed-off-by: Nicholas Piggin
---
v3: Removed wrong comment about GPR3, drop H_JOIN for now (at least until
it is tested some more in Linux/KVM), and expand the comment about not
prod bit.
hw
David Gibson's on July 16, 2019 6:25 pm:
> On Tue, Jul 16, 2019 at 12:47:24PM +1000, Nicholas Piggin wrote:
>> This does not do directed yielding and is not quite as strict as PAPR
>> specifies in terms of precise dispatch behaviour. This generally will
>> mean suboptimal per
David Gibson's on July 16, 2019 5:34 pm:
> On Tue, Jul 16, 2019 at 12:47:22PM +1000, Nicholas Piggin wrote:
>> Implement cpu_exec_enter/exit on ppc which calls into new methods of
>> the same name in PPCVirtualHypervisorClass. These are used by spapr
>> to implement these
David Gibson's on July 16, 2019 6:30 pm:
> On Tue, Jul 16, 2019 at 12:47:26PM +1000, Nicholas Piggin wrote:
>> This has been useful to modify and test the Linux pseries suspend
>> code but it requires modification to the guest to call it (due to
>> being gated by other u
Cédric Le Goater's on July 17, 2019 10:50 pm:
> On 17/07/2019 07:39, Nicholas Piggin wrote:
>> Implement cpu_exec_enter/exit on ppc which calls into new methods of
>> the same name in PPCVirtualHypervisorClass. These are used by spapr
>> to implement these splpar element
Greg Kurz's on July 18, 2019 1:29 am:
> On Wed, 17 Jul 2019 15:39:49 +1000
> Nicholas Piggin wrote:
>
>> -cpu->machine_data = g_new0(SpaprCpuState, 1);
>> +spapr_cpu = g_new0(SpaprCpuState, 1);
>> +cpu->machine_data = spapr_cpu;
>
> What's t
Greg Kurz's on July 18, 2019 3:00 am:
> On Wed, 17 Jul 2019 15:39:51 +1000
> Nicholas Piggin wrote:
>
>> This does not do directed yielding and is not quite as strict as PAPR
>> specifies in terms of precise dispatch behaviour. This generally will
>> mean suboptim
Cédric Le Goater's on July 17, 2019 11:33 pm:
> On 17/07/2019 07:39, Nicholas Piggin wrote:
>> H_PROD is added, and H_CEDE is modified to test the prod bit
>> according to PAPR.
>>
>> Signed-off-by: Nicholas Piggin
>> ---
>> hw/ppc/spapr_hcall.c | 29 +
Greg Kurz's on July 18, 2019 3:30 am:
> On Wed, 17 Jul 2019 15:39:52 +1000
> Nicholas Piggin wrote:
>
>> This has been useful to modify and test the Linux pseries suspend
>> code but it requires modification to the guest to call it (due to
>> being gated by o
Lot of good reviews (thanks), several more bug fixes and some good
cleanups.
Thanks,
Nick
Nicholas Piggin (4):
spapr: Implement dispatch tracking for tcg
spapr: Implement H_PROD
spapr: Implement H_CONFER
spapr: Implement H_JOIN
hw/ppc/spapr.c | 54
hw/ppc
Implement cpu_exec_enter/exit on ppc which calls into new methods of
the same name in PPCVirtualHypervisorClass. These are used by spapr
to implement the splpar VPA dispatch counter initially.
Signed-off-by: Nicholas Piggin
---
Changes since v5:
- Move 'prod' into next patch.
- Use uint32_t type
This has been useful to modify and test the Linux pseries suspend
code but it requires modification to the guest to call it (due to
being gated by other unimplemented features). It is not otherwise
used by Linux yet, but work is slowly progressing there.
Signed-off-by: Nicholas Piggin
This does not do directed yielding and is not quite as strict as PAPR
specifies in terms of precise dispatch behaviour. This generally will
mean suboptimal performance, rather than guest misbehaviour. Linux
does not rely on exact dispatch behaviour.
Signed-off-by: Nicholas Piggin
---
Changes
H_PROD is added, and H_CEDE is modified to test the prod bit
according to PAPR.
Signed-off-by: Nicholas Piggin
---
Changes since v5:
- Add the prod bit here
- Fix target CPU
hw/ppc/spapr.c | 1 +
hw/ppc/spapr_hcall.c| 32
include
Commit 1405819637f53 ("qmp: don't emit the RESET event on wakeup from
S3") changed system wakeup to avoid calling qapi_event_send_reset.
Commit 76ed4b18debfe ("s390/ipl: fix ipl with -no-reboot") appears to
have inadvertently broken that logic.
Signed-off-by: Nicholas Piggi
Any comments on this series would be welcome. Hopefully someone who
knows i386 can give some feedback on the possible bug fix, and
whether the new wakeup method will suit i386.
Thanks,
Nick
Nicholas Piggin (3):
qmp: don't emit the RESET event on wakeup
machine: Add wakeup method
possible migration and reconfiguration
details).
Implement a machine ->wakeup method and use that if it exists.
Signed-off-by: Nicholas Piggin
---
include/hw/boards.h | 1 +
vl.c| 29 -
2 files changed, 29 insertions(+), 1 deletion(-)
diff --git a/incl
kernel to suspend with
`echo mem > /sys/power/state` and be resumed with system_wakeup
monitor command.
Signed-off-by: Nicholas Piggin
---
hw/ppc/spapr.c | 11 +++
hw/ppc/spapr_rtas.c| 32
include/hw/ppc/spapr.h | 3 ++-
3 files changed,
Greg Kurz's on July 18, 2019 8:13 pm:
> On Thu, 18 Jul 2019 13:42:11 +1000
> Nicholas Piggin wrote:
>
>> Implement cpu_exec_enter/exit on ppc which calls into new methods of
>> the same name in PPCVirtualHypervisorClass. These are used by spapr
>> to implement the
Christian Borntraeger's on July 18, 2019 9:27 pm:
>
>
> On 18.07.19 13:06, Paolo Bonzini wrote:
>> On 18/07/19 12:39, Nicholas Piggin wrote:
>>> Commit 1405819637f53 ("qmp: don't emit the RESET event on wakeup from
>>> S3") changed system wakeup to avoi
Paolo Bonzini's on July 18, 2019 9:08 pm:
> On 18/07/19 12:39, Nicholas Piggin wrote:
>> Any comments on this series would be welcome. Hopefully someone who
>> knows i386 can give some feedback on the possible bug fix, and
>> whether the new wakeup method will suit i386.
&g
Implement cpu_exec_enter/exit on ppc which calls into new methods of
the same name in PPCVirtualHypervisorClass. These are used by spapr
to implement these splpar elements, used in subsequent changes.
Signed-off-by: Nicholas Piggin
---
Changes since v4:
- Store to VPA on the way out as well
Since the last post I tried to account for feedback, fix style, add
comments, fixed a bug or two in migration etc, more testing, and
dropped the rtas ibm,suspend-me patch for now pending some reworking.
Thanks,
Nick
Nicholas Piggin (4):
spapr: Implement VPA dispatch counter and prod bit on tcg
This is a bit of proof of concept in case mttcg becomes more important
yield could be handled like this. You can have by accident or deliberately
force vCPUs onto the same physical CPU and cause inversion issues when the
lock holder was preempted by the waiter. This is lightly tested but not
to
This does not do directed yielding and is not quite as strict as PAPR
specifies in terms of precise dispatch behaviour. This generally will
mean suboptimal performance, rather than guest misbehaviour. Linux
does not rely on exact dispatch behaviour.
Signed-off-by: Nicholas Piggin
---
Changes
This has been useful to modify and test the Linux pseries suspend
code but it requires modification to the guest to call it (due to
being gated by other unimplemented features). It is not otherwise
used by Linux yet, but work is slowly progressing there.
Signed-off-by: Nicholas Piggin
H_PROD is added, and H_CEDE is modified to test the prod bit
according to PAPR.
Signed-off-by: Nicholas Piggin
---
hw/ppc/spapr_hcall.c | 29 +
1 file changed, 29 insertions(+)
diff --git a/hw/ppc/spapr_hcall.c b/hw/ppc/spapr_hcall.c
index e615881ac4..8b208ab259
David Gibson's on July 17, 2019 11:51 am:
> On Tue, Jul 16, 2019 at 07:27:22PM +1000, Nicholas Piggin wrote:
>> David Gibson's on July 16, 2019 5:34 pm:
>> > On Tue, Jul 16, 2019 at 12:47:22PM +1000, Nicholas Piggin wrote:
>> >> Implement cpu_exec_enter/exit on pp
on QEMU "work",
which is at least useful for testing without having PowerVM.
Thanks,
Nick
Nicholas Piggin (5):
spapr: Implement dispatch counter and prod bit on tcg
spapr: Implement H_PROD
spapr: Implement H_CONFER
spapr: Implement H_JOIN
spapr: Implement ibm,suspend-me
hw/p
Implement cpu_exec_enter/exit on ppc which calls into new methods of
the same name in PPCVirtualHypervisorClass. These are used by spapr
to implement these splpar elements, used in subsequent changes.
Signed-off-by: Nicholas Piggin
---
hw/ppc/spapr.c | 25
H_PROD is added, and H_CEDE is modified to test the prod bit
according to PAPR.
Signed-off-by: Nicholas Piggin
---
hw/ppc/spapr_hcall.c | 29 +
1 file changed, 29 insertions(+)
diff --git a/hw/ppc/spapr_hcall.c b/hw/ppc/spapr_hcall.c
index e615881ac4..8b208ab259
This has been useful to modify and test the Linux pseries suspend
code but it requires modification to the guest to call it (due to
being gated by other unimplemented features). It is not otherwise
used by Linux yet, but work is slowly progressing there.
Signed-off-by: Nicholas Piggin
---
hw
kernel to suspend with
`echo mem > /sys/power/state` and be resumed with system_wakeup
monitor command.
Signed-off-by: Nicholas Piggin
---
hw/ppc/spapr.c | 26 ++
hw/ppc/spapr_rtas.c| 32
include/hw/ppc/spapr.h | 7 ++-
This does not do directed yielding and is not quite as strict as PAPR
specifies in terms of precise dispatch behaviour. This generally will
mean suboptimal performance, rather than guest misbehaviour. Linux
does not rely on exact dispatch behaviour.
Signed-off-by: Nicholas Piggin
---
hw/ppc
Cédric Le Goater's on July 17, 2019 8:16 pm:
> On 17/07/2019 07:39, Nicholas Piggin wrote:
>> H_PROD is added, and H_CEDE is modified to test the prod bit
>> according to PAPR.
>>
>> Signed-off-by: Nicholas Piggin
>> ---
>> hw/ppc/spapr_hcall.c | 29 +
possible migration and reconfiguration
details).
Implement a machine ->wakeup method and use that if it exists.
Signed-off-by: Nicholas Piggin
---
include/hw/boards.h | 1 +
vl.c| 18 +-
2 files changed, 18 insertions(+), 1 deletion(-)
diff --git a/include/hw/board
nks,
Nick
Nicholas Piggin (3):
machine: Add wakeup method to MachineClass
i386: use machine class ->wakeup method
spapr: Implement ibm,suspend-me
hw/i386/pc.c | 8
hw/ppc/spapr.c | 7 +++
hw/ppc/spapr_rtas.c| 32
incl
nks,
Nick
Nicholas Piggin (3):
machine: Add wakeup method to MachineClass
i386: use machine class ->wakeup method
spapr: Implement ibm,suspend-me
hw/i386/pc.c | 8
hw/ppc/spapr.c | 7 +++
hw/ppc/spapr_rtas.c| 32
incl
possible migration and reconfiguration
details).
Implement a machine ->wakeup method and use that if it exists.
Signed-off-by: Nicholas Piggin
---
include/hw/boards.h | 1 +
vl.c| 18 +-
2 files changed, 18 insertions(+), 1 deletion(-)
diff --git a/include/hw/board
Move the i386 suspend_wakeup logic out of the fallback path, and into
the new ->wakeup method.
Signed-off-by: Nicholas Piggin
---
hw/i386/pc.c | 8
vl.c | 2 --
2 files changed, 8 insertions(+), 2 deletions(-)
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index 549c437
kernel to suspend with
`echo mem > /sys/power/state` and be resumed with system_wakeup
monitor command.
Signed-off-by: Nicholas Piggin
---
hw/ppc/spapr.c | 7 +++
hw/ppc/spapr_rtas.c| 32
include/hw/ppc/spapr.h | 3 ++-
3 files changed,
Alex Bennée's on December 20, 2019 11:11 pm:
>
> Nicholas Piggin writes:
>
>> This is a bit of proof of concept in case mttcg becomes more important
>> yield could be handled like this. You can have by accident or deliberately
>> force vCPUs onto the same physical CPU
Nicholas Piggin's on April 11, 2020 7:32 pm:
> Nathan Chancellor's on April 11, 2020 10:53 am:
>> The tt.config values are needed to reproduce but I did not verify that
>> ONLY tt.config was needed. Other than that, no, we are just building
>> either pseries_defconfig or powernv_defconfig with
Excerpts from Philippe Mathieu-Daudé's message of April 17, 2020 9:00 pm:
> On 4/17/20 12:51 PM, Nicholas Piggin wrote:
>> Excerpts from Philippe Mathieu-Daudé's message of April 17, 2020 7:07 pm:
>>> This fixes:
>>>
>>> $ qemu-system-ppc64 \
>>> -m
structions in flight where one may influence how another
behaves.
Cc: qemu-sta...@nongnu.org
Reported-by: Anton Blanchard
Reported-by: Nathan Chancellor
Tested-by: Nathan Chancellor
Signed-off-by: Nicholas Piggin
---
Thanks very much to Nathan for reporting and testing it, I added his
Tested-b
Excerpts from Cédric Le Goater's message of April 15, 2020 4:49 pm:
> On 4/14/20 1:11 PM, Nicholas Piggin wrote:
>>
>> The confusion arises from L=0 being "context synchronizing" whereas L=1
>> is "execution synchronizing", which is a weaker sema
Excerpts from Philippe Mathieu-Daudé's message of April 17, 2020 7:07 pm:
> This fixes:
>
> $ qemu-system-ppc64 \
> -machine pseries-4.1 -cpu power9 \
> -smp 4 -m 12G -accel tcg ...
> ...
> Quiescing Open Firmware ...
> Booting Linux via __start() @ 0x0200 ...
> Opcode
The FWNMI option must deliver system reset interrupts to their
registered address, and there are a few constraints on the handler
addresses specified in PAPR. Add the system reset address state and
checks.
Signed-off-by: Nicholas Piggin
---
hw/ppc/spapr.c | 2 ++
hw/ppc/spapr_rtas.c
nim sreset interrupts now in a way that's
compatible with existing Linux guests (which doesn't necessarily quite
match PAPR, but does match PowerVM behaviour).
Patch 8 isn't required but it papers over Linux warning messages caused
by another quirk.
Thanks,
Nick
Nicholas Piggin (8):
ppc/spapr: Fix FWN
Linux kernels call "ibm,nmi-interlock" in their system reset handlers
contrary to PAPR. Returning an error because the CPU does not hold the
interlock here causes Linux to print warning messages. PowerVM returns
success in this case, so do the same for now.
Signed-off-by: Nicholas Piggi
PAPR requires that if "ibm,nmi-register" succeeds, then the hypervisor
delivers all system reset and machine check exceptions to the registered
addresses.
System Resets are delivered with registers set to the architected state,
and with no interlock.
Signed-off-by: Nicholas Piggin
-
Cédric Le Goater's on March 26, 2020 2:38 am:
> [ Please use c...@kaod.org ! ]
>
> On 3/25/20 3:41 PM, Nicholas Piggin wrote:
>> This implements the NMI interface for the PNV machine, similarly to
>> commit 3431648272d ("spapr: Add support for new NMI interface")
Cédric Le Goater's on March 26, 2020 2:39 am:
> On 3/25/20 3:41 PM, Nicholas Piggin wrote:
>> This implements mce injection for pnv.
>
> This would be the command to use ?
>
> (qemu) mce 0 0x10 0x80 0xdeadbeef 1
>
>> Signed-off-by: Nicholas Piggin
>> -
David Gibson's on March 31, 2020 10:22 am:
> On Thu, Mar 26, 2020 at 12:41:45AM +1000, Nicholas Piggin wrote:
>> Like commit 9cb805fd26 ("cpus: Define callback for QEMU "nmi" command")
>> this implements a machine check injection command framework and d
Nicholas Piggin's on April 3, 2020 5:57 pm:
> Cédric Le Goater's on March 26, 2020 2:38 am:
>> [ Please use c...@kaod.org ! ]
>>
>> On 3/25/20 3:41 PM, Nicholas Piggin wrote:
>>> This implements the NMI interface for the PNV machine, similarly to
>>>
Cédric Le Goater's on April 4, 2020 1:47 am:
> On 4/3/20 3:12 PM, Nicholas Piggin wrote:
>> Nicholas Piggin's on April 3, 2020 5:57 pm:
>>> Cédric Le Goater's on March 26, 2020 2:38 am:
>>>> [ Please use c...@kaod.org ! ]
>>>>
>>>> On 3/25/20
Add some messages which explain problems and guest misbehaviour that
may be difficult to diagnose in rare cases of machine checks.
Signed-off-by: Nicholas Piggin
---
hw/ppc/spapr_events.c | 4
hw/ppc/spapr_rtas.c | 3 +++
2 files changed, 7 insertions(+)
diff --git a/hw/ppc
I
(it attempts to do more recovery on behalf of a non-FWNMI guest).
Signed-off-by: Nicholas Piggin
---
hw/ppc/spapr_caps.c | 7 ---
hw/ppc/spapr_rtas.c | 7 +++
target/ppc/kvm.c | 7 +++
target/ppc/kvm_ppc.h | 6 ++
4 files changed, 24 insertions(+), 3 deletions(-)
diff --git a
to run KVM and
QEMU in the sim to test papr guests, which is quite slow.
HMIs like timebase corruption would be another good candidate
for error injection.
Thanks,
Nick
Nicholas Piggin (5):
ppc/spapr: tweak change system reset helper
ppc/pnv: Add support for NMI interface
nmi: add MCE
Like commit 9cb805fd26 ("cpus: Define callback for QEMU "nmi" command")
this implements a machine check injection command framework and defines
a monitor command for ppc.
Signed-off-by: Nicholas Piggin
---
hmp-commands.hx | 20 +++-
hw/core/nmi.c
Rather than have the helper take an optional vector address
override, instead have its caller modify env->nip itself.
This is more consistent when adding pnv nmi support, and also
with mce injection added later.
Signed-off-by: Nicholas Piggin
---
hw/ppc/spapr.c | 9 ++---
tar
This implements mce injection for pnv.
Signed-off-by: Nicholas Piggin
---
hw/ppc/pnv.c | 55
target/ppc/cpu.h | 1 +
target/ppc/excp_helper.c | 12 +
3 files changed, 68 insertions(+)
diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
]
MCE: CPU0: PID: 495 Comm: a NIP: [000130ee07c8]
MCE: CPU0: Initiator CPU
MCE: CPU0: Unknown
[ 71.567193] MCE: CPU0: NIP: [c00d7f6c] plpar_hcall_norets+0x1c/0x28
[ 71.567249] MCE: CPU0: Initiator CPU
[ 71.567308] MCE: CPU0: Unknown
Signed-off-by: Nicholas Piggin
---
hw/ppc
This implements the NMI interface for the PNV machine, similarly to
commit 3431648272d ("spapr: Add support for new NMI interface") for
SPAPR.
Signed-off-by: Nicholas Piggin
---
hw/ppc/pnv.c | 30 +-
1 file changed, 29 insertions(+), 1 deletion(-)
diff
Some of the conditions are not as clearly documented as they could be.
Also the non-FWNMI case does not need a large comment.
Reviewed-by: Greg Kurz
Signed-off-by: Nicholas Piggin
---
hw/ppc/spapr_events.c | 19 +++
1 file changed, 11 insertions(+), 8 deletions(-)
diff --git
Since v1, I addressed Greg's review comments, and took the mce
injection patch out of this series.
Thanks,
Nick
Nicholas Piggin (4):
ppc/spapr: KVM FWNMI should not be enabled until guest requests it
ppc/spapr: Improve FWNMI machine check delivery corner case comments
ppc/spapr: Add FWNMI
Try to be tolerant of FWNMI delivery errors if the machine check had been
recovered by the host.
Signed-off-by: Nicholas Piggin
---
hw/ppc/spapr_events.c | 27 ++-
1 file changed, 22 insertions(+), 5 deletions(-)
diff --git a/hw/ppc/spapr_events.c b/hw/ppc
ot the
Cc: Cédric Le Goater
Cc: David Gibson
Signed-off-by: Nicholas Piggin
---
Thanks to Cedric for pointing out concerns with a previous MCE patch
that unearthed this as well. Linux does not actually care what these
SRR1[42:45] bits look like for non-powersave sresets, but we should
follow documen
POWER9 adds scv and rfscv instructions and the system call vectored
interrupt. Linux does not support this instruction yet but it has
been tested with a modified kernel that runs on real hardware.
Signed-off-by: Nicholas Piggin
---
This was tested with out-of-tree Linux patches and seems to work
Cédric Le Goater's on March 19, 2020 2:45 am:
> On 3/18/20 5:41 AM, Nicholas Piggin wrote:
>> slbia must invalidate TLBs even if it does not remove a valid SLB
>> entry, because slbmte can overwrite valid entries without removing
>> their TLBs.
>>
>> As the arc
Greg Kurz's on March 17, 2020 10:20 pm:
> On Tue, 17 Mar 2020 15:02:13 +1000
> Nicholas Piggin wrote:
>
>> Add some messages which explain problems and guest misbehaviour that
>> may be difficult to diagnose in rare cases of machine checks.
>>
>> Signed-off-b
Greg Kurz's on March 17, 2020 9:02 pm:
> On Tue, 17 Mar 2020 15:02:11 +1000
> Nicholas Piggin wrote:
>
>> The KVM FWNMI capability should be enabled with the "ibm,nmi-register"
>> rtas call. Although MCEs from KVM will be delivered as architected
>> in
/0x330
> [ 22.454820] MCE: CPU0: Initiator CPU
> [ 22.454944] MCE: CPU0: Unknown
Thanks, I was wondering why my MCEs weren't printing a DAR!
Reviewed-by: Nicholas Piggin
>
>
> Signed-off-by: Mahesh Salgaonkar
> ---
> Change in v2:
> - Fixed coding style issues.
>
Benjamin Herrenschmidt's on March 19, 2020 6:46 am:
> On Wed, 2020-03-18 at 18:08 +0100, Cédric Le Goater wrote:
>> On 3/18/20 5:41 AM, Nicholas Piggin wrote:
>> > Linux using the hash MMU ("disable_radix" command line) on a POWER9
>> > machine quickly hits tra
Greg Kurz's on March 18, 2020 2:57 am:
> On Tue, 17 Mar 2020 15:02:14 +1000
> Nicholas Piggin wrote:
>
>> Try to be tolerant of errors if the machine check had been recovered
>> by the host.
>>
>> Signed-off-by: Nicholas Piggin
>> ---
>
> Same
The new ISA v3.0 slbia variants have not been implemented for TCG,
which can lead to crashing when a POWER9 machine boots Linux using
the hash MMU, for example ("disable_radix" kernel command line).
Add them.
Signed-off-by: Nicholas Piggin
---
Changes in v2:
- Rewrite changelog.
- Re
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