Hi All,
A lot of devices have little internal fifos that are often implemented
as circular buffers in the device state. Any reason to not factor that
out into a helper module? Was thinkin just a struct defintion
containing the key elements (the uint8_t *data buffer, head/tail
pointers, capacity).
On Mon, Aug 6, 2012 at 7:29 PM, Peter Maydell peter.mayd...@linaro.org wrote:
On 6 August 2012 03:16, Peter A. G. Crosthwaite
peter.crosthwa...@petalogix.com wrote:
Slave creation function that can be used to create an SSI slave without
qdev_init() being called. This give machine models a
On Mon, Aug 6, 2012 at 7:38 PM, Peter Maydell peter.mayd...@linaro.org wrote:
On 6 August 2012 03:16, Peter A. G. Crosthwaite
peter.crosthwa...@petalogix.com wrote:
Allow multiple qdev_init_gpio_in() calls for the one device. The first call
will
define GPIOs 0-N-1, the next GPIOs N- ... .
On Mon, Aug 6, 2012 at 7:25 PM, Peter Maydell peter.mayd...@linaro.org wrote:
On 6 August 2012 03:16, Peter A. G. Crosthwaite
peter.crosthwa...@petalogix.com wrote:
Added default CS behaviour for SSI slaves. SSI devices can set a property
to enable CS behaviour which will create a GPIO on the
On Mon, Aug 6, 2012 at 7:50 PM, Peter Maydell peter.mayd...@linaro.org wrote:
On 6 August 2012 03:16, Peter A. G. Crosthwaite
peter.crosthwa...@petalogix.com wrote:
Added SPI controller to the reference design, with two n25q128 spi-flashes
connected.
Signed-off-by: Peter A. G. Crosthwaite
On Mon, 2012-08-06 at 17:42 +0100, Peter Maydell wrote:
Fix a variety of typos in comments in target-arm files.
Signed-off-by: Peter Maydell peter.mayd...@linaro.org
Reviewed-by: Peter Crosthwaite peter.crosthwa...@petalogix.com
---
Changes v1-v2: s/inputs values/input values/
target
On Mon, Aug 6, 2012 at 7:48 PM, Peter Maydell peter.mayd...@linaro.org wrote:
On 6 August 2012 03:16, Peter A. G. Crosthwaite
peter.crosthwa...@petalogix.com wrote:
Added a FIFO API that can be used to create and operate byte FIFOs.
I'm not asking for actual conversions, but it would be nice
+
+extern const VMStateDescription vmstate_fifo8;
+
+#define VMSTATE_FIFO8(_field, _state) { \
+.name = (stringify(_field)), \
+.size = sizeof(Fifo8), \
+.vmsd =
+sdhci_update_irq(s);
+break;
+}
+}
+}
So I think the guest can make this loop never terminate if it sets up
a loop of ACT_LINK descriptors, right? I don't know how we should
handle this but I'm pretty sure make qemu sit there forever not
responding
On Tue, Aug 7, 2012 at 4:28 PM, Igor Mitsyanko i.mitsya...@samsung.com wrote:
On 08/07/2012 10:10 AM, Peter Crosthwaite wrote:
+
+extern const VMStateDescription vmstate_fifo8;
+
+#define VMSTATE_FIFO8(_field, _state) { \
+.name = (stringify(_field
Hi All,
We seem to be having difficulty getting a review/merge on this patch. I
have sent two series, two pings and a PULL, with only a single reply
from P. Maydell asking for other reviewers to weigh in:
- on July 17 P. Maydell wrote ---
I guess I should mention that I'm
On Wed, Aug 8, 2012 at 5:22 PM, Markus Armbruster arm...@redhat.com wrote:
Peter Maydell peter.mayd...@linaro.org writes:
On 7 August 2012 20:26, Markus Armbruster arm...@redhat.com wrote:
qemu-system-arm lm3s811evb
qemu-system-arm lm3s6965evb
qemu-system-arm:
Resend of pull,
Edgars review addressed.
On Fri, Aug 10, 2012 at 12:30 PM, Peter A. G. Crosthwaite
peter.crosthwa...@petalogix.com wrote:
are available in the git repository at:
git://developer.petalogix.com/public/qemu.git ..BRANCH.NOT.VERIFIED..
Anthony Liguori (1):
qom:
Apoligies,
bad remote, please disregard.
On Fri, Aug 10, 2012 at 12:32 PM, Peter Crosthwaite
peter.crosthwa...@petalogix.com wrote:
Resend of pull,
Edgars review addressed.
On Fri, Aug 10, 2012 at 12:30 PM, Peter A. G. Crosthwaite
peter.crosthwa...@petalogix.com wrote:
are available
On Mon, 2012-08-06 at 10:13 +0100, Peter Maydell wrote:
On 6 August 2012 03:16, Peter A. G. Crosthwaite
peter.crosthwa...@petalogix.com wrote:
Added VMSD stub for SSI slaves. Fields may be added to this VMSD for generic
SSI slave state (e.g. the CS line state).
This is more me being
On Fri, Aug 10, 2012 at 7:15 PM, Andreas Färber afaer...@suse.de wrote:
Am 10.08.2012 05:16, schrieb Peter A. G. Crosthwaite:
From: Anthony Liguori aligu...@us.ibm.com
The current implementation of Interfaces is poorly designed. Each interface
that an object implements ends up being an
Ping!
Any further thoughts here?
There seem to be a few minor correction for PPM, but the sore-thumb
issue is the long/infinite ADMA. Is there an (easy) AIO based solution
to be had or do we need to do some sort of ptimer hack?
Regards,
Peter
On Tue, Aug 7, 2012 at 4:31 PM, Peter Crosthwaite
On Fri, Aug 10, 2012 at 11:42 PM, Stefan Hajnoczi stefa...@gmail.com wrote:
On Fri, Aug 10, 2012 at 01:54:26PM +1000, Peter A. G. Crosthwaite wrote:
The sizep arg is populated with the size of the loaded device tree. Since
this
is one of those informational please populate type arguments it
On Mon, Aug 6, 2012 at 7:41 PM, Peter Maydell peter.mayd...@linaro.org wrote:
On 6 August 2012 03:16, Peter A. G. Crosthwaite
peter.crosthwa...@petalogix.com wrote:
To be more consistent with the newer ways of error signalling. That and
SIGABT
is easier to debug with than exit(1).
who decides to use
corourites (whether that be in tree or out of tree) the potentially
several hours of debugging around why did my coroutine get yielded
randomly. That and of course minimisation of my own mainline diff.
Regards,
Peter
On Fri, Jun 22, 2012 at 8:59 PM, Peter Crosthwaite
Ping!
Whats the action item here? Put out an RFC about unifying bootloaders
or some such?
Regards,
Peter
On Mon, Jun 25, 2012 at 7:19 PM, Peter Crosthwaite
peter.crosthwa...@petalogix.com wrote:
On Mon, Jun 25, 2012 at 7:03 PM, Peter Maydell peter.mayd...@linaro.org
wrote:
On 25 June 2012
On Wed, Jun 27, 2012 at 6:33 PM, Markus Armbruster arm...@redhat.com wrote:
Stefan Hajnoczi stefa...@gmail.com writes:
On Wed, Jun 27, 2012 at 8:59 AM, Peter Maydell peter.mayd...@linaro.org
wrote:
On 27 June 2012 08:48, Stefan Hajnoczi stefa...@gmail.com wrote:
I'd like to see your code
Hi Jia,
On Wed, Jun 27, 2012 at 7:54 PM, Jia Liu pro...@gmail.com wrote:
Add a IIS dummy board.
Signed-off-by: Jia Liu pro...@gmail.com
---
hw/openrisc/Makefile.objs | 2 +-
hw/openrisc_sim.c | 149
+
2 files changed, 150
On Wed, Jun 27, 2012 at 11:04 PM, Andreas Färber afaer...@suse.de wrote:
Am 27.06.2012 14:25, schrieb Peter Crosthwaite:
Hi Jia,
On Wed, Jun 27, 2012 at 7:54 PM, Jia Liu pro...@gmail.com wrote:
+static void openrisc_sim_init(ram_addr_t ram_size,
+ const char
On Wed, Jun 27, 2012 at 11:13 PM, Li Zhang zhlci...@gmail.com wrote:
On Wed, Jun 27, 2012 at 8:00 PM, Andreas Färber afaer...@suse.de wrote:
Am 18.06.2012 11:22, schrieb Li Zhang:
For pseries machine, it needs to enable usb to add
keyboard or usb mouse. -usb option won't be used in
Grammar:
On Thu, Jun 28, 2012 at 9:06 AM, Alexander Graf ag...@suse.de wrote:
On 16.06.2012, at 03:11, Edgar E. Iglesias wrote:
On Fri, Jun 15, 2012 at 01:30:17PM +0200, Andreas Färber wrote:
Am 13.06.2012 06:46, schrieb Peter A. G. Crosthwaite:
Changed device name to xlnx,axi-dma. This is the exact
not at a valid yield point. But whats really wrong here is the block
layer will be making assumption on re-entry of the coroutine, so I
cant re-enter it witout wildly changing the behaviour of the block
layer. If you adopt this mark it as coroutine poilcy, you end up
with a system where half
On Thu, Jun 28, 2012 at 11:05 PM, Andreas Färber afaer...@suse.de wrote:
Am 28.06.2012 03:08, schrieb Peter Crosthwaite:
On Thu, Jun 28, 2012 at 9:06 AM, Alexander Graf ag...@suse.de wrote:
[...]
[...] Why did commas in names work before, but now don't? Or put
differently: Was this change
Hi Stefan.
On Thu, Jun 28, 2012 at 11:03 PM, Stefan Hajnoczi stefa...@gmail.com wrote:
On Thu, Jun 28, 2012 at 4:17 AM, Peter Crosthwaite
peter.crosthwa...@petalogix.com wrote:
not at a valid yield point. But whats really wrong here is the block
layer will be making assumption on re-entry
(openrisc_sim_machine_init);
Please review and let me the new is OK or not, please.
Thank you, very much, all of you.
On Wed, Jun 27, 2012 at 9:10 PM, Peter Crosthwaite
peter.crosthwa...@petalogix.com wrote:
On Wed, Jun 27, 2012 at 11:04 PM, Andreas Färber afaer...@suse.de wrote:
Am 27.06.2012 14:25, schrieb
Hi Edgar,
I think for little ones like this, ill start a microblaze-devs patch
queue and periodically send pull requests. Ill send the patches singly
to qemu-devel for ACK and NACK as I create them, then [PULL] every
couple of weeks to consolidate our testing/rebasing efforts. Sound
like a plan?
Looks good to me,
Peter
On Fri, Jun 29, 2012 at 3:56 PM, Jia Liu pro...@gmail.com wrote:
Hi Peter,
On Fri, Jun 29, 2012 at 11:15 AM, Peter Crosthwaite
peter.crosthwa...@petalogix.com wrote:
On Thu, Jun 28, 2012 at 11:56 PM, Jia Liu pro...@gmail.com wrote:
Hi, Peter, Andreas, and Peter
On Jun 29, 2012 6:24 PM, Kevin Wolf kw...@redhat.com wrote:
Am 29.06.2012 02:50, schrieb Peter Crosthwaite:
The problem I see is:
FDTMachineInfo *fdt_generic_create_machine()
{
...
while (qemu_co_queue_enter_next(fdti-cq));
}
The problem you have is not that the block
Can anoyne explain to me the consequences of my patch btw? I am
struggling to see how co-routines actually call into the block layer
API (without already being there) such that these fast paths are even
activated?
No, the assumption is a completely different one and it has nothing to
do with
Hi Igor,
Are you able to make these changes you have negotiated with PMM? If
you send me an interdiff that fine, or an incremental patch thats fine
- I can remake the series with your changes rolled in.
Regards,
Peter
On Sat, Jun 30, 2012 at 1:22 AM, Igor Mitsyanko i.mitsya...@samsung.com
On Mon, Jul 2, 2012 at 6:50 PM, Stefan Hajnoczi stefa...@gmail.com wrote:
On Fri, Jun 29, 2012 at 12:51 PM, Peter Crosthwaite
peter.crosthwa...@petalogix.com wrote:
BTW Yielding is one thing, but the elephant in the room here is
resumption of the coroutine. When AIO yields my coroutine I i
On Mon, Jul 2, 2012 at 7:04 PM, Kevin Wolf kw...@redhat.com wrote:
Am 02.07.2012 10:57, schrieb Peter Crosthwaite:
On Mon, Jul 2, 2012 at 6:50 PM, Stefan Hajnoczi stefa...@gmail.com wrote:
On Fri, Jun 29, 2012 at 12:51 PM, Peter Crosthwaite
peter.crosthwa...@petalogix.com wrote:
BTW Yielding
On Mon, Jul 2, 2012 at 8:01 PM, Kevin Wolf kw...@redhat.com wrote:
Am 02.07.2012 11:42, schrieb Peter Crosthwaite:
On Mon, Jul 2, 2012 at 7:04 PM, Kevin Wolf kw...@redhat.com wrote:
Am 02.07.2012 10:57, schrieb Peter Crosthwaite:
No conditional on the qemu_coroutine_create. So it will always
On Mon, Jul 2, 2012 at 8:52 PM, Kevin Wolf kw...@redhat.com wrote:
Am 02.07.2012 12:18, schrieb Peter Crosthwaite:
On Mon, Jul 2, 2012 at 8:01 PM, Kevin Wolf kw...@redhat.com wrote:
Am 02.07.2012 11:42, schrieb Peter Crosthwaite:
On Mon, Jul 2, 2012 at 7:04 PM, Kevin Wolf kw...@redhat.com
On Mon, Jul 2, 2012 at 8:59 PM, Peter Maydell peter.mayd...@linaro.org wrote:
On 2 July 2012 11:44, Kevin Wolf kw...@redhat.com wrote:
Am 02.07.2012 12:18, schrieb Peter Maydell:
Why complicate things by adding code for if this is the first
access then read in the file?
Because then it
On Mon, Jul 2, 2012 at 8:44 PM, Kevin Wolf kw...@redhat.com wrote:
Am 02.07.2012 12:18, schrieb Peter Maydell:
On 2 July 2012 11:01, Kevin Wolf kw...@redhat.com wrote:
Reading from block devices during device initialisation breaks
migration, so I'd like to see it go away wherever possible.
On Mon, Jul 2, 2012 at 9:19 PM, Kevin Wolf kw...@redhat.com wrote:
Am 02.07.2012 13:12, schrieb Peter Crosthwaite:
On Mon, Jul 2, 2012 at 8:44 PM, Kevin Wolf kw...@redhat.com wrote:
Am 02.07.2012 12:18, schrieb Peter Maydell:
On 2 July 2012 11:01, Kevin Wolf kw...@redhat.com wrote:
Reading
Hi All,
This RFC comes from the recent discussion Re coroutines and the block
layer - the current topic of disucussion there has shifted to
bdrv_read() from device init, so rather than continuing the
discussion as a tangent to the unrelated original topic I'm recreating
the thread.
So anyways,
On Tue, Jul 3, 2012 at 11:15 PM, Kevin Wolf kw...@redhat.com wrote:
Am 27.06.2012 00:26, schrieb MORITA Kazutaka:
This removes blocking network I/Os in coroutine context.
Signed-off-by: MORITA Kazutaka morita.kazut...@lab.ntt.co.jp
---
block/sheepdog.c | 10 --
1 files changed, 8
Ping!
On Thu, Jun 28, 2012 at 8:41 PM, Peter A. G. Crosthwaite
peter.crosthwa...@petalogix.com wrote:
Next revision of the series for AXI-stream, rebased on anthonys refactoring
of the Interface system. Anthonys patch is already on the mailing list, but I
have included it form completeness.
On Fri, 2012-06-29 at 11:59 +0100, Peter Maydell wrote:
On 26 June 2012 06:13, Peter A. G. Crosthwaite
peter.crosthwa...@petalogix.com wrote:
target-ppc: Fix 2nd parameter for tcg_gen_shri_tl (2012-06-24 22:52:11
+0200)
are available in the git repository at:
On Tue, Jul 3, 2012 at 9:30 PM, Igor Mitsyanko i.mitsya...@samsung.com wrote:
Hi Peter, here's a few review comments for your patch
On 06/18/2012 04:42 AM, Peter A. G. Crosthwaite wrote:
Device model for Primecell PL330 dma controller.
Signed-off-by: Peter A. G. Crosthwaite
ACK - Igor, my test vector has no interrupts, Are you able to zip up
and send my your exynos test vectorif its touching interrupt
behaviour?
We only tested DMAC by connecting audio codec model to its peripheral
request inputs, this model
doesn't use DMAC interrupts either.
Ok, Ill get
On Fri, Jul 6, 2012 at 3:00 AM, Peter Maydell peter.mayd...@linaro.org wrote:
Add support for reading device tree properties (both generic
and single-cell ones) to QEMU's convenience wrapper layer.
Signed-off-by: Peter Maydell peter.mayd...@linaro.org
---
device_tree.c | 30
On Fri, Jul 6, 2012 at 3:00 AM, Peter Maydell peter.mayd...@linaro.org wrote:
Make the RAM size in arm_boot_info a target_phys_addr_t so
it can express RAM sizes up to the limit imposed by the
physical address size.
Signed-off-by: Peter Maydell peter.mayd...@linaro.org
Reviewed-by: Peter A.
On Fri, Jul 6, 2012 at 3:00 AM, Peter Maydell peter.mayd...@linaro.org wrote:
Clean up the mix of getting the RAM size from the global ram_size
and from the ram_size field in the arm_boot_info structure, so
that we always use the structure field.
Signed-off-by: Peter Maydell
On Fri, Jul 6, 2012 at 3:00 AM, Peter Maydell peter.mayd...@linaro.org wrote:
The legacy ATAGS format for passing information to the kernel only
allows RAM sizes which fit in 32 bits; enforce this restriction
rather than silently doing something weird.
Signed-off-by: Peter Maydell
On Fri, Jul 6, 2012 at 3:00 AM, Peter Maydell peter.mayd...@linaro.org wrote:
Support the case where the device tree blob specifies that
#address-cells and #size-cells are greater than 1. (This
is needed for device trees which can handle 64 bit physical
addresses and thus total RAM sizes over
Ping^2
On Wed, Jul 4, 2012 at 10:28 AM, Peter Crosthwaite
peter.crosthwa...@petalogix.com wrote:
Ping!
On Thu, Jun 28, 2012 at 8:41 PM, Peter A. G. Crosthwaite
peter.crosthwa...@petalogix.com wrote:
Next revision of the series for AXI-stream, rebased on anthonys refactoring
On Sat, Jul 7, 2012 at 1:34 AM, Peter Maydell peter.mayd...@linaro.org wrote:
On 6 July 2012 02:56, Peter Crosthwaite peter.crosthwa...@petalogix.com
wrote:
Can we generalise and get functionality for reading cells with offsets
as well? Your function assumes (and asserts) that the property
On Tue, Jul 10, 2012 at 11:32 PM, Peter Maydell
peter.mayd...@linaro.org wrote:
Add support for reading device tree properties (both generic
and single-cell ones) to QEMU's convenience wrapper layer.
Signed-off-by: Peter Maydell peter.mayd...@linaro.org
---
Here's a v2:
* added
On Thu, Jul 12, 2012 at 11:42 PM, Markus Armbruster arm...@redhat.com wrote:
Kevin Wolf kw...@redhat.com writes:
Am 02.07.2012 11:42, schrieb Peter Crosthwaite:
On Mon, Jul 2, 2012 at 7:04 PM, Kevin Wolf kw...@redhat.com wrote:
Am 02.07.2012 10:57, schrieb Peter Crosthwaite:
No conditional
On Fri, Jul 6, 2012 at 3:00 AM, Peter Maydell peter.mayd...@linaro.org wrote:
Add support for reading device tree properties (both generic
and single-cell ones) to QEMU's convenience wrapper layer.
Signed-off-by: Peter Maydell peter.mayd...@linaro.org
Reviewed-by: Peter A. G. Crosthwaite
On Fri, Jul 13, 2012 at 6:33 PM, Markus Armbruster arm...@redhat.com wrote:
Peter Crosthwaite peter.crosthwa...@petalogix.com writes:
Hi All,
This RFC comes from the recent discussion Re coroutines and the block
layer - the current topic of disucussion there has shifted to
bdrv_read() from
Will merge Igors corrections into v6
Regards,
Peter
On Wed, Jul 18, 2012 at 1:04 AM, Peter Maydell peter.mayd...@linaro.org wrote:
On 17 July 2012 15:58, Igor Mitsyanko i.mitsya...@samsung.com wrote:
On 07/17/2012 05:37 PM, Peter Maydell wrote:
I would suggest two functions:
int
On Mon, Jul 16, 2012 at 11:24 PM, Peter Maydell
peter.mayd...@linaro.org wrote:
Make the RAM size in arm_boot_info a uint64_t so it can express
the larger RAM sizes that may be seen in LPAE systems.
Signed-off-by: Peter Maydell peter.mayd...@linaro.org
Reviewed-by: Peter A. G. Crosthwaite
On Mon, Jul 16, 2012 at 11:24 PM, Peter Maydell
peter.mayd...@linaro.org wrote:
The legacy ATAGS format for passing information to the kernel only
allows RAM sizes which fit in 32 bits; enforce this restriction
rather than silently doing something weird.
Signed-off-by: Peter Maydell
On Mon, Jul 16, 2012 at 11:24 PM, Peter Maydell
peter.mayd...@linaro.org wrote:
Add support for reading device tree properties (both generic
and single-cell ones) to QEMU's convenience wrapper layer.
Signed-off-by: Peter Maydell peter.mayd...@linaro.org
Reviewed-by: Peter A. G. Crosthwaite
On Thu, Jul 19, 2012 at 5:03 AM, 402ja...@gmail.com wrote:
From: Jagan 402ja...@gmail.com
This patch adds support for NOR1 flash (Bank #2) on
vexpress-a9 platform. It is 64MB CFI01 compliant flash.
Tested on stable u-boot version through Linux.
Signed-off-by: Jagan 402ja...@gmail.com
---
flashes to the same bdrv
which means they share storage. The two flashes will corrupt each
others data.
Regards,
Peter
I think function can be useful
single drive devices SD/MTD.
Please suggest your comments.
Regards,
Jagan.
On Thu, Jul 19, 2012 at 5:27 AM, Peter Crosthwaite
peter.crosthwa
to them.
As Peter already said, you need to use drive_get_next(IF_PFLASH) for both
flash banks initialization, or use drive_get(IF_PFLASH, 0, 0) for first and
drive_get(IF_PFLASH, 0, 1) for second bank.
Regards,
Jagan.
On Fri, Jul 20, 2012 at 6:58 AM, Peter Crosthwaite
peter.crosthwa
Public bug reported:
The Stellaris lm3s6965evb Machine model is broken:
qemu-system-arm -M lm3s6965evb -kernel qs_ek-lm3s6965.bin
GNU gdb (GDB) 7.1-ubuntu
Copyright (C) 2010 Free Software Foundation, Inc.
License GPLv3+: GNU GPL version 3 or later http://gnu.org/licenses/gpl.html
This is free
cc relevant maintainers (PMM and PB).
On Tue, Jul 24, 2012 at 3:58 PM, Peter Crosthwaite
peter.crosthwa...@petalogix.com wrote:
Public bug reported:
The Stellaris lm3s6965evb Machine model is broken:
qemu-system-arm -M lm3s6965evb -kernel qs_ek-lm3s6965.bin
GNU gdb (GDB) 7.1-ubuntu
** Attachment added: Test vector to replicate bug
https://bugs.launchpad.net/qemu/+bug/1028260/+attachment/3233691/+files/stellaris-test.tar
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1028260
Hi All,
So on the topic of these command line arguments for initrd, dtb and
friends, another related issue we have encountered (and have hacked around
in our tree) is not being able to relocate the initrd or kernel. Currently
these memory locations are hardcoded in arm_boot.c:
#define
Hi Grant,
The patch series for dts driven machine creation we (myself and Edgar) use
that you are referring to was rejected a few months ago on the grounds that
it conflicted with QOM:
http://lists.gnu.org/archive/html/qemu-devel/2011-08/msg02953.html
I am maintaining it our of tree, although I
On Mon, Jan 30, 2012 at 6:42 AM, Edgar E. Iglesias edgar.igles...@gmail.com
wrote:
On Sat, Jan 28, 2012 at 11:48:37AM -0700, Grant Likely wrote:
On Fri, Jan 27, 2012 at 10:34:01PM +, Paul Brook wrote:
If compiled with CONFIG_FDT, allow user to specify a device tree
file using
the
2012/2/7 Paul Brook p...@codesourcery.com
Implemented cadence Triple Timer Counter (TCC)
It looks like you're implementing a periodic timer as sequence of chained
oneshot timers. This is a bad idea. In qemu interrupt latency may be
high,
so you're likely to suffer from significant time
Hi Peter,
Anthony suggested to us the Idea of setting up bootloaders as devices in
order to solve this command line argument problem. I have posted a patch to
the mailing list ([RFC PATCH] arm boot: added QOM device definition) which
is my first attempt at this for arm_boot, i.e. arm_boot.c is
2012/2/7 Paul Brook p...@codesourcery.com
This is an RFC for a suite of Device models and a machine model for the
Xilinx Zynq-7000 Extensible Processing Platform:
http://www.xilinx.com/products/silicon-devices/epp/zynq-7000/index.htm
I don't see any documentation on that page. Are
2012/2/8 Paul Brook p...@codesourcery.com
diff --git a/hw/versatilepb.c b/hw/versatilepb.c
index 6e28e78..e42d845 100644
--- a/hw/versatilepb.c
+++ b/hw/versatilepb.c
@@ -313,12 +313,14 @@ static void versatile_init(ram_addr_t ram_size,
/* 0x101f3000 UART2. */
/*
2012/2/8 Paul Brook p...@codesourcery.com
Implemented cadence Triple Timer Counter (TCC)
It looks like you're implementing a periodic timer as sequence of
chained
oneshot timers. This is a bad idea. In qemu interrupt latency may be
high,
so you're likely to suffer from
2012/2/8 Paul Brook p...@codesourcery.com
+ arm_load_kernel(env, versatile_binfo);
+ }
}
This should be using the new object you just added.
Yes I agree. There is another question tho that if this approach is to be
considered, should this call to
2012/2/8 Paul Brook p...@codesourcery.com
I suspect we want to replace the arm_load_kernel call with an
arm_linux_loader device with appropriate properties.
Ok, so does this mean the machine model would still explicitly
instantiate
the bootloader device?
Yes. Bootloaders
2012/2/8 Paul Brook p...@codesourcery.com
- When are interrupts raised. You mention a user specified match
value.
Do we also get an interrupt on wraparound?
Yes, an interrupts occur on wrap around of the 16 bit timer value. There
are three match registers which correspond to three
On Wed, Feb 8, 2012 at 10:41 PM, Alexander Graf ag...@suse.de wrote:
On 08.02.2012, at 13:27, Paul Brook wrote:
2012/2/8 Paul Brook p...@codesourcery.com
I suspect we want to replace the arm_load_kernel call with an
arm_linux_loader device with appropriate properties.
Ok, so does
On Wed, Feb 8, 2012 at 11:10 PM, Alexander Graf ag...@suse.de wrote:
On 08.02.2012, at 14:04, Peter Crosthwaite wrote:
On Wed, Feb 8, 2012 at 10:41 PM, Alexander Graf ag...@suse.de wrote:
On 08.02.2012, at 13:27, Paul Brook wrote:
2012/2/8 Paul Brook p...@codesourcery.com
I
On Wed, Feb 8, 2012 at 11:35 PM, Alexander Graf ag...@suse.de wrote:
On 08.02.2012, at 14:30, Peter Crosthwaite wrote:
On Wed, Feb 8, 2012 at 11:10 PM, Alexander Graf ag...@suse.de wrote:
On 08.02.2012, at 14:04, Peter Crosthwaite wrote:
On Wed, Feb 8, 2012 at 10:41 PM, Alexander
2012/2/9 Paul Brook p...@codesourcery.com
So if we consider this bootloader a device and its -dtb argument a
property
of that device, then what you are implying is that every device property
of
every device in a machine must be managed by the machine model? Isn't the
dynamic machine
So here are some of the problems im trying to solve with the bootloader:
Smp bootstrap secondary CPUs while loading an elf (currently elfs will be
assumed to be not kernels).
Change the kernel, initrd and dtb load address on the command line.
Use my own SMP secondary bootloop.
My intention with
2012/2/9 Paul Brook p...@codesourcery.com
So here are some of the problems im trying to solve with the bootloader:
Smp bootstrap secondary CPUs while loading an elf (currently elfs will be
assumed to be not kernels).
Change the kernel, initrd and dtb load address on the command line.
Alrighty,
So it seems like the bootloader as a device idea has some support, just
need to work out a few implementaiton details. It seems the consensus is
that machine models will instantiate the device. The latest idea is the
machine model will pass some of core props to the bootloader while
On Thu, Feb 9, 2012 at 11:22 PM, Andreas Färber afaer...@suse.de wrote:
Am 08.02.2012 08:55, schrieb Peter A. G. Crosthwaite:
From: Peter A. G. Crosthwaite peter.crosthwa...@petalogix.com
Create a QOM device for bootstrapping linux on arm. Wraps the existing
arm_boot code and calls
2012/2/12 Paul Brook p...@codesourcery.com
+static void cadence_timer_sync(CadenceTimerState *s)
+{
...
+r = (int64_t)cadence_timer_get_steps(s, s-cpu_time - old_time);
+x = (int64_t)s-reg_value + ((s-reg_count COUNTER_CTRL_DEC) ? -r
:
r); +
+for (i = 0; i 3; ++i) {
Forgot to update branch-name, should read:
Tree is available from:
git://developer.petalogix.com/private/peterc/qemu.git
branch: zynq-initial.6
On Mon, Feb 20, 2012 at 11:45 AM, Peter A. G. Crosthwaite
peter.crosthwa...@petalogix.com wrote:
This is a suite of Device models and a machine
Pull Request for Zynq-7000 platform model initial support.
The following changes since commit 99c7f87826337fa81f2f0f9baa9ca0a44faf90e9:
input: send kbd+mouse events only to running guests. (2012-02-17
11:02:55 -0600)
are available in the git repository at:
On Tue, Feb 21, 2012 at 5:56 AM, Peter Maydell peter.mayd...@linaro.org wrote:
On 20 February 2012 19:51, Andreas Färber afaer...@suse.de wrote:
Am 20.02.2012 20:43, schrieb Peter Maydell:
I don't particularly care how we QOMify arm_boot (it's not exactly at
the top of my priority list
On Tue, Feb 21, 2012 at 5:47 AM, Peter Maydell peter.mayd...@linaro.org wrote:
Ping re patch 3 and 4 here -- I know there was some discussion under the
thread on Peter Crosthwaite's 'qomify arm_boot' patch series, but it's a
bit hard to disentangle from the comments on that patch series.
Sorry should be RFC
On Thu, Mar 29, 2012 at 12:54 PM, Peter A. G. Crosthwaite
peter.crosthwa...@petalogix.com wrote:
Hi,
These patches add support for the Primcell PL330 DMA controller and add it to
the Xilinx Zynq machine model. Patch 1 is the device model. Patch 2 is the
machine model
On Fri, Mar 30, 2012 at 12:29 AM, Kirill Batuzov batuz...@ispras.ru wrote:
On Thu, 29 Mar 2012, Peter A. G. Crosthwaite wrote:
Device model for Primecell PL330 dma controller.
Signed-off-by: Peter A. G. Crosthwaite peter.crosthwa...@petalogix.com
---
Signed-off-by: Kirill Batuzov
Hi Everyone,
We currently have a somewhat hacky PL353 device model in our tree that
we wish to refactor and ultimately push to mainline. Before I go about
reworking it, I wish to discuss the architecture of this device model
because its non-trivial. The pl353 is sysbus slave that is a combined
Hi Peter,
One major flaw in that interface (which is similar to another that we
originally used) is it doesnt have an API for wiggling the CS lines.
Some spi devices (e.g. the m25p80 in this series) have side effects
from cs strobing whether or not a txrx occurs during cs assertion,
which is not
On Mon, Apr 2, 2012 at 5:20 PM, Peter Maydell peter.mayd...@linaro.org wrote:
On 2 April 2012 07:24, Peter A. G. Crosthwaite
peter.crosthwa...@petalogix.com wrote:
device more for standard SD host controller interface (SDHCI).
Signed-off-by: Peter A. G. Crosthwaite
On Mon, Apr 2, 2012 at 6:38 PM, Igor Mitsyanko i.mitsya...@samsung.com wrote:
On 04/02/2012 12:00 PM, Andreas Färber wrote:
Am 02.04.2012 09:20, schrieb Peter Maydell:
On 2 April 2012 07:24, Peter A. G. Crosthwaite
peter.crosthwa...@petalogix.com wrote:
device more for standard SD host
Yes, I've been trying to get my sdhc accepted since last year :) I tried to
comply with specification entirely, your implementation is obviously much
smaller but enough for use with Linux driver (i've tested it with exynos
board emulation).
Does it work, can you add exynos support for SDHCI
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