Re: [PATCH] mv64361: Remove extra break from a switch case

2021-07-12 Thread David Gibson 
On Mon, Jul 12, 2021 at 03:11:01PM +0200, BALATON Zoltan wrote:
> The switch case of writing PCI 1 IO base address had an extra break
> statement that made part of the code unreachable. This did not cause a
> problem as guests ususally leave this register at its default value.
> 
> Reported-by: Coverity (CID 1458135)
> Signed-off-by: BALATON Zoltan 

Applied to ppc-for-6.1, thanks.

> ---
>  hw/pci-host/mv64361.c | 1 -
>  1 file changed, 1 deletion(-)
> 
> diff --git a/hw/pci-host/mv64361.c b/hw/pci-host/mv64361.c
> index 20510d8680..92b0f5d047 100644
> --- a/hw/pci-host/mv64361.c
> +++ b/hw/pci-host/mv64361.c
> @@ -687,7 +687,6 @@ static void mv64361_write(void *opaque, hwaddr addr, 
> uint64_t val,
>  case MV64340_PCI_1_IO_BASE_ADDR:
>  s->pci[1].io_base = val & 0x30fULL;
>  warn_swap_bit(val);
> -break;
>  if (!(s->cpu_conf & BIT(27))) {
>  s->pci[1].remap[4] = (val & 0xULL) << 16;
>  }

-- 
David Gibson| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au  | minimalist, thank you.  NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson


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Re: [PATCH] mv64361: Remove extra break from a switch case

2021-07-12 Thread BALATON Zoltan 

On Mon, 12 Jul 2021, Philippe Mathieu-Daudé wrote:

On 7/12/21 3:11 PM, BALATON Zoltan wrote:

The switch case of writing PCI 1 IO base address had an extra break
statement that made part of the code unreachable. This did not cause a
problem as guests ususally leave this register at its default value.

Reported-by: Coverity (CID 1458135)


Fixes: dcdf98a9015 ("Add emulation of Marvell MV64361 PPC system
controller")
?


Yeah, why not. Feel free to add the Fixes tag when merging, although 
that's the only commit this file had so far so linking to it does not seem 
to add much more info.


Regards,
BALATON Zoltan


Signed-off-by: BALATON Zoltan 
---
 hw/pci-host/mv64361.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/hw/pci-host/mv64361.c b/hw/pci-host/mv64361.c
index 20510d8680..92b0f5d047 100644
--- a/hw/pci-host/mv64361.c
+++ b/hw/pci-host/mv64361.c
@@ -687,7 +687,6 @@ static void mv64361_write(void *opaque, hwaddr addr, 
uint64_t val,
 case MV64340_PCI_1_IO_BASE_ADDR:
 s->pci[1].io_base = val & 0x30fULL;
 warn_swap_bit(val);
-break;
 if (!(s->cpu_conf & BIT(27))) {
 s->pci[1].remap[4] = (val & 0xULL) << 16;
 }

Re: [PATCH] mv64361: Remove extra break from a switch case

2021-07-12 Thread Philippe Mathieu-Daudé 
On 7/12/21 3:11 PM, BALATON Zoltan wrote:
> The switch case of writing PCI 1 IO base address had an extra break
> statement that made part of the code unreachable. This did not cause a
> problem as guests ususally leave this register at its default value.
> 
> Reported-by: Coverity (CID 1458135)

Fixes: dcdf98a9015 ("Add emulation of Marvell MV64361 PPC system
controller")
?

> Signed-off-by: BALATON Zoltan 
> ---
>  hw/pci-host/mv64361.c | 1 -
>  1 file changed, 1 deletion(-)
> 
> diff --git a/hw/pci-host/mv64361.c b/hw/pci-host/mv64361.c
> index 20510d8680..92b0f5d047 100644
> --- a/hw/pci-host/mv64361.c
> +++ b/hw/pci-host/mv64361.c
> @@ -687,7 +687,6 @@ static void mv64361_write(void *opaque, hwaddr addr, 
> uint64_t val,
>  case MV64340_PCI_1_IO_BASE_ADDR:
>  s->pci[1].io_base = val & 0x30fULL;
>  warn_swap_bit(val);
> -break;
>  if (!(s->cpu_conf & BIT(27))) {
>  s->pci[1].remap[4] = (val & 0xULL) << 16;
>  }
>

[PATCH] mv64361: Remove extra break from a switch case

2021-07-12 Thread BALATON Zoltan 
The switch case of writing PCI 1 IO base address had an extra break
statement that made part of the code unreachable. This did not cause a
problem as guests ususally leave this register at its default value.

Reported-by: Coverity (CID 1458135)
Signed-off-by: BALATON Zoltan 
---
 hw/pci-host/mv64361.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/hw/pci-host/mv64361.c b/hw/pci-host/mv64361.c
index 20510d8680..92b0f5d047 100644
--- a/hw/pci-host/mv64361.c
+++ b/hw/pci-host/mv64361.c
@@ -687,7 +687,6 @@ static void mv64361_write(void *opaque, hwaddr addr, 
uint64_t val,
 case MV64340_PCI_1_IO_BASE_ADDR:
 s->pci[1].io_base = val & 0x30fULL;
 warn_swap_bit(val);
-break;
 if (!(s->cpu_conf & BIT(27))) {
 s->pci[1].remap[4] = (val & 0xULL) << 16;
 }
-- 
2.21.4