Hi Philippe,
On 5/29/21 7:50 PM, Philippe Mathieu-Daudé wrote:
On 5/29/21 3:52 PM, Philippe Mathieu-Daudé wrote:
On Mon, Aug 20, 2018 at 8:17 PM Aleksandar Markovic
wrote:
From: Stefan Markovic
+case OPC_BPOSGE32:
+tcg_gen_andi_tl(t0, cpu_dspctrl, 0x3F);
+bcond_compute
On 5/29/21 7:22 PM, Philippe Mathieu-Daudé wrote:
On Mon, Aug 20, 2018 at 8:17 PM Aleksandar Markovic
wrote:
From: Stefan Markovic
Add emulation of nanoMIPS 16-bit branch instructions.
...
+/* Compare two registers */
+case OPC_BPOSGE32:
+
Hi Philippe,
On 5/29/21 3:52 PM, Philippe Mathieu-Daudé wrote:
> I think this opcode never worked correctly.
>
> Per the "MIPS® Architecture Extension: nanoMIPS32 DSP Technical
> Reference Manual — Revision 0.04" p. 88 "BPOSGE32C":
>
> "First, the offset argument is left-shifted by one bit to
On 5/29/21 3:52 PM, Philippe Mathieu-Daudé wrote:
> On Mon, Aug 20, 2018 at 8:17 PM Aleksandar Markovic
> wrote:
>>
>> From: Stefan Markovic
>>
>> Add emulation of nanoMIPS 16-bit branch instructions.
>>
>> Reviewed-by: Richard Henderson
>> Signed-off-by: Yongbok Kim
>> Signed-off-by:
On Mon, Aug 20, 2018 at 8:17 PM Aleksandar Markovic
wrote:
>
> From: Stefan Markovic
>
> Add emulation of nanoMIPS 16-bit branch instructions.
>
> Reviewed-by: Richard Henderson
> Signed-off-by: Yongbok Kim
> Signed-off-by: Aleksandar Markovic
> Signed-off-by: Stefan Markovic
> ---
>
From: Stefan Markovic
Add emulation of nanoMIPS 16-bit branch instructions.
Reviewed-by: Richard Henderson
Signed-off-by: Yongbok Kim
Signed-off-by: Aleksandar Markovic
Signed-off-by: Stefan Markovic
---
target/mips/translate.c | 158
1 file
