Hi Anthony,
On Fri, May 31, 2013 at 5:41 AM, Anthony Liguori wrote:
> Peter Crosthwaite writes:
[snip]
>>> }
>>>
>>
>> That's still possible using just the register API (Patch 2 content
>> only) and throwing away the memory API glue. I think its actually
>> quite similar to V1 of the patch serie
Peter Crosthwaite writes:
> Hi Anthony,
>
> On Thu, May 30, 2013 at 3:57 AM, Anthony Liguori
> wrote:
>> peter.crosthwa...@xilinx.com writes:
>>
>>> From: "Peter A. G. Crosthwaite"
>>>
>>> Minimal device model for devcfg module of Zynq. DMA capabilities and
>>> interrupt generation supported.
Il 30/05/2013 09:15, Peter Crosthwaite ha scritto:
>>> >> Hi Peter, Should we be putting r->access->name here instead of
>>> >> "devcfg-regs"?
>> >
>> > Yes, that's why I preferred to wrap the memory_region_init_io into an
>> > API that takes a RegisterInfo. :)
> ACK,
>
> You've convinced me :).
On Thu, May 30, 2013 at 3:08 AM, Paolo Bonzini wrote:
> Il 29/05/2013 19:04, Edgar E. Iglesias ha scritto:
>>> > +for (i = 0; i < R_MAX; ++i) {
>>> > +RegisterInfo *r = &s->regs_info[i];
>>> > +
>>> > +*r = (RegisterInfo) {
>>> > +.data = &s->regs[i],
>>> > +
Hi Anthony,
On Thu, May 30, 2013 at 3:57 AM, Anthony Liguori wrote:
> peter.crosthwa...@xilinx.com writes:
>
>> From: "Peter A. G. Crosthwaite"
>>
>> Minimal device model for devcfg module of Zynq. DMA capabilities and
>> interrupt generation supported.
>>
>> Signed-off-by: Peter A. G. Crosthwai
Anthony Liguori writes:
> peter.crosthwa...@xilinx.com writes:
>
>> From: "Peter A. G. Crosthwaite"
>>
>> Minimal device model for devcfg module of Zynq. DMA capabilities and
>> interrupt generation supported.
>>
>> Signed-off-by: Peter A. G. Crosthwaite
>> ---
>> Changed since v2:
>> Some QOM
peter.crosthwa...@xilinx.com writes:
> From: "Peter A. G. Crosthwaite"
>
> Minimal device model for devcfg module of Zynq. DMA capabilities and
> interrupt generation supported.
>
> Signed-off-by: Peter A. G. Crosthwaite
> ---
> Changed since v2:
> Some QOM styling updates.
> Re-implemented nw0
Il 29/05/2013 19:04, Edgar E. Iglesias ha scritto:
>> > +for (i = 0; i < R_MAX; ++i) {
>> > +RegisterInfo *r = &s->regs_info[i];
>> > +
>> > +*r = (RegisterInfo) {
>> > +.data = &s->regs[i],
>> > +.data_size = sizeof(uint32_t),
>> > +.access =
On Fri, May 24, 2013 at 03:49:00PM +1000, peter.crosthwa...@xilinx.com wrote:
> From: "Peter A. G. Crosthwaite"
>
> Minimal device model for devcfg module of Zynq. DMA capabilities and
> interrupt generation supported.
>
> Signed-off-by: Peter A. G. Crosthwaite
> ---
> Changed since v2:
> Some
Il 29/05/2013 15:54, Peter Crosthwaite ha scritto:
> Hi Paolo,
>
> On Wed, May 29, 2013 at 6:51 PM, Paolo Bonzini wrote:
>> Il 24/05/2013 07:49, peter.crosthwa...@xilinx.com ha scritto:
>>> +static const MemoryRegionOps devcfg_reg_ops = {
>>> +.read = register_read_memory_le,
>>> +.write
Hi Paolo,
On Wed, May 29, 2013 at 6:51 PM, Paolo Bonzini wrote:
> Il 24/05/2013 07:49, peter.crosthwa...@xilinx.com ha scritto:
>> +static const MemoryRegionOps devcfg_reg_ops = {
>> +.read = register_read_memory_le,
>> +.write = register_write_memory_le,
>> +.endianness = DEVICE_LITT
Il 24/05/2013 07:49, peter.crosthwa...@xilinx.com ha scritto:
> +static const MemoryRegionOps devcfg_reg_ops = {
> +.read = register_read_memory_le,
> +.write = register_write_memory_le,
> +.endianness = DEVICE_LITTLE_ENDIAN,
> +.valid = {
> +.min_access_size = 4,
> +
From: "Peter A. G. Crosthwaite"
Minimal device model for devcfg module of Zynq. DMA capabilities and
interrupt generation supported.
Signed-off-by: Peter A. G. Crosthwaite
---
Changed since v2:
Some QOM styling updates.
Re-implemented nw0 for lock register as pre_write
Changed since v1:
Rebased
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