Re: [PATCH 00/32] hw/sd: eMMC support
On 8/28/23 18:27, Cédric Le Goater wrote: Hello, On 7/3/23 15:24, Cédric Le Goater wrote: Hello, This series adds an extension for a new eMMC device using the framework Philippe put in place to support various SD implementations. Previous discussion on the same topic: http://patchwork.ozlabs.org/project/qemu-devel/list/?series=250563 https://lore.kernel.org/qemu-devel/20220318132824.1134400-1-...@kaod.org/ patch 1-12 - introduce SDProto structure - could be merged. They have been reviewed. patch 13 - adds a SPI variant model I plan to include 1-13 in the next aspeed PR. I plan to include the rest of this series in the next aspeed PR, for QEMU 9.1 Thanks, C. Thanks, C. patch 14-27 - adds eMMC support - need better commit logs patch 28-32 (for later) - aspeed wiring Please comment the core part, we can leave out the aspeed part for now. I won't have much time to fix the issues unless it's about compile and style issues. If someone is interested and could take over the series, that would be nice. Thanks, C. Cédric Le Goater (11): hw/sd: Introduce a "sd-card" SPI variant model hw/sd: Add emmc_cmd_SEND_OP_CMD() handler hw/sd: Add emmc_cmd_ALL_SEND_CID() handler hw/sd: Add emmc_cmd_SEND_RELATIVE_ADDR() handler hw/sd: Add emmc_cmd_APP_CMD() handler hw/sd: add emmc_cmd_SEND_TUNING_BLOCK() handler hw/sd: Add emmc_cmd_SEND_EXT_CSD() handler hw/sd: Fix SET_BLOCK_COUNT command argument hw/arm/aspeed: Add eMMC device hw/arm/aspeed: Load eMMC first boot area as a boot rom aspeed: Introduce a 'boot-emmc' property for AST2600 based machines Joel Stanley (6): hw/sd: Add sd_cmd_SEND_TUNING_BLOCK() handler hw/sd: Support boot area in emmc image hw/sd: Subtract bootarea size from blk hw/sd: Add boot config support hw/arm/aspeed: Set boot device to emmc aspeed: Set bootconfig Philippe Mathieu-Daudé (12): hw/sd: When card is in wrong state, log which state it is hw/sd: When card is in wrong state, log which spec version is used hw/sd: Move proto_name to SDProto structure hw/sd: Introduce sd_cmd_handler type hw/sd: Add sd_cmd_illegal() handler hw/sd: Add sd_cmd_unimplemented() handler hw/sd: Add sd_cmd_GO_IDLE_STATE() handler hw/sd: Add sd_cmd_SEND_OP_CMD() handler hw/sd: Add sd_cmd_ALL_SEND_CID() handler hw/sd: Add sd_cmd_SEND_RELATIVE_ADDR() handler hw/sd: Add sd_cmd_SET_BLOCK_COUNT() handler hw/sd: Basis for eMMC support Sai Pavan Boddu (3): hw/sd: Add CMD21 tuning sequence hw/sd: Add mmc switch function support hw/sd: Update CMD1 definition for MMC docs/system/arm/aspeed.rst | 2 + hw/sd/sdmmc-internal.h | 97 + include/hw/arm/aspeed_soc.h | 1 + include/hw/misc/aspeed_scu.h | 7 + include/hw/sd/sd.h | 10 + hw/arm/aspeed.c | 68 +++- hw/arm/aspeed_ast2600.c | 1 + hw/arm/stellaris.c | 3 +- hw/riscv/sifive_u.c | 3 +- hw/sd/sd.c | 702 --- hw/sd/sdmmc-internal.c | 2 +- 11 files changed, 748 insertions(+), 148 deletions(-)
Re: [PATCH 00/32] hw/sd: eMMC support
Hello, On 7/3/23 15:24, Cédric Le Goater wrote: Hello, This series adds an extension for a new eMMC device using the framework Philippe put in place to support various SD implementations. Previous discussion on the same topic: http://patchwork.ozlabs.org/project/qemu-devel/list/?series=250563 https://lore.kernel.org/qemu-devel/20220318132824.1134400-1-...@kaod.org/ patch 1-12 - introduce SDProto structure - could be merged. They have been reviewed. patch 13 - adds a SPI variant model I plan to include 1-13 in the next aspeed PR. Thanks, C. patch 14-27 - adds eMMC support - need better commit logs patch 28-32 (for later) - aspeed wiring Please comment the core part, we can leave out the aspeed part for now. I won't have much time to fix the issues unless it's about compile and style issues. If someone is interested and could take over the series, that would be nice. Thanks, C. Cédric Le Goater (11): hw/sd: Introduce a "sd-card" SPI variant model hw/sd: Add emmc_cmd_SEND_OP_CMD() handler hw/sd: Add emmc_cmd_ALL_SEND_CID() handler hw/sd: Add emmc_cmd_SEND_RELATIVE_ADDR() handler hw/sd: Add emmc_cmd_APP_CMD() handler hw/sd: add emmc_cmd_SEND_TUNING_BLOCK() handler hw/sd: Add emmc_cmd_SEND_EXT_CSD() handler hw/sd: Fix SET_BLOCK_COUNT command argument hw/arm/aspeed: Add eMMC device hw/arm/aspeed: Load eMMC first boot area as a boot rom aspeed: Introduce a 'boot-emmc' property for AST2600 based machines Joel Stanley (6): hw/sd: Add sd_cmd_SEND_TUNING_BLOCK() handler hw/sd: Support boot area in emmc image hw/sd: Subtract bootarea size from blk hw/sd: Add boot config support hw/arm/aspeed: Set boot device to emmc aspeed: Set bootconfig Philippe Mathieu-Daudé (12): hw/sd: When card is in wrong state, log which state it is hw/sd: When card is in wrong state, log which spec version is used hw/sd: Move proto_name to SDProto structure hw/sd: Introduce sd_cmd_handler type hw/sd: Add sd_cmd_illegal() handler hw/sd: Add sd_cmd_unimplemented() handler hw/sd: Add sd_cmd_GO_IDLE_STATE() handler hw/sd: Add sd_cmd_SEND_OP_CMD() handler hw/sd: Add sd_cmd_ALL_SEND_CID() handler hw/sd: Add sd_cmd_SEND_RELATIVE_ADDR() handler hw/sd: Add sd_cmd_SET_BLOCK_COUNT() handler hw/sd: Basis for eMMC support Sai Pavan Boddu (3): hw/sd: Add CMD21 tuning sequence hw/sd: Add mmc switch function support hw/sd: Update CMD1 definition for MMC docs/system/arm/aspeed.rst | 2 + hw/sd/sdmmc-internal.h | 97 + include/hw/arm/aspeed_soc.h | 1 + include/hw/misc/aspeed_scu.h | 7 + include/hw/sd/sd.h | 10 + hw/arm/aspeed.c | 68 +++- hw/arm/aspeed_ast2600.c | 1 + hw/arm/stellaris.c | 3 +- hw/riscv/sifive_u.c | 3 +- hw/sd/sd.c | 702 --- hw/sd/sdmmc-internal.c | 2 +- 11 files changed, 748 insertions(+), 148 deletions(-)
[PATCH 14/32] hw/sd: Basis for eMMC support
From: Philippe Mathieu-Daudé The initial eMMC support from Vincent Palatin was largely reworked to match the current SD framework. Signed-off-by: Cédric Le Goater --- include/hw/sd/sd.h | 3 +++ hw/sd/sd.c | 44 2 files changed, 47 insertions(+) diff --git a/include/hw/sd/sd.h b/include/hw/sd/sd.h index 2c8748fb9b97..da97400469a0 100644 --- a/include/hw/sd/sd.h +++ b/include/hw/sd/sd.h @@ -96,6 +96,9 @@ OBJECT_DECLARE_TYPE(SDState, SDCardClass, SD_CARD) #define TYPE_SD_CARD_SPI "sd-card-spi" DECLARE_INSTANCE_CHECKER(SDState, SD_CARD_SPI, TYPE_SD_CARD_SPI) +#define TYPE_EMMC "emmc" +DECLARE_INSTANCE_CHECKER(SDState, EMMC, TYPE_EMMC) + struct SDCardClass { /*< private >*/ DeviceClass parent_class; diff --git a/hw/sd/sd.c b/hw/sd/sd.c index 03fdb3addc38..409fbbcbd8d7 100644 --- a/hw/sd/sd.c +++ b/hw/sd/sd.c @@ -2171,6 +2171,20 @@ static const SDProto sd_proto_sd = { }, }; +static const SDProto sd_proto_emmc = { +.name = "eMMC", +.cmd = { +[0] = sd_cmd_GO_IDLE_STATE, +[5] = sd_cmd_illegal, +[19]= sd_cmd_SEND_TUNING_BLOCK, +[23]= sd_cmd_SET_BLOCK_COUNT, +[41]= sd_cmd_illegal, +[52 ... 54] = sd_cmd_illegal, +[58]= sd_cmd_illegal, +[59]= sd_cmd_illegal, +}, +}; + static void sd_instance_init(Object *obj) { SDState *sd = SD_CARD(obj); @@ -2307,10 +2321,40 @@ static const TypeInfo sd_spi_info = { .class_init = sd_spi_class_init, }; +static void emmc_realize(DeviceState *dev, Error **errp) +{ +SDState *sd = SD_CARD(dev); + +if (sd->spec_version < SD_PHY_SPECv3_01_VERS) { +error_setg(errp, "Minimum spec for eMMC is v3.01"); +return; +} + +sd_realize(dev, errp); +} + +static void emmc_class_init(ObjectClass *klass, void *data) +{ +DeviceClass *dc = DEVICE_CLASS(klass); +SDCardClass *sc = SD_CARD_CLASS(klass); + +dc->desc = "eMMC"; +dc->realize = emmc_realize; +sc->proto = _proto_emmc; +} + +static const TypeInfo emmc_info = { +.name = TYPE_EMMC, +.parent = TYPE_SD_CARD, +.class_init = emmc_class_init, + }; + + static void sd_register_types(void) { type_register_static(_info); type_register_static(_spi_info); +type_register_static(_info); } type_init(sd_register_types) -- 2.41.0
[PATCH 00/32] hw/sd: eMMC support
Hello, This series adds an extension for a new eMMC device using the framework Philippe put in place to support various SD implementations. Previous discussion on the same topic: http://patchwork.ozlabs.org/project/qemu-devel/list/?series=250563 https://lore.kernel.org/qemu-devel/20220318132824.1134400-1-...@kaod.org/ patch 1-12 - introduce SDProto structure - could be merged. They have been reviewed. patch 13 - adds a SPI variant model patch 14-27 - adds eMMC support - need better commit logs patch 28-32 (for later) - aspeed wiring Please comment the core part, we can leave out the aspeed part for now. I won't have much time to fix the issues unless it's about compile and style issues. If someone is interested and could take over the series, that would be nice. Thanks, C. Cédric Le Goater (11): hw/sd: Introduce a "sd-card" SPI variant model hw/sd: Add emmc_cmd_SEND_OP_CMD() handler hw/sd: Add emmc_cmd_ALL_SEND_CID() handler hw/sd: Add emmc_cmd_SEND_RELATIVE_ADDR() handler hw/sd: Add emmc_cmd_APP_CMD() handler hw/sd: add emmc_cmd_SEND_TUNING_BLOCK() handler hw/sd: Add emmc_cmd_SEND_EXT_CSD() handler hw/sd: Fix SET_BLOCK_COUNT command argument hw/arm/aspeed: Add eMMC device hw/arm/aspeed: Load eMMC first boot area as a boot rom aspeed: Introduce a 'boot-emmc' property for AST2600 based machines Joel Stanley (6): hw/sd: Add sd_cmd_SEND_TUNING_BLOCK() handler hw/sd: Support boot area in emmc image hw/sd: Subtract bootarea size from blk hw/sd: Add boot config support hw/arm/aspeed: Set boot device to emmc aspeed: Set bootconfig Philippe Mathieu-Daudé (12): hw/sd: When card is in wrong state, log which state it is hw/sd: When card is in wrong state, log which spec version is used hw/sd: Move proto_name to SDProto structure hw/sd: Introduce sd_cmd_handler type hw/sd: Add sd_cmd_illegal() handler hw/sd: Add sd_cmd_unimplemented() handler hw/sd: Add sd_cmd_GO_IDLE_STATE() handler hw/sd: Add sd_cmd_SEND_OP_CMD() handler hw/sd: Add sd_cmd_ALL_SEND_CID() handler hw/sd: Add sd_cmd_SEND_RELATIVE_ADDR() handler hw/sd: Add sd_cmd_SET_BLOCK_COUNT() handler hw/sd: Basis for eMMC support Sai Pavan Boddu (3): hw/sd: Add CMD21 tuning sequence hw/sd: Add mmc switch function support hw/sd: Update CMD1 definition for MMC docs/system/arm/aspeed.rst | 2 + hw/sd/sdmmc-internal.h | 97 + include/hw/arm/aspeed_soc.h | 1 + include/hw/misc/aspeed_scu.h | 7 + include/hw/sd/sd.h | 10 + hw/arm/aspeed.c | 68 +++- hw/arm/aspeed_ast2600.c | 1 + hw/arm/stellaris.c | 3 +- hw/riscv/sifive_u.c | 3 +- hw/sd/sd.c | 702 --- hw/sd/sdmmc-internal.c | 2 +- 11 files changed, 748 insertions(+), 148 deletions(-) -- 2.41.0
Re: [PATCH v2 00/25] hw/sd: Rework models for eMMC support
On 5/31/22 21:07, Philippe Mathieu-Daudé wrote: On 31/5/22 11:19, Cédric Le Goater wrote: On 5/30/22 21:37, Philippe Mathieu-Daudé wrote: From: Philippe Mathieu-Daudé Rebase/respin of Cédric RFC: https://lore.kernel.org/qemu-devel/20220318132824.1134400-1-...@kaod.org/ (sorry it took me so long guys...) Pushed at https://gitlab.com/philmd/qemu/-/commits/emmc-v2 I plan to queue patches 1-12 via sdmmc-next later this week. Cédric, if you are happy with this series, it should be easy to rebase your other patches on top and address the comments I left on the RFC :) I pushed an update on : https://github.com/legoater/qemu/commits/aspeed-7.1 Here is an image : https://www.kaod.org/qemu/aspeed/mmc-p10bmc.qcow2 run with : qemu-system-arm -M rainier-bmc -net nic -net user -drive file=./mmc-p10bmc.qcow2,format=qcow2,if=sd,id=sd0,index=2 -nographic -nodefaults -snapshot -serial mon:stdio Useful, thanks. I see in hw/arm/aspeed_ast2600.c: /* Init sd card slot class here so that they're under the correct parent */ for (i = 0; i < ASPEED_SDHCI_NUM_SLOTS; ++i) { object_initialize_child(obj, "sd-controller.sdhci[*]", >sdhci.slots[i], TYPE_SYSBUS_SDHCI); } object_initialize_child(obj, "emmc-controller.sdhci", >emmc.slots[0], TYPE_SYSBUS_SDHCI); /* eMMC Boot Controller stub */ create_unimplemented_device("aspeed.emmc-boot-controller", sc->memmap[ASPEED_DEV_EMMC_BC], 0x1000); /* eMMC */ if (!sysbus_realize(SYS_BUS_DEVICE(>emmc), errp)) { return; } sysbus_mmio_map(SYS_BUS_DEVICE(>emmc), 0, sc->memmap[ASPEED_DEV_EMMC]); sysbus_connect_irq(SYS_BUS_DEVICE(>emmc), 0, aspeed_soc_get_irq(s, ASPEED_DEV_EMMC)); Where is 'emmc-controller.sdhci' realized? the slots are realized in aspeed_sdhci_realize(). It's not very symmetric and the names are confusing. I think that one of the problems is that the instance_init routine of TYPE_ASPEED_SDHCI object doesn't know on how much slots object_initialize_child() should be called since it depends on its flavor : SD/eMMC. In aspeed_sdhci_realize() you set sd-spec-version" = 2, is that OK with eMMC? ah yes. it boots anyhow. What expects the real hw? ast2400 ast2500 ast2600 SDHC cardv2.0/v3.0 v2.0/v3.0 v2.0/v3.0 SDIO Host v2.0v2.0v2.0 SD slots2 2 2 eMMCx v4.51 v5.1 eMMC slots x 1 1 on the ast2500, the SDIO and eMMC logics are combined in one controller but since it is not used, QEMU does not model the eMMC part. Thanks, C.
Re: [PATCH v2 00/25] hw/sd: Rework models for eMMC support
On 31/5/22 11:19, Cédric Le Goater wrote: On 5/30/22 21:37, Philippe Mathieu-Daudé wrote: From: Philippe Mathieu-Daudé Rebase/respin of Cédric RFC: https://lore.kernel.org/qemu-devel/20220318132824.1134400-1-...@kaod.org/ (sorry it took me so long guys...) Pushed at https://gitlab.com/philmd/qemu/-/commits/emmc-v2 I plan to queue patches 1-12 via sdmmc-next later this week. Cédric, if you are happy with this series, it should be easy to rebase your other patches on top and address the comments I left on the RFC :) I pushed an update on : https://github.com/legoater/qemu/commits/aspeed-7.1 Here is an image : https://www.kaod.org/qemu/aspeed/mmc-p10bmc.qcow2 run with : qemu-system-arm -M rainier-bmc -net nic -net user -drive file=./mmc-p10bmc.qcow2,format=qcow2,if=sd,id=sd0,index=2 -nographic -nodefaults -snapshot -serial mon:stdio Useful, thanks. I see in hw/arm/aspeed_ast2600.c: /* Init sd card slot class here so that they're under the correct parent */ for (i = 0; i < ASPEED_SDHCI_NUM_SLOTS; ++i) { object_initialize_child(obj, "sd-controller.sdhci[*]", >sdhci.slots[i], TYPE_SYSBUS_SDHCI); } object_initialize_child(obj, "emmc-controller.sdhci", >emmc.slots[0], TYPE_SYSBUS_SDHCI); /* eMMC Boot Controller stub */ create_unimplemented_device("aspeed.emmc-boot-controller", sc->memmap[ASPEED_DEV_EMMC_BC], 0x1000); /* eMMC */ if (!sysbus_realize(SYS_BUS_DEVICE(>emmc), errp)) { return; } sysbus_mmio_map(SYS_BUS_DEVICE(>emmc), 0, sc->memmap[ASPEED_DEV_EMMC]); sysbus_connect_irq(SYS_BUS_DEVICE(>emmc), 0, aspeed_soc_get_irq(s, ASPEED_DEV_EMMC)); Where is 'emmc-controller.sdhci' realized? In aspeed_sdhci_realize() you set sd-spec-version" = 2, is that OK with eMMC? What expects the real hw? Thanks, Phil.
Re: [PATCH v2 00/25] hw/sd: Rework models for eMMC support
On 5/30/22 21:37, Philippe Mathieu-Daudé wrote: From: Philippe Mathieu-Daudé Rebase/respin of Cédric RFC: https://lore.kernel.org/qemu-devel/20220318132824.1134400-1-...@kaod.org/ (sorry it took me so long guys...) Pushed at https://gitlab.com/philmd/qemu/-/commits/emmc-v2 I plan to queue patches 1-12 via sdmmc-next later this week. Cédric, if you are happy with this series, it should be easy to rebase your other patches on top and address the comments I left on the RFC :) I pushed an update on : https://github.com/legoater/qemu/commits/aspeed-7.1 Here is an image : https://www.kaod.org/qemu/aspeed/mmc-p10bmc.qcow2 run with : qemu-system-arm -M rainier-bmc -net nic -net user -drive file=./mmc-p10bmc.qcow2,format=qcow2,if=sd,id=sd0,index=2 -nographic -nodefaults -snapshot -serial mon:stdio Thanks, C. Regards, Phil. Cédric Le Goater (6): hw/sd: Add sd_emmc_cmd_SEND_OP_CMD() handler hw/sd: Add sd_emmc_cmd_ALL_SEND_CID() handler hw/sd: Add sd_emmc_cmd_SEND_RELATIVE_ADDR() handler hw/sd: Add sd_emmc_cmd_APP_CMD() handler hw/sd: add sd_emmc_cmd_SEND_TUNING_BLOCK() handler hw/sd: Add sd_emmc_cmd_SEND_EXT_CSD() handler Joel Stanley (4): hw/sd: Add sd_cmd_SEND_TUNING_BLOCK() handler hw/sd: Support boot area in emmc image hw/sd: Subtract bootarea size from blk hw/sd: Add boot config support Philippe Mathieu-Daudé (13): hw/sd/sdcard: Return ILLEGAL for CMD19/CMD23 prior SD spec v3.01 hw/sd: When card is in wrong state, log which state it is hw/sd: When card is in wrong state, log which spec version is used hw/sd: Move proto_name to SDProto structure hw/sd: Introduce sd_cmd_handler type hw/sd: Add sd_cmd_illegal() handler hw/sd: Add sd_cmd_unimplemented() handler hw/sd: Add sd_cmd_GO_IDLE_STATE() handler hw/sd: Add sd_cmd_SEND_OP_CMD() handler hw/sd: Add sd_cmd_ALL_SEND_CID() handler hw/sd: Add sd_cmd_SEND_RELATIVE_ADDR() handler hw/sd: Add sd_cmd_SET_BLOCK_COUNT() handler hw/sd: Basis for eMMC support Sai Pavan Boddu (2): hw/sd: Add CMD21 tuning sequence hw/sd: Add mmc switch function support hw/sd/sd.c | 645 + hw/sd/sdmmc-internal.c | 2 +- hw/sd/sdmmc-internal.h | 97 +++ include/hw/sd/sd.h | 7 + 4 files changed, 627 insertions(+), 124 deletions(-)
Re: [PATCH v2 14/25] hw/sd: Basis for eMMC support
On 5/30/22 21:38, Philippe Mathieu-Daudé wrote: From: Philippe Mathieu-Daudé The initial eMMC support from Vincent Palatin was largely reworked to match the current SD framework. Signed-off-by: Cédric Le Goater Signed-off-by: Philippe Mathieu-Daudé --- TODO: Do not inherit TYPE_SD_CARD, duplicate sd_class_init() --- hw/sd/sd.c | 42 ++ include/hw/sd/sd.h | 3 +++ 2 files changed, 45 insertions(+) diff --git a/hw/sd/sd.c b/hw/sd/sd.c index b2f16dbb73..8b178aa261 100644 --- a/hw/sd/sd.c +++ b/hw/sd/sd.c @@ -2166,6 +2166,19 @@ static const SDProto sd_proto_sd = { }, }; +static const SDProto sd_proto_emmc = { +.name = "eMMC", +.cmd = { +[0] = sd_cmd_GO_IDLE_STATE, +[5] = sd_cmd_illegal, And this needed an extra : +[23]= sd_cmd_SET_BLOCK_COUNT, Thanks, C. +[19]= sd_cmd_SEND_TUNING_BLOCK, +[41]= sd_cmd_illegal, +[52 ... 54] = sd_cmd_illegal, +[58]= sd_cmd_illegal, +[59]= sd_cmd_illegal, +}, +}; + static void sd_instance_init(Object *obj) { SDState *sd = SD_CARD(obj); @@ -2284,9 +2297,38 @@ static const TypeInfo sd_info = { .instance_finalize = sd_instance_finalize, }; +static void emmc_realize(DeviceState *dev, Error **errp) +{ +SDState *sd = SD_CARD(dev); + +if (sd->spec_version < SD_PHY_SPECv3_01_VERS) { +error_setg(errp, "Minimum spec for eMMC is v3.01"); +return; +} + +sd_realize(dev, errp); +} + +static void emmc_class_init(ObjectClass *klass, void *data) +{ +DeviceClass *dc = DEVICE_CLASS(klass); +SDCardClass *sc = SD_CARD_CLASS(klass); + +dc->desc = "eMMC"; +dc->realize = emmc_realize; +sc->proto = _proto_emmc; +} + +static const TypeInfo emmc_info = { +.name = TYPE_EMMC, +.parent = TYPE_SD_CARD, +.class_init = emmc_class_init, + }; + static void sd_register_types(void) { type_register_static(_info); +type_register_static(_info); } type_init(sd_register_types) diff --git a/include/hw/sd/sd.h b/include/hw/sd/sd.h index 0d94e1f346..e52436b7a5 100644 --- a/include/hw/sd/sd.h +++ b/include/hw/sd/sd.h @@ -93,6 +93,9 @@ typedef struct { #define TYPE_SD_CARD "sd-card" OBJECT_DECLARE_TYPE(SDState, SDCardClass, SD_CARD) +#define TYPE_EMMC "emmc" +DECLARE_INSTANCE_CHECKER(SDState, EMMC, TYPE_EMMC) + struct SDCardClass { /*< private >*/ DeviceClass parent_class;
Re: [PATCH v2 14/25] hw/sd: Basis for eMMC support
On 5/30/22 21:38, Philippe Mathieu-Daudé wrote: From: Philippe Mathieu-Daudé The initial eMMC support from Vincent Palatin was largely reworked to match the current SD framework. Signed-off-by: Cédric Le Goater Signed-off-by: Philippe Mathieu-Daudé --- TODO: Do not inherit TYPE_SD_CARD, duplicate sd_class_init() --- hw/sd/sd.c | 42 ++ include/hw/sd/sd.h | 3 +++ 2 files changed, 45 insertions(+) diff --git a/hw/sd/sd.c b/hw/sd/sd.c index b2f16dbb73..8b178aa261 100644 --- a/hw/sd/sd.c +++ b/hw/sd/sd.c @@ -2166,6 +2166,19 @@ static const SDProto sd_proto_sd = { }, }; +static const SDProto sd_proto_emmc = { +.name = "eMMC", +.cmd = { +[0] = sd_cmd_GO_IDLE_STATE, +[5] = sd_cmd_illegal, +[19]= sd_cmd_SEND_TUNING_BLOCK, +[41]= sd_cmd_illegal, +[52 ... 54] = sd_cmd_illegal, +[58]= sd_cmd_illegal, +[59]= sd_cmd_illegal, +}, +}; + static void sd_instance_init(Object *obj) { SDState *sd = SD_CARD(obj); @@ -2284,9 +2297,38 @@ static const TypeInfo sd_info = { .instance_finalize = sd_instance_finalize, }; +static void emmc_realize(DeviceState *dev, Error **errp) +{ +SDState *sd = SD_CARD(dev); + +if (sd->spec_version < SD_PHY_SPECv3_01_VERS) { +error_setg(errp, "Minimum spec for eMMC is v3.01"); +return; +} + +sd_realize(dev, errp); sd_realize overwrites sc->proto. We should not write to the class anyway. C. +} + +static void emmc_class_init(ObjectClass *klass, void *data) +{ +DeviceClass *dc = DEVICE_CLASS(klass); +SDCardClass *sc = SD_CARD_CLASS(klass); + +dc->desc = "eMMC"; +dc->realize = emmc_realize; +sc->proto = _proto_emmc; +} + +static const TypeInfo emmc_info = { +.name = TYPE_EMMC, +.parent = TYPE_SD_CARD, +.class_init = emmc_class_init, + }; + static void sd_register_types(void) { type_register_static(_info); +type_register_static(_info); } type_init(sd_register_types) diff --git a/include/hw/sd/sd.h b/include/hw/sd/sd.h index 0d94e1f346..e52436b7a5 100644 --- a/include/hw/sd/sd.h +++ b/include/hw/sd/sd.h @@ -93,6 +93,9 @@ typedef struct { #define TYPE_SD_CARD "sd-card" OBJECT_DECLARE_TYPE(SDState, SDCardClass, SD_CARD) +#define TYPE_EMMC "emmc" +DECLARE_INSTANCE_CHECKER(SDState, EMMC, TYPE_EMMC) + struct SDCardClass { /*< private >*/ DeviceClass parent_class;
Re: [RFC PATCH 11/17] hw/sd: Add eMMC support
On 5/31/22 10:03, Philippe Mathieu-Daudé wrote: On 31/5/22 07:58, Cédric Le Goater wrote: On 5/30/22 19:40, Philippe Mathieu-Daudé wrote: On 18/3/22 14:28, Cédric Le Goater wrote: The initial eMMC support from Vincent Palatin was largely reworked to match the current SD framework. The parameters mimick a real 4GB eMMC, but it can be set to various sizes. This adds a new QOM object class for EMMC devices. Signed-off-by: Vincent Palatin Link: https://lore.kernel.org/r/1311635951-11047-5-git-send-email-vpala...@chromium.org [ jms: - Forward ported to QEMU 5.2 ] Signed-off-by: Joel Stanley [ clg: - ported on aspeed-7.0 patchset - HPI activation ] Signed-off-by: Cédric Le Goater --- hw/sd/sdmmc-internal.h | 97 +++ include/hw/sd/sd.h | 9 ++ hw/sd/sd.c | 205 - hw/sd/sdmmc-internal.c | 2 +- 4 files changed, 311 insertions(+), 2 deletions(-) +static void emmc_class_init(ObjectClass *klass, void *data) +{ + DeviceClass *dc = DEVICE_CLASS(klass); + SDCardClass *sc = SD_CARD_CLASS(klass); + + dc->desc = "eMMC"; + sc->proto = _proto_emmc; + sc->spec_version = SD_PHY_SPECv3_01_VERS; /* eMMC requirement */ + sc->set_csd = sd_emmc_set_csd; +} + +static const TypeInfo emmc_info = { + .name = TYPE_EMMC, + .parent = TYPE_SD_CARD, Hmm this is odd to have the model inheriting features from SD_CARD but then behaving differently (one could enumerate QDEV objects implementing TYPE_SD_CARD then use them expecting they match the SD card protocol). Why do you need to have TYPE_SD_CARD as parent? Simply for the initialization. Could we simply duplicate sd_class_init() assignations instead? That would likely make it easier to modify eMMC handlers. May be we lack a base abstract class ? I've been thinking about it but maybe not enough. I'll revisit. It would clean up this section in the realize routine : sd->proto = sd->spi ? _proto_spi : _proto_sd; if (sc->proto) { sd->proto = sc->proto; } In v2 I moved the 'proto' field from instance to class, so we don't need this hack anymore. Indeed : static void sd_realize(DeviceState *dev, Error **errp) { SDState *sd = SD_CARD(dev); SDCardClass *sc = SD_CARD_GET_CLASS(sd); int ret; sc->proto = sd->spi ? _proto_spi : _proto_sd; ... but this is assigning a class attribute from an instance :/ C.
Re: [RFC PATCH 11/17] hw/sd: Add eMMC support
On 31/5/22 07:58, Cédric Le Goater wrote: On 5/30/22 19:40, Philippe Mathieu-Daudé wrote: On 18/3/22 14:28, Cédric Le Goater wrote: The initial eMMC support from Vincent Palatin was largely reworked to match the current SD framework. The parameters mimick a real 4GB eMMC, but it can be set to various sizes. This adds a new QOM object class for EMMC devices. Signed-off-by: Vincent Palatin Link: https://lore.kernel.org/r/1311635951-11047-5-git-send-email-vpala...@chromium.org [ jms: - Forward ported to QEMU 5.2 ] Signed-off-by: Joel Stanley [ clg: - ported on aspeed-7.0 patchset - HPI activation ] Signed-off-by: Cédric Le Goater --- hw/sd/sdmmc-internal.h | 97 +++ include/hw/sd/sd.h | 9 ++ hw/sd/sd.c | 205 - hw/sd/sdmmc-internal.c | 2 +- 4 files changed, 311 insertions(+), 2 deletions(-) +static void emmc_class_init(ObjectClass *klass, void *data) +{ + DeviceClass *dc = DEVICE_CLASS(klass); + SDCardClass *sc = SD_CARD_CLASS(klass); + + dc->desc = "eMMC"; + sc->proto = _proto_emmc; + sc->spec_version = SD_PHY_SPECv3_01_VERS; /* eMMC requirement */ + sc->set_csd = sd_emmc_set_csd; +} + +static const TypeInfo emmc_info = { + .name = TYPE_EMMC, + .parent = TYPE_SD_CARD, Hmm this is odd to have the model inheriting features from SD_CARD but then behaving differently (one could enumerate QDEV objects implementing TYPE_SD_CARD then use them expecting they match the SD card protocol). Why do you need to have TYPE_SD_CARD as parent? Simply for the initialization. Could we simply duplicate sd_class_init() assignations instead? That would likely make it easier to modify eMMC handlers. May be we lack a base abstract class ? I've been thinking about it but maybe not enough. I'll revisit. It would clean up this section in the realize routine : sd->proto = sd->spi ? _proto_spi : _proto_sd; if (sc->proto) { sd->proto = sc->proto; } In v2 I moved the 'proto' field from instance to class, so we don't need this hack anymore.
Re: [PATCH v2 00/25] hw/sd: Rework models for eMMC support
On Tue, May 31, 2022 at 9:56 AM Philippe Mathieu-Daudé wrote: > On 31/5/22 08:31, Cédric Le Goater wrote: > > On 5/30/22 21:37, Philippe Mathieu-Daudé wrote: > >> I plan to queue patches 1-12 via sdmmc-next later this week. > >> > >> Cédric, if you are happy with this series, it should be easy to rebase > >> your other patches on top and address the comments I left on the RFC :) > > > > Sure. I will for the first patches to be merged and I might introduce > > a base class. > > Then consider patches 1-13 queued. Oops too fast, new patches 3 & 13 are not reviewed.
Re: [PATCH v2 00/25] hw/sd: Rework models for eMMC support
On 31/5/22 08:31, Cédric Le Goater wrote: On 5/30/22 21:37, Philippe Mathieu-Daudé wrote: From: Philippe Mathieu-Daudé Rebase/respin of Cédric RFC: https://lore.kernel.org/qemu-devel/20220318132824.1134400-1-...@kaod.org/ (sorry it took me so long guys...) Pushed at https://gitlab.com/philmd/qemu/-/commits/emmc-v2 I plan to queue patches 1-12 via sdmmc-next later this week. Cédric, if you are happy with this series, it should be easy to rebase your other patches on top and address the comments I left on the RFC :) Sure. I will for the first patches to be merged and I might introduce a base class. Then consider patches 1-13 queued. Thanks, C. Regards, Phil.
Re: [PATCH v2 14/25] hw/sd: Basis for eMMC support
On 30/5/22 21:38, Philippe Mathieu-Daudé wrote: From: Philippe Mathieu-Daudé I missed something during the cherry-pick, this should be: From: Cédric Le Goater The initial eMMC support from Vincent Palatin was largely reworked to match the current SD framework. Signed-off-by: Cédric Le Goater Signed-off-by: Philippe Mathieu-Daudé --- TODO: Do not inherit TYPE_SD_CARD, duplicate sd_class_init() --- hw/sd/sd.c | 42 ++ include/hw/sd/sd.h | 3 +++ 2 files changed, 45 insertions(+) diff --git a/hw/sd/sd.c b/hw/sd/sd.c index b2f16dbb73..8b178aa261 100644 --- a/hw/sd/sd.c +++ b/hw/sd/sd.c @@ -2166,6 +2166,19 @@ static const SDProto sd_proto_sd = { }, }; +static const SDProto sd_proto_emmc = { +.name = "eMMC", +.cmd = { +[0] = sd_cmd_GO_IDLE_STATE, +[5] = sd_cmd_illegal, +[19]= sd_cmd_SEND_TUNING_BLOCK, +[41]= sd_cmd_illegal, +[52 ... 54] = sd_cmd_illegal, +[58]= sd_cmd_illegal, +[59]= sd_cmd_illegal, +}, +}; + static void sd_instance_init(Object *obj) { SDState *sd = SD_CARD(obj); @@ -2284,9 +2297,38 @@ static const TypeInfo sd_info = { .instance_finalize = sd_instance_finalize, }; +static void emmc_realize(DeviceState *dev, Error **errp) +{ +SDState *sd = SD_CARD(dev); + +if (sd->spec_version < SD_PHY_SPECv3_01_VERS) { +error_setg(errp, "Minimum spec for eMMC is v3.01"); +return; +} + +sd_realize(dev, errp); +} + +static void emmc_class_init(ObjectClass *klass, void *data) +{ +DeviceClass *dc = DEVICE_CLASS(klass); +SDCardClass *sc = SD_CARD_CLASS(klass); + +dc->desc = "eMMC"; +dc->realize = emmc_realize; +sc->proto = _proto_emmc; +} + +static const TypeInfo emmc_info = { +.name = TYPE_EMMC, +.parent = TYPE_SD_CARD, +.class_init = emmc_class_init, + }; + static void sd_register_types(void) { type_register_static(_info); +type_register_static(_info); } type_init(sd_register_types) diff --git a/include/hw/sd/sd.h b/include/hw/sd/sd.h index 0d94e1f346..e52436b7a5 100644 --- a/include/hw/sd/sd.h +++ b/include/hw/sd/sd.h @@ -93,6 +93,9 @@ typedef struct { #define TYPE_SD_CARD "sd-card" OBJECT_DECLARE_TYPE(SDState, SDCardClass, SD_CARD) +#define TYPE_EMMC "emmc" +DECLARE_INSTANCE_CHECKER(SDState, EMMC, TYPE_EMMC) + struct SDCardClass { /*< private >*/ DeviceClass parent_class;
Re: [PATCH v2 00/25] hw/sd: Rework models for eMMC support
On 5/30/22 21:37, Philippe Mathieu-Daudé wrote: From: Philippe Mathieu-Daudé Rebase/respin of Cédric RFC: https://lore.kernel.org/qemu-devel/20220318132824.1134400-1-...@kaod.org/ (sorry it took me so long guys...) Pushed at https://gitlab.com/philmd/qemu/-/commits/emmc-v2 I plan to queue patches 1-12 via sdmmc-next later this week. Cédric, if you are happy with this series, it should be easy to rebase your other patches on top and address the comments I left on the RFC :) Sure. I will for the first patches to be merged and I might introduce a base class. Thanks, C. Regards, Phil. Cédric Le Goater (6): hw/sd: Add sd_emmc_cmd_SEND_OP_CMD() handler hw/sd: Add sd_emmc_cmd_ALL_SEND_CID() handler hw/sd: Add sd_emmc_cmd_SEND_RELATIVE_ADDR() handler hw/sd: Add sd_emmc_cmd_APP_CMD() handler hw/sd: add sd_emmc_cmd_SEND_TUNING_BLOCK() handler hw/sd: Add sd_emmc_cmd_SEND_EXT_CSD() handler Joel Stanley (4): hw/sd: Add sd_cmd_SEND_TUNING_BLOCK() handler hw/sd: Support boot area in emmc image hw/sd: Subtract bootarea size from blk hw/sd: Add boot config support Philippe Mathieu-Daudé (13): hw/sd/sdcard: Return ILLEGAL for CMD19/CMD23 prior SD spec v3.01 hw/sd: When card is in wrong state, log which state it is hw/sd: When card is in wrong state, log which spec version is used hw/sd: Move proto_name to SDProto structure hw/sd: Introduce sd_cmd_handler type hw/sd: Add sd_cmd_illegal() handler hw/sd: Add sd_cmd_unimplemented() handler hw/sd: Add sd_cmd_GO_IDLE_STATE() handler hw/sd: Add sd_cmd_SEND_OP_CMD() handler hw/sd: Add sd_cmd_ALL_SEND_CID() handler hw/sd: Add sd_cmd_SEND_RELATIVE_ADDR() handler hw/sd: Add sd_cmd_SET_BLOCK_COUNT() handler hw/sd: Basis for eMMC support Sai Pavan Boddu (2): hw/sd: Add CMD21 tuning sequence hw/sd: Add mmc switch function support hw/sd/sd.c | 645 + hw/sd/sdmmc-internal.c | 2 +- hw/sd/sdmmc-internal.h | 97 +++ include/hw/sd/sd.h | 7 + 4 files changed, 627 insertions(+), 124 deletions(-)
Re: [RFC PATCH 11/17] hw/sd: Add eMMC support
On 5/30/22 20:29, Philippe Mathieu-Daudé wrote: On 18/3/22 14:28, Cédric Le Goater wrote: The initial eMMC support from Vincent Palatin was largely reworked to match the current SD framework. The parameters mimick a real 4GB eMMC, but it can be set to various sizes. This adds a new QOM object class for EMMC devices. Signed-off-by: Vincent Palatin Link: https://lore.kernel.org/r/1311635951-11047-5-git-send-email-vpala...@chromium.org [ jms: - Forward ported to QEMU 5.2 ] Signed-off-by: Joel Stanley [ clg: - ported on aspeed-7.0 patchset - HPI activation ] Signed-off-by: Cédric Le Goater --- hw/sd/sdmmc-internal.h | 97 +++ include/hw/sd/sd.h | 9 ++ hw/sd/sd.c | 205 - hw/sd/sdmmc-internal.c | 2 +- 4 files changed, 311 insertions(+), 2 deletions(-) static void sd_instance_init(Object *obj) { SDState *sd = SD_CARD(obj); @@ -2162,10 +2338,19 @@ static void sd_instance_finalize(Object *obj) static void sd_realize(DeviceState *dev, Error **errp) { SDState *sd = SD_CARD(dev); + SDCardClass *sc = SD_CARD_GET_CLASS(sd); int ret; sd->proto = sd->spi ? _proto_spi : _proto_sd; + if (sc->proto) { + sd->proto = sc->proto; + } + + if (sc->spec_version) { + sd->spec_version = sc->spec_version; + } + switch (sd->spec_version) { case SD_PHY_SPECv1_10_VERS ... SD_PHY_SPECv3_01_VERS: Instead I'd use: Yes. This is better. Thanks, C. -- >8 -- @@ -2301,14 +2297,26 @@ static const TypeInfo sd_info = { .instance_finalize = sd_instance_finalize, }; +static void emmc_realize(DeviceState *dev, Error **errp) +{ + SDState *sd = SD_CARD(dev); + + if (sd->spec_version < SD_PHY_SPECv3_01_VERS) { + error_setg(errp, "Minimum spec for eMMC is v3.01"); + return; + } + + sd_realize(dev, errp); +} + static void emmc_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); SDCardClass *sc = SD_CARD_CLASS(klass); dc->desc = "eMMC"; + dc->realize = emmc_realize; sc->proto = _proto_emmc; } ---
Re: [RFC PATCH 11/17] hw/sd: Add eMMC support
On 5/30/22 19:40, Philippe Mathieu-Daudé wrote: On 18/3/22 14:28, Cédric Le Goater wrote: The initial eMMC support from Vincent Palatin was largely reworked to match the current SD framework. The parameters mimick a real 4GB eMMC, but it can be set to various sizes. This adds a new QOM object class for EMMC devices. Signed-off-by: Vincent Palatin Link: https://lore.kernel.org/r/1311635951-11047-5-git-send-email-vpala...@chromium.org [ jms: - Forward ported to QEMU 5.2 ] Signed-off-by: Joel Stanley [ clg: - ported on aspeed-7.0 patchset - HPI activation ] Signed-off-by: Cédric Le Goater --- hw/sd/sdmmc-internal.h | 97 +++ include/hw/sd/sd.h | 9 ++ hw/sd/sd.c | 205 - hw/sd/sdmmc-internal.c | 2 +- 4 files changed, 311 insertions(+), 2 deletions(-) +static void emmc_class_init(ObjectClass *klass, void *data) +{ + DeviceClass *dc = DEVICE_CLASS(klass); + SDCardClass *sc = SD_CARD_CLASS(klass); + + dc->desc = "eMMC"; + sc->proto = _proto_emmc; + sc->spec_version = SD_PHY_SPECv3_01_VERS; /* eMMC requirement */ + sc->set_csd = sd_emmc_set_csd; +} + +static const TypeInfo emmc_info = { + .name = TYPE_EMMC, + .parent = TYPE_SD_CARD, Hmm this is odd to have the model inheriting features from SD_CARD but then behaving differently (one could enumerate QDEV objects implementing TYPE_SD_CARD then use them expecting they match the SD card protocol). Why do you need to have TYPE_SD_CARD as parent? Simply for the initialization. Could we simply duplicate sd_class_init() assignations instead? That would likely make it easier to modify eMMC handlers. May be we lack a base abstract class ? It would clean up this section in the realize routine : sd->proto = sd->spi ? _proto_spi : _proto_sd; if (sc->proto) { sd->proto = sc->proto; } Thanks, C. + .class_init = emmc_class_init, + };
Re: [RFC PATCH 11/17] hw/sd: Add eMMC support
On 5/30/22 19:02, Philippe Mathieu-Daudé wrote: Hi Cédric, On 18/3/22 14:28, Cédric Le Goater wrote: The initial eMMC support from Vincent Palatin was largely reworked to match the current SD framework. The parameters mimick a real 4GB eMMC, but it can be set to various sizes. This adds a new QOM object class for EMMC devices. Signed-off-by: Vincent Palatin Link: https://lore.kernel.org/r/1311635951-11047-5-git-send-email-vpala...@chromium.org [ jms: - Forward ported to QEMU 5.2 ] Signed-off-by: Joel Stanley [ clg: - ported on aspeed-7.0 patchset - HPI activation ] Signed-off-by: Cédric Le Goater --- hw/sd/sdmmc-internal.h | 97 +++ include/hw/sd/sd.h | 9 ++ hw/sd/sd.c | 205 - hw/sd/sdmmc-internal.c | 2 +- 4 files changed, 311 insertions(+), 2 deletions(-) +static const SDProto sd_proto_emmc = { What about renaming as: ... emmc_proto = { yes. These are internal functions. Fine with me. Thanks, C. + .name = "eMMC", + .cmd = { + [0] = sd_cmd_GO_IDLE_STATE, + [1] = sd_emmc_cmd_SEND_OP_CMD, = emmc_cmd_SEND_OP_CMD, + [2] = sd_emmc_cmd_ALL_SEND_CID, ... ? + [3] = sd_emmc_cmd_SEND_RELATIVE_ADDR, + [5] = sd_cmd_illegal, + [8] = sd_emmc_cmd_SEND_EXT_CSD, + [19] = sd_cmd_SEND_TUNING_BLOCK, + [21] = sd_emmc_cmd_SEND_TUNING_BLOCK, + [41] = sd_cmd_illegal, + [52 ... 54] = sd_cmd_illegal, + [55] = sd_emmc_cmd_APP_CMD, + [58] = sd_cmd_illegal, + [59] = sd_cmd_illegal, + }, +};
[PATCH v2 14/25] hw/sd: Basis for eMMC support
From: Philippe Mathieu-Daudé The initial eMMC support from Vincent Palatin was largely reworked to match the current SD framework. Signed-off-by: Cédric Le Goater Signed-off-by: Philippe Mathieu-Daudé --- TODO: Do not inherit TYPE_SD_CARD, duplicate sd_class_init() --- hw/sd/sd.c | 42 ++ include/hw/sd/sd.h | 3 +++ 2 files changed, 45 insertions(+) diff --git a/hw/sd/sd.c b/hw/sd/sd.c index b2f16dbb73..8b178aa261 100644 --- a/hw/sd/sd.c +++ b/hw/sd/sd.c @@ -2166,6 +2166,19 @@ static const SDProto sd_proto_sd = { }, }; +static const SDProto sd_proto_emmc = { +.name = "eMMC", +.cmd = { +[0] = sd_cmd_GO_IDLE_STATE, +[5] = sd_cmd_illegal, +[19]= sd_cmd_SEND_TUNING_BLOCK, +[41]= sd_cmd_illegal, +[52 ... 54] = sd_cmd_illegal, +[58]= sd_cmd_illegal, +[59]= sd_cmd_illegal, +}, +}; + static void sd_instance_init(Object *obj) { SDState *sd = SD_CARD(obj); @@ -2284,9 +2297,38 @@ static const TypeInfo sd_info = { .instance_finalize = sd_instance_finalize, }; +static void emmc_realize(DeviceState *dev, Error **errp) +{ +SDState *sd = SD_CARD(dev); + +if (sd->spec_version < SD_PHY_SPECv3_01_VERS) { +error_setg(errp, "Minimum spec for eMMC is v3.01"); +return; +} + +sd_realize(dev, errp); +} + +static void emmc_class_init(ObjectClass *klass, void *data) +{ +DeviceClass *dc = DEVICE_CLASS(klass); +SDCardClass *sc = SD_CARD_CLASS(klass); + +dc->desc = "eMMC"; +dc->realize = emmc_realize; +sc->proto = _proto_emmc; +} + +static const TypeInfo emmc_info = { +.name = TYPE_EMMC, +.parent = TYPE_SD_CARD, +.class_init = emmc_class_init, + }; + static void sd_register_types(void) { type_register_static(_info); +type_register_static(_info); } type_init(sd_register_types) diff --git a/include/hw/sd/sd.h b/include/hw/sd/sd.h index 0d94e1f346..e52436b7a5 100644 --- a/include/hw/sd/sd.h +++ b/include/hw/sd/sd.h @@ -93,6 +93,9 @@ typedef struct { #define TYPE_SD_CARD "sd-card" OBJECT_DECLARE_TYPE(SDState, SDCardClass, SD_CARD) +#define TYPE_EMMC "emmc" +DECLARE_INSTANCE_CHECKER(SDState, EMMC, TYPE_EMMC) + struct SDCardClass { /*< private >*/ DeviceClass parent_class; -- 2.36.1
[PATCH v2 00/25] hw/sd: Rework models for eMMC support
From: Philippe Mathieu-Daudé Rebase/respin of Cédric RFC: https://lore.kernel.org/qemu-devel/20220318132824.1134400-1-...@kaod.org/ (sorry it took me so long guys...) Pushed at https://gitlab.com/philmd/qemu/-/commits/emmc-v2 I plan to queue patches 1-12 via sdmmc-next later this week. Cédric, if you are happy with this series, it should be easy to rebase your other patches on top and address the comments I left on the RFC :) Regards, Phil. Cédric Le Goater (6): hw/sd: Add sd_emmc_cmd_SEND_OP_CMD() handler hw/sd: Add sd_emmc_cmd_ALL_SEND_CID() handler hw/sd: Add sd_emmc_cmd_SEND_RELATIVE_ADDR() handler hw/sd: Add sd_emmc_cmd_APP_CMD() handler hw/sd: add sd_emmc_cmd_SEND_TUNING_BLOCK() handler hw/sd: Add sd_emmc_cmd_SEND_EXT_CSD() handler Joel Stanley (4): hw/sd: Add sd_cmd_SEND_TUNING_BLOCK() handler hw/sd: Support boot area in emmc image hw/sd: Subtract bootarea size from blk hw/sd: Add boot config support Philippe Mathieu-Daudé (13): hw/sd/sdcard: Return ILLEGAL for CMD19/CMD23 prior SD spec v3.01 hw/sd: When card is in wrong state, log which state it is hw/sd: When card is in wrong state, log which spec version is used hw/sd: Move proto_name to SDProto structure hw/sd: Introduce sd_cmd_handler type hw/sd: Add sd_cmd_illegal() handler hw/sd: Add sd_cmd_unimplemented() handler hw/sd: Add sd_cmd_GO_IDLE_STATE() handler hw/sd: Add sd_cmd_SEND_OP_CMD() handler hw/sd: Add sd_cmd_ALL_SEND_CID() handler hw/sd: Add sd_cmd_SEND_RELATIVE_ADDR() handler hw/sd: Add sd_cmd_SET_BLOCK_COUNT() handler hw/sd: Basis for eMMC support Sai Pavan Boddu (2): hw/sd: Add CMD21 tuning sequence hw/sd: Add mmc switch function support hw/sd/sd.c | 645 + hw/sd/sdmmc-internal.c | 2 +- hw/sd/sdmmc-internal.h | 97 +++ include/hw/sd/sd.h | 7 + 4 files changed, 627 insertions(+), 124 deletions(-) -- 2.36.1
Re: [RFC PATCH 11/17] hw/sd: Add eMMC support
On 18/3/22 14:28, Cédric Le Goater wrote: The initial eMMC support from Vincent Palatin was largely reworked to match the current SD framework. The parameters mimick a real 4GB eMMC, but it can be set to various sizes. This adds a new QOM object class for EMMC devices. Signed-off-by: Vincent Palatin Link: https://lore.kernel.org/r/1311635951-11047-5-git-send-email-vpala...@chromium.org [ jms: - Forward ported to QEMU 5.2 ] Signed-off-by: Joel Stanley [ clg: - ported on aspeed-7.0 patchset - HPI activation ] Signed-off-by: Cédric Le Goater --- hw/sd/sdmmc-internal.h | 97 +++ include/hw/sd/sd.h | 9 ++ hw/sd/sd.c | 205 - hw/sd/sdmmc-internal.c | 2 +- 4 files changed, 311 insertions(+), 2 deletions(-) static void sd_instance_init(Object *obj) { SDState *sd = SD_CARD(obj); @@ -2162,10 +2338,19 @@ static void sd_instance_finalize(Object *obj) static void sd_realize(DeviceState *dev, Error **errp) { SDState *sd = SD_CARD(dev); +SDCardClass *sc = SD_CARD_GET_CLASS(sd); int ret; sd->proto = sd->spi ? _proto_spi : _proto_sd; +if (sc->proto) { +sd->proto = sc->proto; +} + +if (sc->spec_version) { +sd->spec_version = sc->spec_version; +} + switch (sd->spec_version) { case SD_PHY_SPECv1_10_VERS ... SD_PHY_SPECv3_01_VERS: Instead I'd use: -- >8 -- @@ -2301,14 +2297,26 @@ static const TypeInfo sd_info = { .instance_finalize = sd_instance_finalize, }; +static void emmc_realize(DeviceState *dev, Error **errp) +{ +SDState *sd = SD_CARD(dev); + +if (sd->spec_version < SD_PHY_SPECv3_01_VERS) { +error_setg(errp, "Minimum spec for eMMC is v3.01"); +return; +} + +sd_realize(dev, errp); +} + static void emmc_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); SDCardClass *sc = SD_CARD_CLASS(klass); dc->desc = "eMMC"; +dc->realize = emmc_realize; sc->proto = _proto_emmc; } ---
Re: [RFC PATCH 11/17] hw/sd: Add eMMC support
On 18/3/22 14:28, Cédric Le Goater wrote: The initial eMMC support from Vincent Palatin was largely reworked to match the current SD framework. The parameters mimick a real 4GB eMMC, but it can be set to various sizes. This adds a new QOM object class for EMMC devices. Signed-off-by: Vincent Palatin Link: https://lore.kernel.org/r/1311635951-11047-5-git-send-email-vpala...@chromium.org [ jms: - Forward ported to QEMU 5.2 ] Signed-off-by: Joel Stanley [ clg: - ported on aspeed-7.0 patchset - HPI activation ] Signed-off-by: Cédric Le Goater --- hw/sd/sdmmc-internal.h | 97 +++ include/hw/sd/sd.h | 9 ++ hw/sd/sd.c | 205 - hw/sd/sdmmc-internal.c | 2 +- 4 files changed, 311 insertions(+), 2 deletions(-) +static void emmc_class_init(ObjectClass *klass, void *data) +{ +DeviceClass *dc = DEVICE_CLASS(klass); +SDCardClass *sc = SD_CARD_CLASS(klass); + +dc->desc = "eMMC"; +sc->proto = _proto_emmc; +sc->spec_version = SD_PHY_SPECv3_01_VERS; /* eMMC requirement */ +sc->set_csd = sd_emmc_set_csd; +} + +static const TypeInfo emmc_info = { +.name = TYPE_EMMC, +.parent = TYPE_SD_CARD, Hmm this is odd to have the model inheriting features from SD_CARD but then behaving differently (one could enumerate QDEV objects implementing TYPE_SD_CARD then use them expecting they match the SD card protocol). Why do you need to have TYPE_SD_CARD as parent? Could we simply duplicate sd_class_init() assignations instead? That would likely make it easier to modify eMMC handlers. +.class_init = emmc_class_init, + };
Re: [RFC PATCH 11/17] hw/sd: Add eMMC support
Hi Cédric, On 18/3/22 14:28, Cédric Le Goater wrote: The initial eMMC support from Vincent Palatin was largely reworked to match the current SD framework. The parameters mimick a real 4GB eMMC, but it can be set to various sizes. This adds a new QOM object class for EMMC devices. Signed-off-by: Vincent Palatin Link: https://lore.kernel.org/r/1311635951-11047-5-git-send-email-vpala...@chromium.org [ jms: - Forward ported to QEMU 5.2 ] Signed-off-by: Joel Stanley [ clg: - ported on aspeed-7.0 patchset - HPI activation ] Signed-off-by: Cédric Le Goater --- hw/sd/sdmmc-internal.h | 97 +++ include/hw/sd/sd.h | 9 ++ hw/sd/sd.c | 205 - hw/sd/sdmmc-internal.c | 2 +- 4 files changed, 311 insertions(+), 2 deletions(-) +static const SDProto sd_proto_emmc = { What about renaming as: ... emmc_proto = { +.name = "eMMC", +.cmd = { +[0] = sd_cmd_GO_IDLE_STATE, +[1] = sd_emmc_cmd_SEND_OP_CMD, = emmc_cmd_SEND_OP_CMD, +[2] = sd_emmc_cmd_ALL_SEND_CID, ... ? +[3] = sd_emmc_cmd_SEND_RELATIVE_ADDR, +[5] = sd_cmd_illegal, +[8] = sd_emmc_cmd_SEND_EXT_CSD, +[19]= sd_cmd_SEND_TUNING_BLOCK, +[21]= sd_emmc_cmd_SEND_TUNING_BLOCK, +[41]= sd_cmd_illegal, +[52 ... 54] = sd_cmd_illegal, +[55]= sd_emmc_cmd_APP_CMD, +[58]= sd_cmd_illegal, +[59]= sd_cmd_illegal, +}, +};
Re: [RFC PATCH 11/17] hw/sd: Add eMMC support
On 5/10/22 09:15, Cédric Le Goater wrote: [ ... ] Do you mind splitting as: - Add TYPE_EMMC, emmc_class_init and sd_proto_emmc[] with already existing handlers (1 patch) - Add new handlers, from smaller to sd_emmc_set_csd(), and finally mmc_set_ext_csd() with the EXT_CSD definitions (various patches). Sure, I will reorganize the patchset. It will ease the review. I just did in https://github.com/legoater/qemu/commits/aspeed-7.1 The commit logs need more information, at least a reference to the specs. Otherwise LGTM! What is your test suite? Not simple. Get the latest FW images for the rainier platform from : https://jenkins.openbmc.org/view/latest/job/latest-master/label=docker-builder,target=p10bmc/lastSuccessfulBuild/artifact/openbmc/build/tmp/deploy/images/p10bmc/ and build a bootable eMMC with such a sequence : dd of=$mmc if=/dev/zero bs=1M count=128 dd of=$mmc if=${fw_dir}/u-boot-spl.bin conv=notrunc dd of=$mmc if=${fw_dir}/u-boot.bin conv=notrunc bs=1K seek=64 dd of=$mmc if=${fw_dir}/u-boot-env.bin conv=notrunc bs=1K seek=$((896 + 64)) xzdec $wicxz | dd status=progress of=$mmc conv=notrunc bs=1M seek=2 truncate --size 16G $mmc We could have a smaller image with a buildroot rootfs. Then, boot with: qemu-system-arm -M rainier-bmc -net nic,netdev=net0 -netdev user \ -drive file=$mmc.qcow2,format=qcow2,if=sd,id=sd0,index=2 and you will need my branch for that. Thanks, C. The Aspeed machines (AST2600) can boot from flash or eMMC and the above command line does the trick. It is not optimal. Thanks, C.
Re: [RFC PATCH 11/17] hw/sd: Add eMMC support
[ ... ] Do you mind splitting as: - Add TYPE_EMMC, emmc_class_init and sd_proto_emmc[] with already existing handlers (1 patch) - Add new handlers, from smaller to sd_emmc_set_csd(), and finally mmc_set_ext_csd() with the EXT_CSD definitions (various patches). Sure, I will reorganize the patchset. It will ease the review. Otherwise LGTM! What is your test suite? Not simple. Get the latest FW images for the rainier platform from : https://jenkins.openbmc.org/view/latest/job/latest-master/label=docker-builder,target=p10bmc/lastSuccessfulBuild/artifact/openbmc/build/tmp/deploy/images/p10bmc/ and build a bootable eMMC with such a sequence : dd of=$mmc if=/dev/zero bs=1M count=128 dd of=$mmc if=${fw_dir}/u-boot-spl.bin conv=notrunc dd of=$mmc if=${fw_dir}/u-boot.bin conv=notrunc bs=1K seek=64 dd of=$mmc if=${fw_dir}/u-boot-env.bin conv=notrunc bs=1K seek=$((896 + 64)) xzdec $wicxz | dd status=progress of=$mmc conv=notrunc bs=1M seek=2 truncate --size 16G $mmc We could have a smaller image with a buildroot rootfs. Then, boot with: qemu-system-arm -M rainier-bmc -net nic,netdev=net0 -netdev user \ -drive file=$mmc.qcow2,format=qcow2,if=sd,id=sd0,index=2 The Aspeed machines (AST2600) can boot from flash or eMMC and the above command line does the trick. It is not optimal. Thanks, C.
Re: [RFC PATCH 11/17] hw/sd: Add eMMC support
Hi Cédric, On 18/3/22 14:28, Cédric Le Goater wrote: The initial eMMC support from Vincent Palatin was largely reworked to match the current SD framework. The parameters mimick a real 4GB eMMC, but it can be set to various sizes. This adds a new QOM object class for EMMC devices. Signed-off-by: Vincent Palatin Link: https://lore.kernel.org/r/1311635951-11047-5-git-send-email-vpala...@chromium.org [ jms: - Forward ported to QEMU 5.2 ] Signed-off-by: Joel Stanley [ clg: - ported on aspeed-7.0 patchset - HPI activation ] Signed-off-by: Cédric Le Goater --- hw/sd/sdmmc-internal.h | 97 +++ include/hw/sd/sd.h | 9 ++ hw/sd/sd.c | 205 - hw/sd/sdmmc-internal.c | 2 +- 4 files changed, 311 insertions(+), 2 deletions(-) Do you mind splitting as: - Add TYPE_EMMC, emmc_class_init and sd_proto_emmc[] with already existing handlers (1 patch) - Add new handlers, from smaller to sd_emmc_set_csd(), and finally mmc_set_ext_csd() with the EXT_CSD definitions (various patches). Otherwise LGTM! What is your test suite? Thanks, Phil.
Re: [RFC PATCH 00/17] hw/sd: Rework models for eMMC support
Hello, On 3/18/22 14:28, Cédric Le Goater wrote: Hello Philippe, I am restarting the discussion we started in : http://patchwork.ozlabs.org/project/qemu-devel/list/?series=250563 This series adds an extension for a new eMMC device using the framework you put in place. It's not perfect but we are getting close. The SPI variant would need its own class I suppose and there are more cleanups to be done in the set of commands. Please comment ! Since patch 01-09 are nearly all reviewed, may be we could start by merging those ? Thanks, C.
Re: [RFC PATCH 11/17] hw/sd: Add eMMC support
Hello Jerome, On 3/28/22 14:10, Jerome Forissier wrote: Hi Cédric, On 3/18/22 14:28, Cédric Le Goater wrote: The initial eMMC support from Vincent Palatin was largely reworked to match the current SD framework. The parameters mimick a real 4GB eMMC, but it can be set to various sizes. This adds a new QOM object class for EMMC devices. That is interesting. This series is really a pre-pre-alpha-0. It's a mixed of changes from Joel and I on top of Vincent Palatin patches sent ~10 years ago. I reworked them recently to take into account a proposal of Philippe to improve the sd models and possibly add eMMC support. They are good enough to boot a rainier-bmc board. Is RPMB emulation implemented? I doesn't look like so, although... no. it's not. +sd->ext_csd[EXT_CSD_RPMB_MULT] = 0x1; /* RPMB size */ ...this indicates that the device has one block (128 KB) of RPMB if I'm not mistaken. I would be quite interested in testing and possibly helping out implement RPMB, although I must admit don't know much about QEMU internals. I have written some quick & dirty emulation code for RPMB at the Linux ioctl() level, see [1]. This code is useful for CI testing of the OP-TEE OS project [2], but having a lower level emulation in QEMU would be much better since the Linux kernel would "see" the device and report it in sysfs etc. [1] https://github.com/OP-TEE/optee_client/blob/3.16.0/tee-supplicant/src/rpmb.c#L494-L571 [2] https://github.com/OP-TEE/optee_os/ You can give these patches a try using this branch: https://github.com/legoater/qemu/commits/aspeed-7.0 Using the above QEMU, I would run a rainier-bmc machine which requires eMMC support : qemu-system-arm -M rainier-bmc \ -nic user,mac=C0:FF:EE:00:00:02,hostfwd=::-:22 \ -drive file=/path/to/mmc-p10bmc.qcow2,format=qcow2,if=sd,id=sd0,index=2 \ -nographic -nodefaults -snapshot -serial mon:stdio The bootable qcow2 image : https://www.kaod.org/qemu/aspeed/mmc-p10bmc.qcow2 was created from : https://jenkins.openbmc.org/view/latest/job/latest-master/label=docker-builder,target=p10bmc/lastSuccessfulBuild/artifact/openbmc/build/tmp/deploy/images/p10bmc/ Booting from the eMMC is a topic by itself but instead of booting from the eMMC, I would use a custom kernel and userspace. Compile an AST2600 kernel or grab : https://www.kaod.org/qemu/aspeed/zImage https://www.kaod.org/qemu/aspeed/aspeed-bmc-ibm-rainier.dtb Compile a buildroot image or grab : https://www.kaod.org/qemu/aspeed/rootfs.cpio.xz and run : qemu-system-arm -M rainier-bmc \ -kernel /path/to/linux/build_ast2600/arch/arm/boot/zImage \ -initrd /path/to/rootfs.cpio.xz \ -dtb /path/to/linux/build_ast2600/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dtb \ -append 'console=ttyS4,115200n8 root=/dev/ram ro' \ -nic user,mac=C0:FF:EE:00:00:02,hostfwd=::-:22 \ -drive file=/path/to/mmc-p10bmc.qcow2,format=qcow2,if=sd,id=sd0,index=2 \ -nographic -nodefaults -serial mon:stdio root/0penBmc to login. From there, modify the kernel and the buildroot image, you can scp some binary, do your testing and possibly send patches to improve QEMU support ! C.
Re: [RFC PATCH 11/17] hw/sd: Add eMMC support
Hi Cédric, On 3/18/22 14:28, Cédric Le Goater wrote: > The initial eMMC support from Vincent Palatin was largely reworked to > match the current SD framework. The parameters mimick a real 4GB eMMC, > but it can be set to various sizes. > > This adds a new QOM object class for EMMC devices. That is interesting. Is RPMB emulation implemented? I doesn't look like so, although... > +sd->ext_csd[EXT_CSD_RPMB_MULT] = 0x1; /* RPMB size */ ...this indicates that the device has one block (128 KB) of RPMB if I'm not mistaken. I would be quite interested in testing and possibly helping out implement RPMB, although I must admit don't know much about QEMU internals. I have written some quick & dirty emulation code for RPMB at the Linux ioctl() level, see [1]. This code is useful for CI testing of the OP-TEE OS project [2], but having a lower level emulation in QEMU would be much better since the Linux kernel would "see" the device and report it in sysfs etc. [1] https://github.com/OP-TEE/optee_client/blob/3.16.0/tee-supplicant/src/rpmb.c#L494-L571 [2] https://github.com/OP-TEE/optee_os/ Thanks, -- Jerome
[RFC PATCH 00/17] hw/sd: Rework models for eMMC support
Hello Philippe, I am restarting the discussion we started in : http://patchwork.ozlabs.org/project/qemu-devel/list/?series=250563 This series adds an extension for a new eMMC device using the framework you put in place. It's not perfect but we are getting close. The SPI variant would need its own class I suppose and there are more cleanups to be done in the set of commands. Please comment ! Thanks, C. Cédric Le Goater (2): hw/sd: Add eMMC support hw/sd: Fix SET_BLOCK_COUNT command argument Joel Stanley (3): hw/sd: Add sd_cmd_SEND_TUNING_BLOCK() handler hw/sd: Support boot area in emmc image hw/sd: Subtract bootarea size from blk Philippe Mathieu-Daudé (9): hw/sd: When card is in wrong state, log which state it is hw/sd: Move proto_name to SDProto structure hw/sd: Introduce sd_cmd_handler type hw/sd: Add sd_cmd_illegal() handler hw/sd: Add sd_cmd_unimplemented() handler hw/sd: Add sd_cmd_GO_IDLE_STATE() handler hw/sd: Add sd_cmd_SEND_OP_CMD() handler hw/sd: Add sd_cmd_ALL_SEND_CID() handler hw/sd: Add sd_cmd_SEND_RELATIVE_ADDR() handler Sai Pavan Boddu (3): hw/sd: Update CMD1 definition for MMC hw/sd: Add CMD21 tuning sequence hw/sd: Add mmc switch function support hw/sd/sdmmc-internal.h | 97 +++ include/hw/sd/sd.h | 10 + hw/sd/sd.c | 585 + hw/sd/sdmmc-internal.c | 2 +- 4 files changed, 583 insertions(+), 111 deletions(-) -- 2.34.1
[RFC PATCH 11/17] hw/sd: Add eMMC support
The initial eMMC support from Vincent Palatin was largely reworked to match the current SD framework. The parameters mimick a real 4GB eMMC, but it can be set to various sizes. This adds a new QOM object class for EMMC devices. Signed-off-by: Vincent Palatin Link: https://lore.kernel.org/r/1311635951-11047-5-git-send-email-vpala...@chromium.org [ jms: - Forward ported to QEMU 5.2 ] Signed-off-by: Joel Stanley [ clg: - ported on aspeed-7.0 patchset - HPI activation ] Signed-off-by: Cédric Le Goater --- hw/sd/sdmmc-internal.h | 97 +++ include/hw/sd/sd.h | 9 ++ hw/sd/sd.c | 205 - hw/sd/sdmmc-internal.c | 2 +- 4 files changed, 311 insertions(+), 2 deletions(-) diff --git a/hw/sd/sdmmc-internal.h b/hw/sd/sdmmc-internal.h index d8bf17d204fc..2b98f117cd8f 100644 --- a/hw/sd/sdmmc-internal.h +++ b/hw/sd/sdmmc-internal.h @@ -37,4 +37,101 @@ const char *sd_cmd_name(uint8_t cmd); */ const char *sd_acmd_name(uint8_t cmd); +/* + * EXT_CSD fields + */ + +#define EXT_CSD_CMDQ_MODE_EN15 /* R/W */ +#define EXT_CSD_FLUSH_CACHE 32 /* W */ +#define EXT_CSD_CACHE_CTRL 33 /* R/W */ +#define EXT_CSD_POWER_OFF_NOTIFICATION 34 /* R/W */ +#define EXT_CSD_PACKED_FAILURE_INDEX35 /* RO */ +#define EXT_CSD_PACKED_CMD_STATUS 36 /* RO */ +#define EXT_CSD_EXP_EVENTS_STATUS 54 /* RO, 2 bytes */ +#define EXT_CSD_EXP_EVENTS_CTRL 56 /* R/W, 2 bytes */ +#define EXT_CSD_DATA_SECTOR_SIZE61 /* R */ +#define EXT_CSD_GP_SIZE_MULT143 /* R/W */ +#define EXT_CSD_PARTITION_SETTING_COMPLETED 155 /* R/W */ +#define EXT_CSD_PARTITION_ATTRIBUTE 156 /* R/W */ +#define EXT_CSD_PARTITION_SUPPORT 160 /* RO */ +#define EXT_CSD_HPI_MGMT161 /* R/W */ +#define EXT_CSD_RST_N_FUNCTION 162 /* R/W */ +#define EXT_CSD_BKOPS_EN163 /* R/W */ +#define EXT_CSD_BKOPS_START 164 /* W */ +#define EXT_CSD_SANITIZE_START 165 /* W */ +#define EXT_CSD_WR_REL_PARAM166 /* RO */ +#define EXT_CSD_RPMB_MULT 168 /* RO */ +#define EXT_CSD_FW_CONFIG 169 /* R/W */ +#define EXT_CSD_BOOT_WP 173 /* R/W */ +#define EXT_CSD_ERASE_GROUP_DEF 175 /* R/W */ +#define EXT_CSD_PART_CONFIG 179 /* R/W */ +#define EXT_CSD_ERASED_MEM_CONT 181 /* RO */ +#define EXT_CSD_BUS_WIDTH 183 /* R/W */ +#define EXT_CSD_STROBE_SUPPORT 184 /* RO */ +#define EXT_CSD_HS_TIMING 185 /* R/W */ +#define EXT_CSD_POWER_CLASS 187 /* R/W */ +#define EXT_CSD_REV 192 /* RO */ +#define EXT_CSD_STRUCTURE 194 /* RO */ +#define EXT_CSD_CARD_TYPE 196 /* RO */ +#define EXT_CSD_DRIVER_STRENGTH 197 /* RO */ +#define EXT_CSD_OUT_OF_INTERRUPT_TIME 198 /* RO */ +#define EXT_CSD_PART_SWITCH_TIME199 /* RO */ +#define EXT_CSD_PWR_CL_52_195 200 /* RO */ +#define EXT_CSD_PWR_CL_26_195 201 /* RO */ +#define EXT_CSD_PWR_CL_52_360 202 /* RO */ +#define EXT_CSD_PWR_CL_26_360 203 /* RO */ +#define EXT_CSD_SEC_CNT 212 /* RO, 4 bytes */ +#define EXT_CSD_S_A_TIMEOUT 217 /* RO */ +#define EXT_CSD_S_C_VCCQ219 /* RO */ +#define EXT_CSD_S_C_VCC 220 /* RO */ +#define EXT_CSD_REL_WR_SEC_C222 /* RO */ +#define EXT_CSD_HC_WP_GRP_SIZE 221 /* RO */ +#define EXT_CSD_ERASE_TIMEOUT_MULT 223 /* RO */ +#define EXT_CSD_HC_ERASE_GRP_SIZE 224 /* RO */ +#define EXT_CSD_ACC_SIZE225 /* RO */ +#define EXT_CSD_BOOT_MULT 226 /* RO */ +#define EXT_CSD_BOOT_INFO 228 /* RO */ +#define EXT_CSD_SEC_TRIM_MULT 229 /* RO */ +#define EXT_CSD_SEC_ERASE_MULT 230 /* RO */ +#define EXT_CSD_SEC_FEATURE_SUPPORT 231 /* RO */ +#define EXT_CSD_TRIM_MULT 232 /* RO */ +#define EXT_CSD_PWR_CL_200_195 236 /* RO */ +#define EXT_CSD_PWR_CL_200_360 237 /* RO */ +#define EXT_CSD_PWR_CL_DDR_52_195 238 /* RO */ +#define EXT_CSD_PWR_CL_DDR_52_360 239 /* RO */ +#define EXT_CSD_BKOPS_STATUS246 /* RO */ +#define EXT_CSD_POWER_OFF_LONG_TIME 247 /* RO */ +#define EXT_CSD_GENERIC_CMD6_TIME 248 /* RO */ +#define EXT_CSD_CACHE_SIZE 249 /* RO, 4 bytes */ +#define EXT_CSD_PWR_CL_DDR_200_360 253 /* RO */ +#define EXT_CSD_FIRMWARE_VERSION254 /* RO, 8 bytes */ +#define EXT_CSD_PRE_EOL_INFO267 /* RO */ +#define EXT_CSD_DEVICE_LIFE_TIME_EST_TYP_A 268 /* RO */ +#define EXT_CSD_DEVICE_LIFE_TIME_EST_TYP_B
Re: [PATCH v3 00/21] eMMC support
Hello, Adding the SD maintainers for more feedback. Thanks, C. On 2/28/21 8:33 PM, Sai Pavan Boddu wrote: > Hi, > > This patch series add support for eMMC cards. This work was previosly > submitted by Vincent, rebased few changes on top. > > Cedric & Joel has helped to added boot partition access support. I > expect them to make a follow-up series to use it with aspeed machines.> > Present series adds eMMC support to Versal SOC. > > Initial patch series version is RFC > Changes for V2: > Split Patch 1 > Add comments for eMMC Erase commands > Added documentation about eMMC and Versal-virt board. > Make eMMC optional for xlnx-versal-virt machines > Changes for V3: > Revome addition of EMMC drive flag > Add TYPE_EMMC device > Add id strings for shci instances > Update versal doc with eMMC example > Fix signed-off-by lines for few patches > > Cédric Le Goater (1): > sd: sdmmc-internal: Add command string for SEND_OP_CMD > > Joel Stanley (2): > sd: emmc: Support boot area in emmc image > sd: emmc: Subtract bootarea size from blk > > Sai Pavan Boddu (14): > sd: sd: Remove usage of tabs in the file > sd: emmc: Add support for eMMC cards > sd: emmc: Dont not update CARD_CAPACITY for eMMC cards > sd: emmc: Update CMD1 definition for eMMC > sd: emmc: support idle state in CMD2 > sd: emmc: Add mmc switch function support > sd: emmc: add CMD21 tuning sequence > sd: emmc: Make ACMD41 illegal for mmc > sd: emmc: Add support for emmc erase > sd: emmc: Update CID structure for eMMC > sd: sdhci: Support eMMC devices > arm: xlnx-versal: Add emmc to versal > docs: devel: emmc: Add a doc for emmc card emulation > docs: arm: xlnx-versal-virt: Add eMMC support documentation > > Vincent Palatin (4): > sd: emmc: Update SET_RELATIVE_ADDR command > sd: emmc: update OCR fields for eMMC > sd: emmc: Add support for EXT_CSD & CSD for eMMC > sd: emmc: Update CMD8 to send EXT_CSD register > > docs/devel/emmc.txt | 16 + > docs/system/arm/xlnx-versal-virt.rst | 14 + > hw/sd/sdmmc-internal.h | 97 ++ > include/hw/arm/xlnx-versal.h | 1 + > include/hw/sd/sd.h | 2 + > hw/arm/xlnx-versal-virt.c| 29 +- > hw/arm/xlnx-versal.c | 14 +- > hw/sd/sd.c | 563 > ++- > hw/sd/sdhci.c| 4 - > hw/sd/sdmmc-internal.c | 2 +- > 10 files changed, 594 insertions(+), 148 deletions(-) > create mode 100644 docs/devel/emmc.txt >
Re: [PATCH v3 16/21] sd: emmc: Support boot area in emmc image
On 2/28/21 8:33 PM, Sai Pavan Boddu wrote: > From: Joel Stanley > > This assumes a specially constructued image: > > dd if=/dev/zero of=mmc-bootarea.img count=2 bs=1M > dd if=u-boot-spl.bin of=mmc-bootarea.img conv=notrunc > dd if=u-boot.bin of=mmc-bootarea.img conv=notrunc count=64 bs=1K > cat mmc-bootarea.img obmc-phosphor-image.wic > mmc.img > truncate --size 16GB mmc.img > truncate --size 128MB mmc-bootarea.img > > Signed-off-by: Joel Stanley > [clg: - changes on the definition names ] > Signed-off-by: Cédric Le Goater > [spb: use data_start property to access right emmc partition, > Clean up PARTITION_ENABLE support as incomplete, > Fix commit message to be generic.] > Signed-off-by: Sai Pavan Boddu > --- > hw/sd/sd.c | 40 > 1 file changed, 40 insertions(+) > > diff --git a/hw/sd/sd.c b/hw/sd/sd.c > index 08b77ad..d311477 100644 > --- a/hw/sd/sd.c > +++ b/hw/sd/sd.c > @@ -1044,6 +1044,34 @@ static void sd_lock_command(SDState *sd) > sd->card_status &= ~CARD_IS_LOCKED; > } > > +/* > + * This requires a disk image that has two boot partitions inserted at the > + * beginning of it. The size of the boot partitions are configured in the > + * ext_csd structure, which is hardcoded in qemu. They are currently set to > + * 1MB each. > + */ > +static uint32_t sd_bootpart_offset(SDState *sd) > +{ > +unsigned int access = sd->ext_csd[EXT_CSD_PART_CONFIG] & > +EXT_CSD_PART_CONFIG_ACC_MASK; > +unsigned int boot_capacity = sd->ext_csd[EXT_CSD_BOOT_MULT] << 17; > + > +if (!sd->emmc) { > +return 0; > +} > + > +switch (access) { > +case EXT_CSD_PART_CONFIG_ACC_DEFAULT: > +return boot_capacity * 2; > +case EXT_CSD_PART_CONFIG_ACC_BOOT0: > +return 0; > +case EXT_CSD_PART_CONFIG_ACC_BOOT0 + 1: > +return boot_capacity * 1; > +default: > + g_assert_not_reached(); > +} > +} > + > static sd_rsp_type_t sd_normal_command(SDState *sd, SDRequest req) > { > uint32_t rca = 0x; > @@ -1359,6 +1387,9 @@ static sd_rsp_type_t sd_normal_command(SDState *sd, > SDRequest req) > return sd_r1; > } > > +if (sd->emmc) { > +addr += sd_bootpart_offset(sd); This could be a class handler. The default behavior would be to return 0. C. > +} > sd->state = sd_sendingdata_state; > sd->data_start = addr; > sd->data_offset = 0; > @@ -1378,6 +1409,9 @@ static sd_rsp_type_t sd_normal_command(SDState *sd, > SDRequest req) > return sd_r1; > } > > +if (sd->emmc) { > +addr += sd_bootpart_offset(sd); > +} > sd->state = sd_sendingdata_state; > sd->data_start = addr; > sd->data_offset = 0; > @@ -1434,6 +1468,9 @@ static sd_rsp_type_t sd_normal_command(SDState *sd, > SDRequest req) > return sd_r1; > } > > +if (sd->emmc) { > +addr += sd_bootpart_offset(sd); > +} > sd->state = sd_receivingdata_state; > sd->data_start = addr; > sd->data_offset = 0; > @@ -1464,6 +1501,9 @@ static sd_rsp_type_t sd_normal_command(SDState *sd, > SDRequest req) > return sd_r1; > } > > +if (sd->emmc) { > +addr += sd_bootpart_offset(sd); > +} > sd->state = sd_receivingdata_state; > sd->data_start = addr; > sd->data_offset = 0; >
[PATCH v3 16/21] sd: emmc: Support boot area in emmc image
From: Joel Stanley This assumes a specially constructued image: dd if=/dev/zero of=mmc-bootarea.img count=2 bs=1M dd if=u-boot-spl.bin of=mmc-bootarea.img conv=notrunc dd if=u-boot.bin of=mmc-bootarea.img conv=notrunc count=64 bs=1K cat mmc-bootarea.img obmc-phosphor-image.wic > mmc.img truncate --size 16GB mmc.img truncate --size 128MB mmc-bootarea.img Signed-off-by: Joel Stanley [clg: - changes on the definition names ] Signed-off-by: Cédric Le Goater [spb: use data_start property to access right emmc partition, Clean up PARTITION_ENABLE support as incomplete, Fix commit message to be generic.] Signed-off-by: Sai Pavan Boddu --- hw/sd/sd.c | 40 1 file changed, 40 insertions(+) diff --git a/hw/sd/sd.c b/hw/sd/sd.c index 08b77ad..d311477 100644 --- a/hw/sd/sd.c +++ b/hw/sd/sd.c @@ -1044,6 +1044,34 @@ static void sd_lock_command(SDState *sd) sd->card_status &= ~CARD_IS_LOCKED; } +/* + * This requires a disk image that has two boot partitions inserted at the + * beginning of it. The size of the boot partitions are configured in the + * ext_csd structure, which is hardcoded in qemu. They are currently set to + * 1MB each. + */ +static uint32_t sd_bootpart_offset(SDState *sd) +{ +unsigned int access = sd->ext_csd[EXT_CSD_PART_CONFIG] & +EXT_CSD_PART_CONFIG_ACC_MASK; +unsigned int boot_capacity = sd->ext_csd[EXT_CSD_BOOT_MULT] << 17; + +if (!sd->emmc) { +return 0; +} + +switch (access) { +case EXT_CSD_PART_CONFIG_ACC_DEFAULT: +return boot_capacity * 2; +case EXT_CSD_PART_CONFIG_ACC_BOOT0: +return 0; +case EXT_CSD_PART_CONFIG_ACC_BOOT0 + 1: +return boot_capacity * 1; +default: + g_assert_not_reached(); +} +} + static sd_rsp_type_t sd_normal_command(SDState *sd, SDRequest req) { uint32_t rca = 0x; @@ -1359,6 +1387,9 @@ static sd_rsp_type_t sd_normal_command(SDState *sd, SDRequest req) return sd_r1; } +if (sd->emmc) { +addr += sd_bootpart_offset(sd); +} sd->state = sd_sendingdata_state; sd->data_start = addr; sd->data_offset = 0; @@ -1378,6 +1409,9 @@ static sd_rsp_type_t sd_normal_command(SDState *sd, SDRequest req) return sd_r1; } +if (sd->emmc) { +addr += sd_bootpart_offset(sd); +} sd->state = sd_sendingdata_state; sd->data_start = addr; sd->data_offset = 0; @@ -1434,6 +1468,9 @@ static sd_rsp_type_t sd_normal_command(SDState *sd, SDRequest req) return sd_r1; } +if (sd->emmc) { +addr += sd_bootpart_offset(sd); +} sd->state = sd_receivingdata_state; sd->data_start = addr; sd->data_offset = 0; @@ -1464,6 +1501,9 @@ static sd_rsp_type_t sd_normal_command(SDState *sd, SDRequest req) return sd_r1; } +if (sd->emmc) { +addr += sd_bootpart_offset(sd); +} sd->state = sd_receivingdata_state; sd->data_start = addr; sd->data_offset = 0; -- 2.7.4
[PATCH v3 21/21] docs: arm: xlnx-versal-virt: Add eMMC support documentation
Add details of eMMC specific machine property and example for passing eMMC device. Signed-off-by: Sai Pavan Boddu --- docs/system/arm/xlnx-versal-virt.rst | 14 ++ 1 file changed, 14 insertions(+) diff --git a/docs/system/arm/xlnx-versal-virt.rst b/docs/system/arm/xlnx-versal-virt.rst index 2602d0f..d1099fa 100644 --- a/docs/system/arm/xlnx-versal-virt.rst +++ b/docs/system/arm/xlnx-versal-virt.rst @@ -29,6 +29,7 @@ Implemented devices: - 2 GEMs (Cadence MACB Ethernet MACs) - 8 ADMA (Xilinx zDMA) channels - 2 SD Controllers +* SDHCI0 can be configured as eMMC - OCM (256KB of On Chip Memory) - DDR memory @@ -43,6 +44,19 @@ Other differences between the hardware and the QEMU model: - QEMU provides 8 virtio-mmio virtio transports; these start at address ``0xa000`` and have IRQs from 111 and upwards. +Enabling eMMC +" +In order to enable eMMC pass the following machine property "emmc=on". +ex: +"-M xlnx-versal-virt,emmc=on" + +Above switch would configure SDHCI0 to accept eMMC. More details on eMMC +emulation can be found in docs/devel/emmc.txt. + +Below is the command to pass eMMC device. +"-drive file=emmc.img,if=none,id=emmc,format=raw + -device emmc,drive=emmc,id=emmc0,bus=/sdhci0/sd-bus" + Running """ If the user provides an Operating System to be loaded, we expect users -- 2.7.4
[PATCH v3 00/21] eMMC support
Hi, This patch series add support for eMMC cards. This work was previosly submitted by Vincent, rebased few changes on top. Cedric & Joel has helped to added boot partition access support. I expect them to make a follow-up series to use it with aspeed machines. Present series adds eMMC support to Versal SOC. Initial patch series version is RFC Changes for V2: Split Patch 1 Add comments for eMMC Erase commands Added documentation about eMMC and Versal-virt board. Make eMMC optional for xlnx-versal-virt machines Changes for V3: Revome addition of EMMC drive flag Add TYPE_EMMC device Add id strings for shci instances Update versal doc with eMMC example Fix signed-off-by lines for few patches Cédric Le Goater (1): sd: sdmmc-internal: Add command string for SEND_OP_CMD Joel Stanley (2): sd: emmc: Support boot area in emmc image sd: emmc: Subtract bootarea size from blk Sai Pavan Boddu (14): sd: sd: Remove usage of tabs in the file sd: emmc: Add support for eMMC cards sd: emmc: Dont not update CARD_CAPACITY for eMMC cards sd: emmc: Update CMD1 definition for eMMC sd: emmc: support idle state in CMD2 sd: emmc: Add mmc switch function support sd: emmc: add CMD21 tuning sequence sd: emmc: Make ACMD41 illegal for mmc sd: emmc: Add support for emmc erase sd: emmc: Update CID structure for eMMC sd: sdhci: Support eMMC devices arm: xlnx-versal: Add emmc to versal docs: devel: emmc: Add a doc for emmc card emulation docs: arm: xlnx-versal-virt: Add eMMC support documentation Vincent Palatin (4): sd: emmc: Update SET_RELATIVE_ADDR command sd: emmc: update OCR fields for eMMC sd: emmc: Add support for EXT_CSD & CSD for eMMC sd: emmc: Update CMD8 to send EXT_CSD register docs/devel/emmc.txt | 16 + docs/system/arm/xlnx-versal-virt.rst | 14 + hw/sd/sdmmc-internal.h | 97 ++ include/hw/arm/xlnx-versal.h | 1 + include/hw/sd/sd.h | 2 + hw/arm/xlnx-versal-virt.c| 29 +- hw/arm/xlnx-versal.c | 14 +- hw/sd/sd.c | 563 ++- hw/sd/sdhci.c| 4 - hw/sd/sdmmc-internal.c | 2 +- 10 files changed, 594 insertions(+), 148 deletions(-) create mode 100644 docs/devel/emmc.txt -- 2.7.4
[PATCH v3 10/21] sd: emmc: support idle state in CMD2
eMMC is expected to be in idle-state post CMD1. Ready state is an intermediate stage which we don't come across in Device identification mode. Signed-off-by: Sai Pavan Boddu Signed-off-by: Edgar E. Iglesias Reviewed-by: Alistair Francis --- hw/sd/sd.c | 4 1 file changed, 4 insertions(+) diff --git a/hw/sd/sd.c b/hw/sd/sd.c index 054ad1e..8a7d0de 100644 --- a/hw/sd/sd.c +++ b/hw/sd/sd.c @@ -1059,6 +1059,10 @@ static sd_rsp_type_t sd_normal_command(SDState *sd, SDRequest req) if (sd->spi) goto bad_cmd; switch (sd->state) { +case sd_idle_state: +if (!sd->emmc) { +break; +} case sd_ready_state: sd->state = sd_identification_state; return sd_r2_i; -- 2.7.4
[PATCH v2 10/22] sd: emmc: support idle state in CMD2
eMMC is expected to be in idle-state post CMD1. Ready state is an intermediate stage which we don't come across in Device identification mode. Signed-off-by: Sai Pavan Boddu Signed-off-by: Edgar E. Iglesias Reviewed-by: Alistair Francis --- hw/sd/sd.c | 4 1 file changed, 4 insertions(+) diff --git a/hw/sd/sd.c b/hw/sd/sd.c index 8bc8d5d..ae5c5e8 100644 --- a/hw/sd/sd.c +++ b/hw/sd/sd.c @@ -1051,6 +1051,10 @@ static sd_rsp_type_t sd_normal_command(SDState *sd, SDRequest req) if (sd->spi) goto bad_cmd; switch (sd->state) { +case sd_idle_state: +if (!sd->emmc) { +break; +} case sd_ready_state: sd->state = sd_identification_state; return sd_r2_i; -- 2.7.4
[PATCH v2 17/22] sd: emmc: Support boot area in emmc image
From: Joel Stanley This assumes a specially constructued image: dd if=/dev/zero of=mmc-bootarea.img count=2 bs=1M dd if=u-boot-spl.bin of=mmc-bootarea.img conv=notrunc dd if=u-boot.bin of=mmc-bootarea.img conv=notrunc count=64 bs=1K cat mmc-bootarea.img obmc-phosphor-image.wic > mmc.img truncate --size 16GB mmc.img truncate --size 128MB mmc-bootarea.img Signed-off-by: Joel Stanley [clg: - changes on the definition names ] Signed-off-by: Cédric Le Goater [spb: use data_start property to access right emmc partition, Clean up PARTITION_ENABLE support as incomplete, Fix commit message to be generic.] Signed-off-by: Sai Pavan Boddu --- hw/sd/sd.c | 40 1 file changed, 40 insertions(+) diff --git a/hw/sd/sd.c b/hw/sd/sd.c index 60799aa..ab29e54 100644 --- a/hw/sd/sd.c +++ b/hw/sd/sd.c @@ -1040,6 +1040,34 @@ static void sd_lock_command(SDState *sd) sd->card_status &= ~CARD_IS_LOCKED; } +/* + * This requires a disk image that has two boot partitions inserted at the + * beginning of it. The size of the boot partitions are configured in the + * ext_csd structure, which is hardcoded in qemu. They are currently set to + * 1MB each. + */ +static uint32_t sd_bootpart_offset(SDState *sd) +{ +unsigned int access = sd->ext_csd[EXT_CSD_PART_CONFIG] & +EXT_CSD_PART_CONFIG_ACC_MASK; +unsigned int boot_capacity = sd->ext_csd[EXT_CSD_BOOT_MULT] << 17; + +if (!sd->emmc) { +return 0; +} + +switch (access) { +case EXT_CSD_PART_CONFIG_ACC_DEFAULT: +return boot_capacity * 2; +case EXT_CSD_PART_CONFIG_ACC_BOOT0: +return 0; +case EXT_CSD_PART_CONFIG_ACC_BOOT0 + 1: +return boot_capacity * 1; +default: + g_assert_not_reached(); +} +} + static sd_rsp_type_t sd_normal_command(SDState *sd, SDRequest req) { uint32_t rca = 0x; @@ -1355,6 +1383,9 @@ static sd_rsp_type_t sd_normal_command(SDState *sd, SDRequest req) return sd_r1; } +if (sd->emmc) { +addr += sd_bootpart_offset(sd); +} sd->state = sd_sendingdata_state; sd->data_start = addr; sd->data_offset = 0; @@ -1374,6 +1405,9 @@ static sd_rsp_type_t sd_normal_command(SDState *sd, SDRequest req) return sd_r1; } +if (sd->emmc) { +addr += sd_bootpart_offset(sd); +} sd->state = sd_sendingdata_state; sd->data_start = addr; sd->data_offset = 0; @@ -1430,6 +1464,9 @@ static sd_rsp_type_t sd_normal_command(SDState *sd, SDRequest req) return sd_r1; } +if (sd->emmc) { +addr += sd_bootpart_offset(sd); +} sd->state = sd_receivingdata_state; sd->data_start = addr; sd->data_offset = 0; @@ -1460,6 +1497,9 @@ static sd_rsp_type_t sd_normal_command(SDState *sd, SDRequest req) return sd_r1; } +if (sd->emmc) { +addr += sd_bootpart_offset(sd); +} sd->state = sd_receivingdata_state; sd->data_start = addr; sd->data_offset = 0; -- 2.7.4
[PATCH v2 22/22] docs: arm: xlnx-versal-virt: Add eMMC support documentation
Add details of eMMC specific machine property. Signed-off-by: Sai Pavan Boddu --- docs/system/arm/xlnx-versal-virt.rst | 10 ++ 1 file changed, 10 insertions(+) diff --git a/docs/system/arm/xlnx-versal-virt.rst b/docs/system/arm/xlnx-versal-virt.rst index 2602d0f..a48a88d 100644 --- a/docs/system/arm/xlnx-versal-virt.rst +++ b/docs/system/arm/xlnx-versal-virt.rst @@ -29,6 +29,7 @@ Implemented devices: - 2 GEMs (Cadence MACB Ethernet MACs) - 8 ADMA (Xilinx zDMA) channels - 2 SD Controllers +* SDHCI0 can be configured as eMMC - OCM (256KB of On Chip Memory) - DDR memory @@ -43,6 +44,15 @@ Other differences between the hardware and the QEMU model: - QEMU provides 8 virtio-mmio virtio transports; these start at address ``0xa000`` and have IRQs from 111 and upwards. +Enabling eMMC +" +In order to enable eMMC pass the following machine property "emmc=on". +ex: +"-M xlnx-versal-virt,emmc=on" + +Above switch would configure SDHCI0 to accept eMMC card. More details on eMMC +emulation can be found in docs/devel/emmc.txt. + Running """ If the user provides an Operating System to be loaded, we expect users -- 2.7.4
[PATCH v2 00/22] eMMC support
Hi, This patch series add support for eMMC cards. This work was previosly submitted by Vincent, rebased few changes on top. Cedric & Joel has helped to added boot partition access support. I expect them to make a follow-up series to use it with aspeed machines. Present series adds eMMC support to Versal SOC. Initial patch series version is RFC Changes for V2: Split Patch 1 Add comments for eMMC Erase commands Added documentation about eMMC and Versal-virt board. Make eMMC optional for xlnx-versal-virt machines Regards, Sai Pavan Cédric Le Goater (2): sd: sdmmc-internal: Add command string for SEND_OP_CMD sd: emmc: Add Extended CSD register definitions Joel Stanley (2): sd: emmc: Support boot area in emmc image sd: emmc: Subtract bootarea size from blk Sai Pavan Boddu (13): sd: sd: Remove usage of tabs in the file sd: emmc: Dont not update CARD_CAPACITY for eMMC cards sd: emmc: Update CMD1 definition for eMMC sd: emmc: support idle state in CMD2 sd: emmc: Add mmc switch function support sd: emmc: add CMD21 tuning sequence sd: emmc: Make ACMD41 illegal for mmc sd: emmc: Add support for emmc erase sd: emmc: Update CID structure for eMMC sd: sdhci: Support eMMC devices arm: xlnx-versal: Add emmc to versal docs: devel: emmc: Add a doc for emmc card emulation docs: arm: xlnx-versal-virt: Add eMMC support documentation Vincent Palatin (5): block: add eMMC block device type sd: emmc: Add support for eMMC cards sd: emmc: update OCR fields for eMMC sd: emmc: Add support for EXT_CSD & CSD for eMMC sd: emmc: Update CMD8 to send EXT_CSD register docs/devel/emmc.txt | 16 + docs/system/arm/xlnx-versal-virt.rst | 10 + hw/sd/sdmmc-internal.h | 97 +++ include/hw/arm/xlnx-versal.h | 1 + include/sysemu/blockdev.h| 1 + blockdev.c | 1 + hw/arm/xlnx-versal-virt.c| 30 +- hw/arm/xlnx-versal.c | 13 +- hw/sd/sd.c | 545 ++- hw/sd/sdhci.c| 4 - hw/sd/sdmmc-internal.c | 2 +- 11 files changed, 571 insertions(+), 149 deletions(-) create mode 100644 docs/devel/emmc.txt -- 2.7.4
Re: [RFC PATCH 02/15] sd: add eMMC support
On 2/11/21 9:17 AM, Sai Pavan Boddu wrote: From: Vincent Palatin The parameters mimick a real 4GB eMMC, but it can be set to various sizes. Signed-off-by: Vincent Palatin [SPB: Rebased the patch over qemu 5.1, Mark eMMC to support all timing modes] Signed-off-by: Sai Pavan Boddu Signed-off-by: Joel Stanley Signed-off-by: Cédric Le Goater I find this commit hard to review in its current state. Maybe by splitting it into smaller commits with a small description in the commit message would make things easier. Eg. one patch to set the ext_csd fields, one for the csd, and one per command you modify. I also noted one small thing bellow. --- hw/sd/sd.c | 143 + hw/sd/sdmmc-internal.c | 2 +- 2 files changed, 122 insertions(+), 23 deletions(-) diff --git a/hw/sd/sd.c b/hw/sd/sd.c index 8517dbc..a75fa1c 100644 --- a/hw/sd/sd.c +++ b/hw/sd/sd.c [snip] @@ -371,6 +374,51 @@ static const uint8_t sd_csd_rw_mask[16] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0xfe, }; +static void mmc_set_ext_csd(SDState *sd, uint64_t size) +{ +uint32_t sectcount = size >> HWBLOCK_SHIFT; + +memset(sd->ext_csd, 0, 512); memset(sd->ext_csd, 0, sizeof(sd->ext_csd)); -- Luc +sd->ext_csd[504] = 0x1; /* supported command sets */ +sd->ext_csd[503] = 0x1; /* HPI features */ +sd->ext_csd[502] = 0x1; /* Background operations support */ +sd->ext_csd[241] = 0xA; /* 1st initialization time after partitioning */ +sd->ext_csd[232] = 0x1; /* Trim multiplier */ +sd->ext_csd[231] = 0x15; /* Secure feature support */ +sd->ext_csd[230] = 0x96; /* Secure erase support */ +sd->ext_csd[229] = 0x96; /* Secure TRIM multiplier */ +sd->ext_csd[228] = 0x7; /* Boot information */ +sd->ext_csd[226] = 0x8; /* Boot partition size */ +sd->ext_csd[225] = 0x6; /* Access size */ +sd->ext_csd[224] = 0x4; /* HC Erase unit size */ +sd->ext_csd[223] = 0x1; /* HC erase timeout */ +sd->ext_csd[222] = 0x1; /* Reliable write sector count */ +sd->ext_csd[221] = 0x4; /* HC write protect group size */ +sd->ext_csd[220] = 0x8; /* Sleep current VCC */ +sd->ext_csd[219] = 0x7; /* Sleep current VCCQ */ +sd->ext_csd[217] = 0x11; /* Sleep/Awake timeout */ +sd->ext_csd[215] = (sectcount >> 24) & 0xff; /* Sector count */ +sd->ext_csd[214] = (sectcount >> 16) & 0xff; /* ... */ +sd->ext_csd[213] = (sectcount >> 8) & 0xff; /* ... */ +sd->ext_csd[212] = (sectcount & 0xff); /* ... */ +sd->ext_csd[210] = 0xa; /* Min write perf for 8bit@52Mhz */ +sd->ext_csd[209] = 0xa; /* Min read perf for 8bit@52Mhz */ +sd->ext_csd[208] = 0xa; /* Min write perf for 4bit@52Mhz */ +sd->ext_csd[207] = 0xa; /* Min read perf for 4bit@52Mhz */ +sd->ext_csd[206] = 0xa; /* Min write perf for 4bit@26Mhz */ +sd->ext_csd[205] = 0xa; /* Min read perf for 4bit@26Mhz */ +sd->ext_csd[199] = 0x1; /* Partition switching timing */ +sd->ext_csd[198] = 0x1; /* Out-of-interrupt busy timing */ +sd->ext_csd[196] = 0xFF; /* Card type */ +sd->ext_csd[194] = 0x2; /* CSD Structure version */ +sd->ext_csd[192] = 0x5; /* Extended CSD revision */ +sd->ext_csd[168] = 0x1; /* RPMB size */ +sd->ext_csd[160] = 0x3; /* Partinioning support */ +sd->ext_csd[159] = 0x00; /* Max enhanced area size */ +sd->ext_csd[158] = 0x00; /* ... */ +sd->ext_csd[157] = 0xEC; /* ... */ +} + static void sd_set_csd(SDState *sd, uint64_t size) { int hwblock_shift = HWBLOCK_SHIFT; @@ -384,7 +432,34 @@ static void sd_set_csd(SDState *sd, uint64_t size) } csize = (size >> (CMULT_SHIFT + hwblock_shift)) - 1; -if (size <= SDSC_MAX_CAPACITY) { /* Standard Capacity SD */ +if (sd->emmc) { /* eMMC */ +sd->csd[0] = 0xd0; +sd->csd[1] = 0x0f; +sd->csd[2] = 0x00; +sd->csd[3] = 0x32; +sd->csd[4] = 0x0f; +if (size <= 0x8000ULL) { +/* use 1k blocks */ +uint32_t csize1k = (size >> (CMULT_SHIFT + 10)) - 1; +sd->csd[5] = 0x5a; +sd->csd[6] = 0x80 | ((csize1k >> 10) & 0xf); +sd->csd[7] = (csize1k >> 2) & 0xff; +} else { /* >= 2GB : size stored in ext CSD, block addressing */ +sd->csd[5] = 0x59; +sd->csd[6] = 0x8f; +sd->csd[7] = 0xff; +sd->ocr |= 1 << 30; +} +sd->csd[8] = 0xff; +sd->csd[9] = 0xff; +sd->csd[10] = 0xf7; +sd->csd[11] = 0xfe; +sd->csd[12] = 0x49; +sd->csd[13] = 0x10; +sd->csd[14] = 0x00; +sd->csd[15] = (sd_crc7(sd->csd, 15) << 1) | 1; +mmc_set_ext_csd(sd, size); +} else if (size <= SDSC_MAX_CAPACITY) { /* Standard Capacity SD */ sd->csd[0] = 0x00; /* CSD structure */ sd->csd[1] = 0x26; /* Data read access-time-1 */ sd->csd[2] = 0x00; /* Data read access-time-2 */ @@ -431,9 +506,13 @@
Re: [RFC PATCH 12/15] sd: emmc: Support boot area in emmc image
On Thu, Feb 11, 2021 at 12:15 AM Sai Pavan Boddu wrote: > > From: Joel Stanley > > This assumes a specially constructued image: > > dd if=/dev/zero of=mmc-bootarea.img count=2 bs=1M > dd if=u-boot-spl.bin of=mmc-bootarea.img conv=notrunc > dd if=u-boot.bin of=mmc-bootarea.img conv=notrunc count=64 bs=1K > cat mmc-bootarea.img obmc-phosphor-image.wic > mmc.img > truncate --size 16GB mmc.img > truncate --size 128MB mmc-bootarea.img Could we document this somewhere user accessible? Alistair > > Signed-off-by: Joel Stanley > [clg: - changes on the definition names ] > Signed-off-by: Cédric Le Goater > [spb: use data_start property to access right emmc partition, > Clean up PARTITION_ENABLE support as incomplete, > Fix commit message to be generic.] > Signed-off-by: Sai Pavan Boddu > --- > hw/sd/sd.c | 40 > 1 file changed, 40 insertions(+) > > diff --git a/hw/sd/sd.c b/hw/sd/sd.c > index 54fba7b..55c1104 100644 > --- a/hw/sd/sd.c > +++ b/hw/sd/sd.c > @@ -1045,6 +1045,34 @@ static void sd_lock_command(SDState *sd) > sd->card_status &= ~CARD_IS_LOCKED; > } > > +/* > + * This requires a disk image that has two boot partitions inserted at the > + * beginning of it. The size of the boot partitions are configured in the > + * ext_csd structure, which is hardcoded in qemu. They are currently set to > + * 1MB each. > + */ > +static uint32_t sd_bootpart_offset(SDState *sd) > +{ > +unsigned int access = sd->ext_csd[EXT_CSD_PART_CONFIG] & > +EXT_CSD_PART_CONFIG_ACC_MASK; > +unsigned int boot_capacity = sd->ext_csd[EXT_CSD_BOOT_MULT] << 17; > + > +if (!sd->emmc) { > +return 0; > +} > + > +switch (access) { > +case EXT_CSD_PART_CONFIG_ACC_DEFAULT: > +return boot_capacity * 2; > +case EXT_CSD_PART_CONFIG_ACC_BOOT0: > +return 0; > +case EXT_CSD_PART_CONFIG_ACC_BOOT0 + 1: > +return boot_capacity * 1; > +default: > + g_assert_not_reached(); > +} > +} > + > static sd_rsp_type_t sd_normal_command(SDState *sd, SDRequest req) > { > uint32_t rca = 0x; > @@ -1360,6 +1388,9 @@ static sd_rsp_type_t sd_normal_command(SDState *sd, > SDRequest req) > return sd_r1; > } > > +if (sd->emmc) { > +addr += sd_bootpart_offset(sd); > +} > sd->state = sd_sendingdata_state; > sd->data_start = addr; > sd->data_offset = 0; > @@ -1379,6 +1410,9 @@ static sd_rsp_type_t sd_normal_command(SDState *sd, > SDRequest req) > return sd_r1; > } > > +if (sd->emmc) { > +addr += sd_bootpart_offset(sd); > +} > sd->state = sd_sendingdata_state; > sd->data_start = addr; > sd->data_offset = 0; > @@ -1435,6 +1469,9 @@ static sd_rsp_type_t sd_normal_command(SDState *sd, > SDRequest req) > return sd_r1; > } > > +if (sd->emmc) { > +addr += sd_bootpart_offset(sd); > +} > sd->state = sd_receivingdata_state; > sd->data_start = addr; > sd->data_offset = 0; > @@ -1465,6 +1502,9 @@ static sd_rsp_type_t sd_normal_command(SDState *sd, > SDRequest req) > return sd_r1; > } > > +if (sd->emmc) { > +addr += sd_bootpart_offset(sd); > +} > sd->state = sd_receivingdata_state; > sd->data_start = addr; > sd->data_offset = 0; > -- > 2.7.4 > >
Re: [RFC PATCH 05/15] sd: emmc: support idle state in CMD2
On Thu, Feb 11, 2021 at 12:18 AM Sai Pavan Boddu wrote: > > eMMC is expected to be in idle-state post CMD1. Ready state is an > intermediate stage which we don't come across in Device identification > mode. > > Signed-off-by: Sai Pavan Boddu > Signed-off-by: Edgar E. Iglesias Acked-by: Alistair Francis Alistair > --- > hw/sd/sd.c | 4 > 1 file changed, 4 insertions(+) > > diff --git a/hw/sd/sd.c b/hw/sd/sd.c > index e3738b2..69289e0 100644 > --- a/hw/sd/sd.c > +++ b/hw/sd/sd.c > @@ -1051,6 +1051,10 @@ static sd_rsp_type_t sd_normal_command(SDState *sd, > SDRequest req) > if (sd->spi) > goto bad_cmd; > switch (sd->state) { > +case sd_idle_state: > +if (!sd->emmc) { > +break; > +} > case sd_ready_state: > sd->state = sd_identification_state; > return sd_r2_i; > -- > 2.7.4 > >
[RFC PATCH 02/15] sd: add eMMC support
From: Vincent Palatin The parameters mimick a real 4GB eMMC, but it can be set to various sizes. Signed-off-by: Vincent Palatin [SPB: Rebased the patch over qemu 5.1, Mark eMMC to support all timing modes] Signed-off-by: Sai Pavan Boddu Signed-off-by: Joel Stanley Signed-off-by: Cédric Le Goater --- hw/sd/sd.c | 143 + hw/sd/sdmmc-internal.c | 2 +- 2 files changed, 122 insertions(+), 23 deletions(-) diff --git a/hw/sd/sd.c b/hw/sd/sd.c index 8517dbc..a75fa1c 100644 --- a/hw/sd/sd.c +++ b/hw/sd/sd.c @@ -108,6 +108,7 @@ struct SDState { uint8_t spec_version; BlockBackend *blk; bool spi; +bool emmc; /* Runtime changeables */ @@ -134,6 +135,7 @@ struct SDState { uint64_t data_start; uint32_t data_offset; uint8_t data[512]; +uint8_t ext_csd[512]; qemu_irq readonly_cb; qemu_irq inserted_cb; QEMUTimer *ocr_power_timer; @@ -287,7 +289,8 @@ FIELD(OCR, CARD_POWER_UP, 31, 1) | R_OCR_ACCEPT_SWITCH_1V8_MASK \ | R_OCR_UHS_II_CARD_MASK \ | R_OCR_CARD_CAPACITY_MASK \ - | R_OCR_CARD_POWER_UP_MASK) + | R_OCR_CARD_POWER_UP_MASK \ + | R_OCR_DUAL_VOLTAGE_CARD_MASK) static void sd_set_ocr(SDState *sd) { @@ -371,6 +374,51 @@ static const uint8_t sd_csd_rw_mask[16] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0xfe, }; +static void mmc_set_ext_csd(SDState *sd, uint64_t size) +{ +uint32_t sectcount = size >> HWBLOCK_SHIFT; + +memset(sd->ext_csd, 0, 512); +sd->ext_csd[504] = 0x1; /* supported command sets */ +sd->ext_csd[503] = 0x1; /* HPI features */ +sd->ext_csd[502] = 0x1; /* Background operations support */ +sd->ext_csd[241] = 0xA; /* 1st initialization time after partitioning */ +sd->ext_csd[232] = 0x1; /* Trim multiplier */ +sd->ext_csd[231] = 0x15; /* Secure feature support */ +sd->ext_csd[230] = 0x96; /* Secure erase support */ +sd->ext_csd[229] = 0x96; /* Secure TRIM multiplier */ +sd->ext_csd[228] = 0x7; /* Boot information */ +sd->ext_csd[226] = 0x8; /* Boot partition size */ +sd->ext_csd[225] = 0x6; /* Access size */ +sd->ext_csd[224] = 0x4; /* HC Erase unit size */ +sd->ext_csd[223] = 0x1; /* HC erase timeout */ +sd->ext_csd[222] = 0x1; /* Reliable write sector count */ +sd->ext_csd[221] = 0x4; /* HC write protect group size */ +sd->ext_csd[220] = 0x8; /* Sleep current VCC */ +sd->ext_csd[219] = 0x7; /* Sleep current VCCQ */ +sd->ext_csd[217] = 0x11; /* Sleep/Awake timeout */ +sd->ext_csd[215] = (sectcount >> 24) & 0xff; /* Sector count */ +sd->ext_csd[214] = (sectcount >> 16) & 0xff; /* ... */ +sd->ext_csd[213] = (sectcount >> 8) & 0xff; /* ... */ +sd->ext_csd[212] = (sectcount & 0xff); /* ... */ +sd->ext_csd[210] = 0xa; /* Min write perf for 8bit@52Mhz */ +sd->ext_csd[209] = 0xa; /* Min read perf for 8bit@52Mhz */ +sd->ext_csd[208] = 0xa; /* Min write perf for 4bit@52Mhz */ +sd->ext_csd[207] = 0xa; /* Min read perf for 4bit@52Mhz */ +sd->ext_csd[206] = 0xa; /* Min write perf for 4bit@26Mhz */ +sd->ext_csd[205] = 0xa; /* Min read perf for 4bit@26Mhz */ +sd->ext_csd[199] = 0x1; /* Partition switching timing */ +sd->ext_csd[198] = 0x1; /* Out-of-interrupt busy timing */ +sd->ext_csd[196] = 0xFF; /* Card type */ +sd->ext_csd[194] = 0x2; /* CSD Structure version */ +sd->ext_csd[192] = 0x5; /* Extended CSD revision */ +sd->ext_csd[168] = 0x1; /* RPMB size */ +sd->ext_csd[160] = 0x3; /* Partinioning support */ +sd->ext_csd[159] = 0x00; /* Max enhanced area size */ +sd->ext_csd[158] = 0x00; /* ... */ +sd->ext_csd[157] = 0xEC; /* ... */ +} + static void sd_set_csd(SDState *sd, uint64_t size) { int hwblock_shift = HWBLOCK_SHIFT; @@ -384,7 +432,34 @@ static void sd_set_csd(SDState *sd, uint64_t size) } csize = (size >> (CMULT_SHIFT + hwblock_shift)) - 1; -if (size <= SDSC_MAX_CAPACITY) { /* Standard Capacity SD */ +if (sd->emmc) { /* eMMC */ +sd->csd[0] = 0xd0; +sd->csd[1] = 0x0f; +sd->csd[2] = 0x00; +sd->csd[3] = 0x32; +sd->csd[4] = 0x0f; +if (size <= 0x8000ULL) { +/* use 1k blocks */ +uint32_t csize1k = (size >> (CMULT_SHIFT + 10)) - 1; +sd->csd[5] = 0x5a; +sd->csd[6] = 0x80 | ((csize1k >> 10) & 0xf); +sd->csd[7] = (csize1k >> 2) & 0xff; +} else { /* >= 2GB : size stored in ext CSD, block addressing */ +sd->csd[5] = 0x59; +sd->csd[6] = 0x8f; +sd->csd[7] = 0xff; +sd->ocr |= 1 << 30; +} +sd->csd[8] = 0xff; +sd->csd[9] = 0xff; +sd->csd[10] = 0xf7; +sd->csd[11] = 0xfe; +
[RFC PATCH 05/15] sd: emmc: support idle state in CMD2
eMMC is expected to be in idle-state post CMD1. Ready state is an intermediate stage which we don't come across in Device identification mode. Signed-off-by: Sai Pavan Boddu Signed-off-by: Edgar E. Iglesias --- hw/sd/sd.c | 4 1 file changed, 4 insertions(+) diff --git a/hw/sd/sd.c b/hw/sd/sd.c index e3738b2..69289e0 100644 --- a/hw/sd/sd.c +++ b/hw/sd/sd.c @@ -1051,6 +1051,10 @@ static sd_rsp_type_t sd_normal_command(SDState *sd, SDRequest req) if (sd->spi) goto bad_cmd; switch (sd->state) { +case sd_idle_state: +if (!sd->emmc) { +break; +} case sd_ready_state: sd->state = sd_identification_state; return sd_r2_i; -- 2.7.4
[RFC PATCH 12/15] sd: emmc: Support boot area in emmc image
From: Joel Stanley This assumes a specially constructued image: dd if=/dev/zero of=mmc-bootarea.img count=2 bs=1M dd if=u-boot-spl.bin of=mmc-bootarea.img conv=notrunc dd if=u-boot.bin of=mmc-bootarea.img conv=notrunc count=64 bs=1K cat mmc-bootarea.img obmc-phosphor-image.wic > mmc.img truncate --size 16GB mmc.img truncate --size 128MB mmc-bootarea.img Signed-off-by: Joel Stanley [clg: - changes on the definition names ] Signed-off-by: Cédric Le Goater [spb: use data_start property to access right emmc partition, Clean up PARTITION_ENABLE support as incomplete, Fix commit message to be generic.] Signed-off-by: Sai Pavan Boddu --- hw/sd/sd.c | 40 1 file changed, 40 insertions(+) diff --git a/hw/sd/sd.c b/hw/sd/sd.c index 54fba7b..55c1104 100644 --- a/hw/sd/sd.c +++ b/hw/sd/sd.c @@ -1045,6 +1045,34 @@ static void sd_lock_command(SDState *sd) sd->card_status &= ~CARD_IS_LOCKED; } +/* + * This requires a disk image that has two boot partitions inserted at the + * beginning of it. The size of the boot partitions are configured in the + * ext_csd structure, which is hardcoded in qemu. They are currently set to + * 1MB each. + */ +static uint32_t sd_bootpart_offset(SDState *sd) +{ +unsigned int access = sd->ext_csd[EXT_CSD_PART_CONFIG] & +EXT_CSD_PART_CONFIG_ACC_MASK; +unsigned int boot_capacity = sd->ext_csd[EXT_CSD_BOOT_MULT] << 17; + +if (!sd->emmc) { +return 0; +} + +switch (access) { +case EXT_CSD_PART_CONFIG_ACC_DEFAULT: +return boot_capacity * 2; +case EXT_CSD_PART_CONFIG_ACC_BOOT0: +return 0; +case EXT_CSD_PART_CONFIG_ACC_BOOT0 + 1: +return boot_capacity * 1; +default: + g_assert_not_reached(); +} +} + static sd_rsp_type_t sd_normal_command(SDState *sd, SDRequest req) { uint32_t rca = 0x; @@ -1360,6 +1388,9 @@ static sd_rsp_type_t sd_normal_command(SDState *sd, SDRequest req) return sd_r1; } +if (sd->emmc) { +addr += sd_bootpart_offset(sd); +} sd->state = sd_sendingdata_state; sd->data_start = addr; sd->data_offset = 0; @@ -1379,6 +1410,9 @@ static sd_rsp_type_t sd_normal_command(SDState *sd, SDRequest req) return sd_r1; } +if (sd->emmc) { +addr += sd_bootpart_offset(sd); +} sd->state = sd_sendingdata_state; sd->data_start = addr; sd->data_offset = 0; @@ -1435,6 +1469,9 @@ static sd_rsp_type_t sd_normal_command(SDState *sd, SDRequest req) return sd_r1; } +if (sd->emmc) { +addr += sd_bootpart_offset(sd); +} sd->state = sd_receivingdata_state; sd->data_start = addr; sd->data_offset = 0; @@ -1465,6 +1502,9 @@ static sd_rsp_type_t sd_normal_command(SDState *sd, SDRequest req) return sd_r1; } +if (sd->emmc) { +addr += sd_bootpart_offset(sd); +} sd->state = sd_receivingdata_state; sd->data_start = addr; sd->data_offset = 0; -- 2.7.4
[RFC PATCH 00/15] eMMC support
Hi, This patch series add support for eMMC cards. This work was previosly submitted by Vincent, rebased few changes on top. Cedric & Joel has helped to added boot partition access support. I expect them to make a follow-up series to use it with aspeed machines. Present series adds eMMC support to Versal SOC. Regards, Sai Pavan Cédric Le Goater (1): sd: emmc: Add Extended CSD register definitions Joel Stanley (2): sd: emmc: Support boot area in emmc image sd: emmc: Subtract bootarea size from blk Sai Pavan Boddu (10): sd: emmc: Dont not update CARD_CAPACITY for eMMC cards sd: emmc: Update CMD1 definition for eMMC sd: emmc: support idle state in CMD2 sd: emmc: Add mmc switch function support sd: emmc: add CMD21 tuning sequence sd: emmc: Make ACMD41 illegal for mmc sd: emmc: Add support for emmc erase sd: emmc: Update CID structure for eMMC sd: sdhci: Support eMMC devices arm: xlnx-versal: Add emmc to versal Vincent Palatin (2): block: add eMMC block device type sd: add eMMC support blockdev.c| 1 + hw/arm/xlnx-versal-virt.c | 16 +- hw/arm/xlnx-versal.c | 14 +- hw/sd/sd.c| 369 -- hw/sd/sdhci.c | 4 - hw/sd/sdmmc-internal.c| 2 +- hw/sd/sdmmc-internal.h| 97 include/sysemu/blockdev.h | 1 + 8 files changed, 445 insertions(+), 59 deletions(-) -- 2.7.4
RE: eMMC support
Hi Joel > -Original Message- > From: Joel Stanley > Sent: Wednesday, February 10, 2021 6:35 PM > To: Cédric Le Goater > Cc: Sai Pavan Boddu ; Edgar Iglesias ; > Andrew Jeffery ; qemu-devel@nongnu.org; Philippe > Mathieu-Daudé > Subject: Re: eMMC support > > On Wed, 10 Feb 2021 at 09:56, Cédric Le Goater wrote: > > > > Hello Sai Pavan, > > > > [ ... ] > > > > >>> The patchset is in the aspeed-6.0 branch : > > >>> > > >>> df91d012672c Cédric Le Goater - hw/arm/aspeed: Load eMMC first > boot > > >>> area as a boot rom > > >>> 27b75a7ad322 Cédric Le Goater - hw/arm/aspeed: Add eMMC > property > > >>> 2836cf5a15a1 Joel Stanley - hw/arm/aspeed: Set boot device to > > >>> emmc > > > > > > [Sai Pavan Boddu] I see you guys have implemented the boot area > > > access here, > > > > The boot partition modeling fits our needs to boot the Aspeed machine > > but this is very custom. > > > > > I was assuming, your use-case just need to access data from boot > > > partitions. > > > We are not implementing eMMC boot operations or Alternative bootmode > right ? > > > > Joel could say more about it ? > > The solution I came up with has room for improvement. There's no way to tell > the qemu sd device what boot partitions it should expect to find, and likewise > there's no way for the emulated machine to check that the image is formatted > in the way it expects. [Sai Pavan Boddu] I guess bits of PARTITION_CONFIG[PARTITION_ACCESS], would tell SD which boot partition needs to be enabled. > > If there was a way to add metadata to the image (through qcow2?) then we > could use this to define the boot partition sizes in the image, and have the > model use these numbers to populate CSD_EXT. It's only an idea, and I don't > know if qcow2 supports this kind of metadata. [Sai Pavan Boddu] yeah nice. I don’t know if qemu-img has any option as such. Anyway only few fields in CSD_EXT are useful for us, which should be ok to implement as properties. Regards, Sai Pavan > > Cheers, > > Joel
Re: eMMC support
On 2/10/21 2:05 PM, Joel Stanley wrote: > On Wed, 10 Feb 2021 at 09:56, Cédric Le Goater wrote: >> >> Hello Sai Pavan, >> >> [ ... ] >> > The patchset is in the aspeed-6.0 branch : > > df91d012672c Cédric Le Goater - hw/arm/aspeed: Load eMMC first boot > area as a boot rom > 27b75a7ad322 Cédric Le Goater - hw/arm/aspeed: Add eMMC property > 2836cf5a15a1 Joel Stanley - hw/arm/aspeed: Set boot device to emmc >>> >>> [Sai Pavan Boddu] I see you guys have implemented the boot area access here, >> >> The boot partition modeling fits our needs to boot the Aspeed machine >> but this is very custom. >> >>> I was assuming, your use-case just need to access data from boot partitions. >>> We are not implementing eMMC boot operations or Alternative bootmode right ? >> >> Joel could say more about it ? > > The solution I came up with has room for improvement. There's no way > to tell the qemu sd device what boot partitions it should expect to > find, and likewise there's no way for the emulated machine to check > that the image is formatted in the way it expects. > > If there was a way to add metadata to the image (through qcow2?) then > we could use this to define the boot partition sizes in the image, and > have the model use these numbers to populate CSD_EXT. It's only an > idea, and I don't know if qcow2 supports this kind of metadata. We could add a new QEMU MMC block device with a set of properties to describe the layout maybe ? C.
Re: eMMC support
On Wed, 10 Feb 2021 at 09:56, Cédric Le Goater wrote: > > Hello Sai Pavan, > > [ ... ] > > >>> The patchset is in the aspeed-6.0 branch : > >>> > >>> df91d012672c Cédric Le Goater - hw/arm/aspeed: Load eMMC first boot > >>> area as a boot rom > >>> 27b75a7ad322 Cédric Le Goater - hw/arm/aspeed: Add eMMC property > >>> 2836cf5a15a1 Joel Stanley - hw/arm/aspeed: Set boot device to emmc > > > > [Sai Pavan Boddu] I see you guys have implemented the boot area access here, > > The boot partition modeling fits our needs to boot the Aspeed machine > but this is very custom. > > > I was assuming, your use-case just need to access data from boot partitions. > > We are not implementing eMMC boot operations or Alternative bootmode right ? > > Joel could say more about it ? The solution I came up with has room for improvement. There's no way to tell the qemu sd device what boot partitions it should expect to find, and likewise there's no way for the emulated machine to check that the image is formatted in the way it expects. If there was a way to add metadata to the image (through qcow2?) then we could use this to define the boot partition sizes in the image, and have the model use these numbers to populate CSD_EXT. It's only an idea, and I don't know if qcow2 supports this kind of metadata. Cheers, Joel
RE: eMMC support
Hi Cedric > -Original Message- > From: Cédric Le Goater > Sent: Wednesday, February 10, 2021 3:27 PM > To: Sai Pavan Boddu ; Edgar Iglesias ; > Joel Stanley ; Andrew Jeffery > Cc: qemu-devel@nongnu.org; Philippe Mathieu-Daudé > Subject: Re: eMMC support > > Hello Sai Pavan, > > [ ... ] > > >>> The patchset is in the aspeed-6.0 branch : > >>> > >>> df91d012672c Cédric Le Goater - hw/arm/aspeed: Load eMMC first boot > >>> area as a boot rom > >>> 27b75a7ad322 Cédric Le Goater - hw/arm/aspeed: Add eMMC property > >>> 2836cf5a15a1 Joel Stanley - hw/arm/aspeed: Set boot device to > >>> emmc > > > > [Sai Pavan Boddu] I see you guys have implemented the boot area access > > here, > > The boot partition modeling fits our needs to boot the Aspeed machine but > this is very custom. > > > I was assuming, your use-case just need to access data from boot partitions. > > We are not implementing eMMC boot operations or Alternative bootmode > right ? > > Joel could say more about it ? [Sai Pavan Boddu] Anyway BOOT_PARTITION_ENABLE bits are persistent over power cycles, which needs be implemented as properties. > > > And also is it good to calculate the address offset once when > > partition access bits are set, rather than doing it for every read/write ? > > Yes and no. It would add state to the sd object. [Sai Pavan Boddu] Yeah. We already have a member in the state "sd->data_start", which can be updated based on value in PARTITION_ACCESS. I feel there is no harm in updating data_start, correct me if I'm wrong. Regards, Sai Pavan > > Thanks, > > C.
Re: eMMC support
Hello Sai Pavan, [ ... ] >>> The patchset is in the aspeed-6.0 branch : >>> >>> df91d012672c Cédric Le Goater - hw/arm/aspeed: Load eMMC first boot >>> area as a boot rom >>> 27b75a7ad322 Cédric Le Goater - hw/arm/aspeed: Add eMMC property >>> 2836cf5a15a1 Joel Stanley - hw/arm/aspeed: Set boot device to emmc > > [Sai Pavan Boddu] I see you guys have implemented the boot area access here, The boot partition modeling fits our needs to boot the Aspeed machine but this is very custom. > I was assuming, your use-case just need to access data from boot partitions. > We are not implementing eMMC boot operations or Alternative bootmode right ? Joel could say more about it ? > And also is it good to calculate the address offset once when partition > access bits are set, rather than doing it for every read/write ? Yes and no. It would add state to the sd object. Thanks, C.
RE: eMMC support
Hi Cedric, > -Original Message- > From: Cédric Le Goater > Sent: Tuesday, February 2, 2021 3:37 AM > To: Sai Pavan Boddu ; Edgar Iglesias ; > Joel Stanley ; Andrew Jeffery > Cc: qemu-devel@nongnu.org; Philippe Mathieu-Daudé > Subject: Re: eMMC support > > On 2/1/21 11:01 PM, Cédric Le Goater wrote: > > Hello, > > > >>> FYI, aspeed machines successfully boot on top of 16G emmc disk images. > >>> I merged some of xilinx patches on top of the aspeed-6.0 branch to > >>> improve the model completeness but only the one fixing powerup was > >>> really necessary. > >>> > >>> The initial diffstat is rather small. > >>> > >>> hw/sd/sd.c | 168 > >>> ++--- > >>> > >>> We can surely find a way to merge support in mainline without > >>> covering the whole specs. The Extended CSD register would be the big > >>> part. > >> > >> */[Sai Pavan Boddu] I’m revisiting eMMC now, made some patches on top > >> of previous series sent by “Vincent Palatin”./* > >> > >> */Would you like to share your changes, which made aspeed machines to > >> work ?/* > >> > >> */Regards, > >> Sai Pavan/* > > > > The patchset is in the aspeed-6.0 branch : > > > > df91d012672c Cédric Le Goater - hw/arm/aspeed: Load eMMC first boot > area as a boot rom > > 27b75a7ad322 Cédric Le Goater - hw/arm/aspeed: Add eMMC property > > 2836cf5a15a1 Joel Stanley - hw/arm/aspeed: Set boot device to emmc [Sai Pavan Boddu] I see you guys have implemented the boot area access here, I was assuming, your use-case just need to access data from boot partitions. We are not implementing eMMC boot operations or Alternative bootmode right ? And also is it good to calculate the address offset once when partition access bits are set, rather than doing it for every read/write ? Regards, Sai Pavan > > 42c9d57f5cd0 Joel Stanley - sd: mmc: Subtract bootarea size from blk > > 218301406607 Joel Stanley - sd: mmc: Support boot area in emmc image > > df0452923b56 Cédric Le Goater - sd: mmc: Add Extended CSD register > definitions > > 416c02bbfd32 Sai Pavan Boddu - sd: mmc: Add mmc switch function > support > > a228aef1a209 Sai Pavan Boddu - sd: mmc: add CMD21 tuning sequence > > 9b177d7baf8e Sai Pavan Boddu - sd: mmc: Update CMD1 definition for > MMC > > 6677e4eb6812 Vincent Palatin - sd: add eMMC support > > here : > > https://github.com/legoater/qemu/commits/aspeed-6.0 > > C.
Re: eMMC support
On 2/1/21 11:01 PM, Cédric Le Goater wrote: > Hello, > >>> FYI, aspeed machines successfully boot on top of 16G emmc disk images. >>> I merged some of xilinx patches on top of the aspeed-6.0 branch to >>> improve the model completeness but only the one fixing powerup was >>> really necessary. >>> >>> The initial diffstat is rather small. >>> >>> hw/sd/sd.c | 168 >>> ++--- >>> >>> We can surely find a way to merge support in mainline without >>> covering the whole specs. The Extended CSD register would be the >>> big part. >> >> */[Sai Pavan Boddu] I’m revisiting eMMC now, made some patches on top of >> previous series sent by “Vincent Palatin”./* >> >> */Would you like to share your changes, which made aspeed machines to work >> ?/* >> >> */Regards, >> Sai Pavan/* > > The patchset is in the aspeed-6.0 branch : > > df91d012672c Cédric Le Goater - hw/arm/aspeed: Load eMMC first boot area > as a boot rom > 27b75a7ad322 Cédric Le Goater - hw/arm/aspeed: Add eMMC property > 2836cf5a15a1 Joel Stanley - hw/arm/aspeed: Set boot device to emmc > 42c9d57f5cd0 Joel Stanley - sd: mmc: Subtract bootarea size from blk > 218301406607 Joel Stanley - sd: mmc: Support boot area in emmc image > df0452923b56 Cédric Le Goater - sd: mmc: Add Extended CSD register > definitions > 416c02bbfd32 Sai Pavan Boddu - sd: mmc: Add mmc switch function support > a228aef1a209 Sai Pavan Boddu - sd: mmc: add CMD21 tuning sequence > 9b177d7baf8e Sai Pavan Boddu - sd: mmc: Update CMD1 definition for MMC > 6677e4eb6812 Vincent Palatin - sd: add eMMC support here : https://github.com/legoater/qemu/commits/aspeed-6.0 C.
Re: eMMC support
Hello, >> FYI, aspeed machines successfully boot on top of 16G emmc disk images. >> I merged some of xilinx patches on top of the aspeed-6.0 branch to >> improve the model completeness but only the one fixing powerup was >> really necessary. >> >> The initial diffstat is rather small. >> >> hw/sd/sd.c | 168 >> ++--- >> >> We can surely find a way to merge support in mainline without >> covering the whole specs. The Extended CSD register would be the >> big part. > > */[Sai Pavan Boddu] I’m revisiting eMMC now, made some patches on top of > previous series sent by “Vincent Palatin”./* > > */Would you like to share your changes, which made aspeed machines to work ?/* > > */Regards, > Sai Pavan/* The patchset is in the aspeed-6.0 branch : df91d012672c Cédric Le Goater - hw/arm/aspeed: Load eMMC first boot area as a boot rom 27b75a7ad322 Cédric Le Goater - hw/arm/aspeed: Add eMMC property 2836cf5a15a1 Joel Stanley - hw/arm/aspeed: Set boot device to emmc 42c9d57f5cd0 Joel Stanley - sd: mmc: Subtract bootarea size from blk 218301406607 Joel Stanley - sd: mmc: Support boot area in emmc image df0452923b56 Cédric Le Goater - sd: mmc: Add Extended CSD register definitions 416c02bbfd32 Sai Pavan Boddu - sd: mmc: Add mmc switch function support a228aef1a209 Sai Pavan Boddu - sd: mmc: add CMD21 tuning sequence 9b177d7baf8e Sai Pavan Boddu - sd: mmc: Update CMD1 definition for MMC 6677e4eb6812 Vincent Palatin - sd: add eMMC support Also based on Vincent Palatin initial patches, reworked by Joel and I. Booting an aspeed machine requires a bit of work since you need to build an eMMc disk image with uboot in the boot partitions. Here is a little script from Joel to get you going. Thanks, C. #!/bin/sh URLBASE=https://jenkins.openbmc.org/view/latest/job/latest-master/label=docker-builder,target=witherspoon-tacoma/lastSuccessfulBuild/artifact/openbmc/build/tmp/deploy/images/witherspoon-tacoma/ IMAGESIZE=128 OUTFILE=mmc.img FILES="u-boot.bin u-boot-spl.bin obmc-phosphor-image-witherspoon-tacoma.wic.xz" for file in ${FILES}; do if test -f ${file}; then echo "${file}: Already downloaded" else echo "${file}: Downloading" wget -nv ${URLBASE}/${file} fi done echo echo "Creating empty image..." dd status=none if=/dev/zero of=${OUTFILE} bs=1M count=${IMAGESIZE} echo "Adding SPL..." dd status=none if=u-boot-spl.bin of=${OUTFILE} conv=notrunc echo "Adding u-boot..." dd status=none if=u-boot.bin of=${OUTFILE} conv=notrunc bs=1K seek=64 echo "Adding userdata..." unxz -c obmc-phosphor-image-witherspoon-tacoma.wic.xz | dd status=progress of=${OUTFILE} conv=notrunc bs=1M seek=2 echo "Fixing size to keep qemu happy..." truncate --size 16G ${OUTFILE} echo "Done!" echo echo " qemu-system-arm -M tacoma-bmc -nographic -drive file=mmc.img,if=sd,index=2,format=raw"
RE: eMMC support
Hi Cédric From: Edgar Iglesias Sent: Wednesday, January 20, 2021 9:30 PM To: Cédric Le Goater ; Sai Pavan Boddu ; Joel Stanley Cc: qemu-devel@nongnu.org; Philippe Mathieu-Daudé Subject: Re: eMMC support On 20 Jan 2021 09:55, Cédric Le Goater mailto:c...@kaod.org>> wrote: > > On 9/17/20 8:25 AM, Cédric Le Goater wrote: > > On 9/17/20 2:55 AM, Joel Stanley wrote: > >> On Wed, 16 Sep 2020 at 18:35, Sai Pavan Boddu > >> mailto:saip...@xilinx.com>> wrote: > >>> > >>> Hi Philippe, > >>> > >>> > >>> > >>> We are looking to add eMMC support, I searched the mailing list and found > >>> a series posted on eMMC by “Vincent Palatin” > >>> > >>> https://lists.gnu.org/archive/html/qemu-devel/2011-07/msg02833.html > >> > >> I would be interested in emmc support for the aspeed machines. Please > >> cc me when you post patches. > >> > >>> I would like to consider the above work and mix-up with more changes to > >>> start adding support for eMMC. Do you have any suggestions on the > >>> approach followed in above patches ? > >> > >> The patches had minor review comments, but I assume the reason they > >> didn't go anywhere is the author never followed up with further > >> revisions. I would suggest applying them to the current tree, cleaning > >> up any style changes that have happened since they were posted, and > >> re-posting them for review. > > > > It seems we only care about these three patches : > > > > https://patchwork.ozlabs.org/patch/106762 > > https://patchwork.ozlabs.org/patch/106761 > > https://patchwork.ozlabs.org/patch/106763 > > > > It should not be too complex to get something going. > >>> Note: Here is the existing support available in Xilinx fork, which might > >>> require some work > >>> https://github.com/Xilinx/qemu/blob/master/hw/sd/sd.c > > > > What are the relevant patches ? > > FYI, aspeed machines successfully boot on top of 16G emmc disk images. > I merged some of xilinx patches on top of the aspeed-6.0 branch to > improve the model completeness but only the one fixing powerup was > really necessary. > > The initial diffstat is rather small. > > hw/sd/sd.c | 168 > ++--- > > We can surely find a way to merge support in mainline without > covering the whole specs. The Extended CSD register would be the > big part. [Sai Pavan Boddu] I’m revisiting eMMC now, made some patches on top of previous series sent by “Vincent Palatin”. Would you like to share your changes, which made aspeed machines to work ? Regards, Sai Pavan Thanks Cedric, that would be great! Feel free to submit any of our patches for merge in upstream. Or perhaps Sai can submit and you guys can help with reviewing. We've had upstreaming of eMMC on our todo list for a while but never seem to find the time. Best regards, Edgar > > See : > >https://github.com/legoater/qemu/commits/aspeed-6.0 > > Cheers, > > C.
Re: eMMC support
On 20 Jan 2021 09:55, Cédric Le Goater wrote: > > On 9/17/20 8:25 AM, Cédric Le Goater wrote: > > On 9/17/20 2:55 AM, Joel Stanley wrote: > >> On Wed, 16 Sep 2020 at 18:35, Sai Pavan Boddu wrote: > >>> > >>> Hi Philippe, > >>> > >>> > >>> > >>> We are looking to add eMMC support, I searched the mailing list and found > >>> a series posted on eMMC by “Vincent Palatin” > >>> > >>> https://lists.gnu.org/archive/html/qemu-devel/2011-07/msg02833.html > >> > >> I would be interested in emmc support for the aspeed machines. Please > >> cc me when you post patches. > >> > >>> I would like to consider the above work and mix-up with more changes to > >>> start adding support for eMMC. Do you have any suggestions on the > >>> approach followed in above patches ? > >> > >> The patches had minor review comments, but I assume the reason they > >> didn't go anywhere is the author never followed up with further > >> revisions. I would suggest applying them to the current tree, cleaning > >> up any style changes that have happened since they were posted, and > >> re-posting them for review. > > > > It seems we only care about these three patches : > > > > https://patchwork.ozlabs.org/patch/106762 > > https://patchwork.ozlabs.org/patch/106761 > > https://patchwork.ozlabs.org/patch/106763 > > > > It should not be too complex to get something going. > >>> Note: Here is the existing support available in Xilinx fork, which might > >>> require some work > >>> https://github.com/Xilinx/qemu/blob/master/hw/sd/sd.c > > > > What are the relevant patches ? > > FYI, aspeed machines successfully boot on top of 16G emmc disk images. > I merged some of xilinx patches on top of the aspeed-6.0 branch to > improve the model completeness but only the one fixing powerup was > really necessary. > > The initial diffstat is rather small. > > hw/sd/sd.c | 168 > ++--- > > We can surely find a way to merge support in mainline without > covering the whole specs. The Extended CSD register would be the > big part. Thanks Cedric, that would be great! Feel free to submit any of our patches for merge in upstream. Or perhaps Sai can submit and you guys can help with reviewing. We've had upstreaming of eMMC on our todo list for a while but never seem to find the time. Best regards, Edgar > > See : > >https://github.com/legoater/qemu/commits/aspeed-6.0 > > Cheers, > > C.
Re: eMMC support
On 9/17/20 8:25 AM, Cédric Le Goater wrote: > On 9/17/20 2:55 AM, Joel Stanley wrote: >> On Wed, 16 Sep 2020 at 18:35, Sai Pavan Boddu wrote: >>> >>> Hi Philippe, >>> >>> >>> >>> We are looking to add eMMC support, I searched the mailing list and found a >>> series posted on eMMC by “Vincent Palatin” >>> >>> https://lists.gnu.org/archive/html/qemu-devel/2011-07/msg02833.html >> >> I would be interested in emmc support for the aspeed machines. Please >> cc me when you post patches. >> >>> I would like to consider the above work and mix-up with more changes to >>> start adding support for eMMC. Do you have any suggestions on the approach >>> followed in above patches ? >> >> The patches had minor review comments, but I assume the reason they >> didn't go anywhere is the author never followed up with further >> revisions. I would suggest applying them to the current tree, cleaning >> up any style changes that have happened since they were posted, and >> re-posting them for review. > > It seems we only care about these three patches : > > https://patchwork.ozlabs.org/patch/106762 > https://patchwork.ozlabs.org/patch/106761 > https://patchwork.ozlabs.org/patch/106763 > > It should not be too complex to get something going. >>> Note: Here is the existing support available in Xilinx fork, which might >>> require some work >>> https://github.com/Xilinx/qemu/blob/master/hw/sd/sd.c > > What are the relevant patches ? FYI, aspeed machines successfully boot on top of 16G emmc disk images. I merged some of xilinx patches on top of the aspeed-6.0 branch to improve the model completeness but only the one fixing powerup was really necessary. The initial diffstat is rather small. hw/sd/sd.c | 168 ++--- We can surely find a way to merge support in mainline without covering the whole specs. The Extended CSD register would be the big part. See : https://github.com/legoater/qemu/commits/aspeed-6.0 Cheers, C.
RE: eMMC support
Hi Joel, > -Original Message- > From: Joel Stanley > Sent: Thursday, September 17, 2020 6:25 AM > To: Sai Pavan Boddu ; Cédric Le Goater > > Cc: Philippe Mathieu-Daudé ; Edgar Iglesias > ; qemu-devel@nongnu.org > Subject: Re: eMMC support > > On Wed, 16 Sep 2020 at 18:35, Sai Pavan Boddu > wrote: > > > > Hi Philippe, > > > > > > > > We are looking to add eMMC support, I searched the mailing list and found > a series posted on eMMC by “Vincent Palatin” > > > > https://lists.gnu.org/archive/html/qemu-devel/2011-07/msg02833.html > > I would be interested in emmc support for the aspeed machines. Please cc > me when you post patches. > > > I would like to consider the above work and mix-up with more changes to > start adding support for eMMC. Do you have any suggestions on the > approach followed in above patches ? > > The patches had minor review comments, but I assume the reason they > didn't go anywhere is the author never followed up with further revisions. I > would suggest applying them to the current tree, cleaning up any style > changes that have happened since they were posted, and re-posting them > for review. [Sai Pavan Boddu] Ok thanks. I will re-post the patches mixing up with some of our work. Regards, Sai Pavan > > Cheers, > > Joel > > > > > > > > > Note: Here is the existing support available in Xilinx fork, which > > might require some work > > https://github.com/Xilinx/qemu/blob/master/hw/sd/sd.c > > > > > > > > Regards, > > Sai Pavan
RE: eMMC support
Hi Cedric, > -Original Message- > From: Cédric Le Goater > Sent: Thursday, September 17, 2020 11:55 AM > To: Joel Stanley ; Sai Pavan Boddu > Cc: Philippe Mathieu-Daudé ; Edgar Iglesias > ; qemu-devel@nongnu.org > Subject: Re: eMMC support > > On 9/17/20 2:55 AM, Joel Stanley wrote: > > On Wed, 16 Sep 2020 at 18:35, Sai Pavan Boddu > wrote: > >> > >> Hi Philippe, > >> > >> > >> > >> We are looking to add eMMC support, I searched the mailing list and > found a series posted on eMMC by “Vincent Palatin” > >> > >> https://lists.gnu.org/archive/html/qemu-devel/2011-07/msg02833.html > > > > I would be interested in emmc support for the aspeed machines. Please > > cc me when you post patches. > > > >> I would like to consider the above work and mix-up with more changes to > start adding support for eMMC. Do you have any suggestions on the > approach followed in above patches ? > > > > The patches had minor review comments, but I assume the reason they > > didn't go anywhere is the author never followed up with further > > revisions. I would suggest applying them to the current tree, cleaning > > up any style changes that have happened since they were posted, and > > re-posting them for review. > > It seems we only care about these three patches : > > https://patchwork.ozlabs.org/patch/106762 > https://patchwork.ozlabs.org/patch/106761 > https://patchwork.ozlabs.org/patch/106763 [Sai Pavan Boddu] Yeah, thanks for pointing. > > It should not be too complex to get something going. > >> Note: Here is the existing support available in Xilinx fork, which > >> might require some work > >> https://github.com/Xilinx/qemu/blob/master/hw/sd/sd.c > > What are the relevant patches ? [Sai Pavan Boddu] I would send out a series merging both the works, to make it easy for review. Thanks, Sai Pavan > > Thanks, > > C.
Re: eMMC support
On 9/17/20 2:55 AM, Joel Stanley wrote: > On Wed, 16 Sep 2020 at 18:35, Sai Pavan Boddu wrote: >> >> Hi Philippe, >> >> >> >> We are looking to add eMMC support, I searched the mailing list and found a >> series posted on eMMC by “Vincent Palatin” >> >> https://lists.gnu.org/archive/html/qemu-devel/2011-07/msg02833.html > > I would be interested in emmc support for the aspeed machines. Please > cc me when you post patches. > >> I would like to consider the above work and mix-up with more changes to >> start adding support for eMMC. Do you have any suggestions on the approach >> followed in above patches ? > > The patches had minor review comments, but I assume the reason they > didn't go anywhere is the author never followed up with further > revisions. I would suggest applying them to the current tree, cleaning > up any style changes that have happened since they were posted, and > re-posting them for review. It seems we only care about these three patches : https://patchwork.ozlabs.org/patch/106762 https://patchwork.ozlabs.org/patch/106761 https://patchwork.ozlabs.org/patch/106763 It should not be too complex to get something going. >> Note: Here is the existing support available in Xilinx fork, which might >> require some work >> https://github.com/Xilinx/qemu/blob/master/hw/sd/sd.c What are the relevant patches ? Thanks, C.
Re: eMMC support
On Wed, 16 Sep 2020 at 18:35, Sai Pavan Boddu wrote: > > Hi Philippe, > > > > We are looking to add eMMC support, I searched the mailing list and found a > series posted on eMMC by “Vincent Palatin” > > https://lists.gnu.org/archive/html/qemu-devel/2011-07/msg02833.html I would be interested in emmc support for the aspeed machines. Please cc me when you post patches. > I would like to consider the above work and mix-up with more changes to start > adding support for eMMC. Do you have any suggestions on the approach followed > in above patches ? The patches had minor review comments, but I assume the reason they didn't go anywhere is the author never followed up with further revisions. I would suggest applying them to the current tree, cleaning up any style changes that have happened since they were posted, and re-posting them for review. Cheers, Joel > > > > Note: Here is the existing support available in Xilinx fork, which might > require some work > https://github.com/Xilinx/qemu/blob/master/hw/sd/sd.c > > > > Regards, > Sai Pavan
eMMC support
Hi Philippe, We are looking to add eMMC support, I searched the mailing list and found a series posted on eMMC by "Vincent Palatin" https://lists.gnu.org/archive/html/qemu-devel/2011-07/msg02833.html I would like to consider the above work and mix-up with more changes to start adding support for eMMC. Do you have any suggestions on the approach followed in above patches ? Note: Here is the existing support available in Xilinx fork, which might require some work https://github.com/Xilinx/qemu/blob/master/hw/sd/sd.c Regards, Sai Pavan
Re: [Qemu-devel] sd: add SDHCI and eMMC support
On Tue, Jul 26, 2011 at 12:19 AM, Vincent Palatin vpala...@chromium.org wrote: This patchset adds the support for eMMC as found soldered on many embedded board in addition to current support for SD/SDHC cards. It also adds a standard SDHCI controller emulation. The first patches are a couple of fixes to the current SD code found while implementing these features. Hi Vincent, I'm curious what the status of your QEMU SD card work is? It seems a number of your patches have not been merged and I wonder if you are still hoping to get them upstream? Stefan
[Qemu-devel] sd: add SDHCI and eMMC support
Dear Qemu developers, This patchset adds the support for eMMC as found soldered on many embedded board in addition to current support for SD/SDHC cards. It also adds a standard SDHCI controller emulation. The first patches are a couple of fixes to the current SD code found while implementing these features. The SDHCI emulation has both a MMIO interface as found in several ARM SoC and a PCI interface. The PCI interface allows to test it with the current code base. I hope to send for review soon the patches for an ARM SoC using the MMIO interface. The PCI version of the SDHCI controller can be tested with such a command line : ./i386-softmmu/qemu -hda rootfs.qcow2 -device sdhci_pci -sd sd_image.raw An eMMC connected to the SDHCI controller can be instantied like this : ./x86_64-softmmu/qemu-system-x86_64 -hda rootfs.qcow2 -device sdhci_pci,block=internal_card -drive id=internal_card,if=emmc,file=emmc4G.raw The patch series has also been tested with MMC_TEST linux kernel module and a chromium image booted from eMMC. -- Vincent
[Qemu-devel] [PATCH 4/7] sd: add eMMC support
The parameters mimick a real 4GB eMMC, but it can be set to various sizes. Signed-off-by: Vincent Palatin vpala...@chromium.org --- hw/sd.c | 155 +++ 1 files changed, 136 insertions(+), 19 deletions(-) diff --git a/hw/sd.c b/hw/sd.c index de477fe..0db8d78 100644 --- a/hw/sd.c +++ b/hw/sd.c @@ -91,11 +91,13 @@ struct SDState { int function_group[6]; int spi; +int emmc; int current_cmd; int blk_written; uint64_t data_start; uint32_t data_offset; uint8_t data[512]; +uint8_t ext_csd[512]; qemu_irq readonly_cb; qemu_irq inserted_cb; BlockDriverState *bdrv; @@ -196,7 +198,7 @@ static uint16_t sd_crc16(void *message, size_t width) static void sd_set_ocr(SDState *sd) { /* All voltages OK, card power-up OK, Standard Capacity SD Memory Card */ -sd-ocr = 0x8000; +sd-ocr = 0x8080; } static void sd_set_scr(SDState *sd) @@ -250,13 +252,85 @@ static const uint8_t sd_csd_rw_mask[16] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0xfe, }; +static void mmc_set_ext_csd(SDState *sd, uint64_t size) +{ +uint32_t sectcount = size HWBLOCK_SHIFT; + +memset(sd-ext_csd, 0, 512); +sd-ext_csd[504] = 0x1; /* supported command sets */ +sd-ext_csd[503] = 0x1; /* HPI features */ +sd-ext_csd[502] = 0x1; /* Background operations support */ +sd-ext_csd[241] = 0xA; /* 1st initialization time after partitioning */ +sd-ext_csd[232] = 0x1; /* Trim multiplier */ +sd-ext_csd[231] = 0x15; /* Secure feature support */ +sd-ext_csd[230] = 0x96; /* Secure erase support */ +sd-ext_csd[229] = 0x96; /* Secure TRIM multiplier */ +sd-ext_csd[228] = 0x7; /* Boot information */ +sd-ext_csd[226] = 0x8; /* Boot partition size */ +sd-ext_csd[225] = 0x6; /* Access size */ +sd-ext_csd[224] = 0x4; /* HC Erase unit size */ +sd-ext_csd[223] = 0x1; /* HC erase timeout */ +sd-ext_csd[222] = 0x1; /* Reliable write sector count */ +sd-ext_csd[221] = 0x4; /* HC write protect group size */ +sd-ext_csd[220] = 0x8; /* Sleep current VCC */ +sd-ext_csd[219] = 0x7; /* Sleep current VCCQ */ +sd-ext_csd[217] = 0x11; /* Sleep/Awake timeout */ +sd-ext_csd[215] = (sectcount 24) 0xff; /* Sector count */ +sd-ext_csd[214] = (sectcount 16) 0xff; /* ... */ +sd-ext_csd[213] = (sectcount 8) 0xff; /* ... */ +sd-ext_csd[212] = (sectcount 0xff); /* ... */ +sd-ext_csd[210] = 0xa; /* Min write perf for 8bit@52Mhz */ +sd-ext_csd[209] = 0xa; /* Min read perf for 8bit@52Mhz */ +sd-ext_csd[208] = 0xa; /* Min write perf for 4bit@52Mhz */ +sd-ext_csd[207] = 0xa; /* Min read perf for 4bit@52Mhz */ +sd-ext_csd[206] = 0xa; /* Min write perf for 4bit@26Mhz */ +sd-ext_csd[205] = 0xa; /* Min read perf for 4bit@26Mhz */ +sd-ext_csd[199] = 0x1; /* Partition switching timing */ +sd-ext_csd[198] = 0x1; /* Out-of-interrupt busy timing */ +sd-ext_csd[196] = 0x7; /* Card type */ +sd-ext_csd[194] = 0x2; /* CSD Structure version */ +sd-ext_csd[192] = 0x5; /* Extended CSD revision */ +sd-ext_csd[168] = 0x1; /* RPMB size */ +sd-ext_csd[160] = 0x3; /* Partinioning support */ +sd-ext_csd[159] = 0x00; /* Max enhanced area size */ +sd-ext_csd[158] = 0x00; /* ... */ +sd-ext_csd[157] = 0xEC; /* ... */ +} + static void sd_set_csd(SDState *sd, uint64_t size) { uint32_t csize = (size (CMULT_SHIFT + HWBLOCK_SHIFT)) - 1; uint32_t sectsize = (1 (SECTOR_SHIFT + 1)) - 1; uint32_t wpsize = (1 (WPGROUP_SHIFT + 1)) - 1; -if (size = 0x4000) { /* Standard Capacity SD */ +if (sd-emmc) { /* eMMC */ +sd-csd[0] = 0xd0; +sd-csd[1] = 0x0f; +sd-csd[2] = 0x00; +sd-csd[3] = 0x32; +sd-csd[4] = 0x0f; +if (size = 0x8000ULL) { +/* use 1k blocks */ +uint32_t csize1k = (size (CMULT_SHIFT + 10)) - 1; +sd-csd[5] = 0x5a; +sd-csd[6] = 0x80 | ((csize1k 10) 0xf); +sd-csd[7] = (csize1k 2) 0xff; +} else { /* = 2GB : size stored in ext CSD, block addressing */ +sd-csd[5] = 0x59; +sd-csd[6] = 0x8f; +sd-csd[7] = 0xff; +sd-ocr |= 1 30; +} +sd-csd[8] = 0xff; +sd-csd[9] = 0xff; +sd-csd[10] = 0xf7; +sd-csd[11] = 0xfe; +sd-csd[12] = 0x49; +sd-csd[13] = 0x10; +sd-csd[14] = 0x00; +sd-csd[15] = (sd_crc7(sd-csd, 15) 1) | 1; +mmc_set_ext_csd(sd, size); +} else if (size = 0x4000) { /* Standard Capacity SD */ sd-csd[0] = 0x00; /* CSD structure */ sd-csd[1] = 0x26; /* Data read access-time-1 */ sd-csd[2] = 0x00; /* Data read access-time-2 */ @@ -305,9 +379,13 @@ static void sd_set_csd(SDState *sd, uint64_t size) } } -static void sd_set_rca(SDState *sd) +static void sd_set_rca(SDState *sd, uint16_t value)