CVSROOT:/sources/qemu
Module name:qemu
Changes by: Jocelyn Mayer j_mayer 07/04/24 06:32:01
Modified files:
hw : ppc.c
Log message:
PowerPC embedded timers fixes.
Improve PowerPC timers debug.
CVSWeb URLs:
CVSROOT:/sources/qemu
Module name:qemu
Changes by: Jocelyn Mayer j_mayer 07/04/24 06:37:21
Modified files:
hw : ppc405.h ppc405_uc.c
Log message:
PowerPC 405 microcontrollers fixes and improvments:
- use target_phys_addr_t for physical
CVSROOT:/sources/qemu
Module name:qemu
Changes by: Jocelyn Mayer j_mayer 07/04/24 06:50:21
Modified files:
target-ppc : cpu.h exec.h op.c op_helper.c op_helper.h
op_mem.h op_template.h translate.c
Log message:
Code provision for new
CVSROOT:/sources/qemu
Module name:qemu
Changes by: Jocelyn Mayer j_mayer 07/04/24 06:52:59
Modified files:
. : vl.c vl.h
Log message:
Add -pflash option to register parallel flash bloc devices.
CVSWeb URLs:
Hi Eduardo,
I have finished implementing the implementing the roll-back functionality
for transactional memory. There is one thing that I wanted to ask you. In
order to roll-back, I need to log all the memory references. So that in that
case when a transaction fails and roll-back occurs, memory
CVSROOT:/sources/qemu
Module name:qemu
Changes by: Jocelyn Mayer j_mayer 07/04/24 07:34:03
Modified files:
. : Makefile Makefile.target configure
Log message:
New target for embedded PowerPC emulation (only system emulation, for
now).
CVSWeb URLs:
CVSROOT:/sources/qemu
Module name:qemu
Changes by: Jocelyn Mayer j_mayer 07/04/24 07:36:03
Modified files:
target-ppc : op_helper.c
Log message:
Debug traces fixes.
CVSWeb URLs:
CVSROOT:/sources/qemu
Module name:qemu
Changes by: Jocelyn Mayer j_mayer 07/04/24 07:40:49
Modified files:
. : Makefile.target vl.c vl.h
Added files:
hw : ppc405_boards.c
Log message:
Evaluation boards for PowerPC 405EP.
CVSWeb
CVSROOT:/sources/qemu
Module name:qemu
Changes by: Jocelyn Mayer j_mayer 07/04/24 07:43:37
Modified files:
. : .cvsignore
Log message:
Update .cvsignore for new PowerPC embedded target.
CVSWeb URLs:
Hi!
This patch adds SP initialization fot the Malta YAMON pseudo-loader.
It allows to run standalone (written in C) applications:
http://www.nwpi.ru/~alec/mips/yamon_test_salone.tgz
$ qemu-system-mipsel -nographic -M malta -kernel yamon_test.elf
Could not configure '/dev/rtc' to have a 1024
Hi,
You have a description of memory access instruction format in cpu-all.h,
under
/* CPU memory access without any memory or io remapping */
These instructions are defined in softmmu_header.h. If you don't care too
much about performance it will be easier to modify the code written in C
(undef
Hello,
I'm trying to understand the ide.c - how it is structured, how it
works, etc. I see that the functions in ide.c get called from vl.c
through ioport_read_table. But I'm wondering how ide_data_readw(),
ide_ioport_read(), and ide_sector_read() are different, and also where
the actual
Hi,
There is some kind of problem in x86-64 Linux with MIPS64 emulation.
I was trying the Acer Pica 61 with the patch for memory mapped VGA and
got the following results:
Linux x86-64:
MIPS32: Ok
MIPS32EL: Ok
MIPS64: Blank screen
MIPS64EL: Blank screen
Linux x86:
MIPS32: Ok
MIPS32EL: Ok
CVSROOT:/sources/qemu
Module name:qemu
Changes by: Thiemo Seufer ths 07/04/24 22:57:37
Modified files:
hw : mips_malta.c
Log message:
Improved mini-bootloader, based on a patch by Alec Voropay.
CVSWeb URLs:
Has anyone thought about this? Is it even possible? Am I barking up the
wrong tree?
jonathan
--
--
Jonathan Kalbfeld
+1 323 620 6682
hi,
I am trying to use debug kgdb patched linux kernel on my qemu. Both
the native and target platform are IA32. I am wondering if there is
anyone can show me the procedure?
Thanks,
Neo
--
I would remember that if researchers were not ambitious
probably today we haven't the technology we are
In qemu-0.9.0, an exception in cmpxchg8b (e.g. page fault due to a
missing TLB entry) causes the wrong eip value to be pushed onto the
exception stack -- it seems to be the eip of the last exception or the
start of the translation block, whichever happened last. This makes
it impossible to
a patch like this was posted about 6 weeks ago. the
only difference I can see between this and the
previous patch is the location of the inserted
function.
take a look at
http://lists.gnu.org/archive/html/qemu-devel/2007-03/msg00123.html
for hints. This patch fixed the Solaris/express
Thanks. Looks like inline-generated instructions use
cpu_restore_state() to invert the translated PC into the simulated PC.
Nickolai.
scsi.tex patch reduces unnecessary mismatch.
lsi.txt corrects mismatch condition.
When the mismatch happens, register ia saves the instruction address.
However, QEMU call lsi_bad_phase first, update new dsp and
then save it into register ia.
The patch correct this problem.
Another fix is in the
20 matches
Mail list logo
