HMP "info usernet" has been available but it isn't ideal for programed
use cases. This closes the gap in QMP by adding a counterpart
"query-usernet" command. It is basically translated from
the HMP slirp_connection_info() loop, which now calls the QMP
implementation and prints the data, just like
There is already 'device-list-properties' which does most of the job,
however it does not handle everything returned by qom-list-types such
as machines as they inherit directly from TYPE_OBJECT and not TYPE_DEVICE.
It does not handle abstract classes either.
This adds a new qom-list-properties
Hi,
> > The connection between QemuConsole and User Interface (i.e. gtk, spice,
> > ...) is a bit more flexible. But also not really designed for hotplug
> > as QemuConsole is not hotpluggable in the first place ...
> >
> > We could drop the display property and use two devices instead.
> >
On Fri, Feb 23, 2018 at 10:05:17AM +0100, Gerd Hoffmann wrote:
> > Hi Gerd,
> >
> > It's a little bit concerning that the only way we can test the
> > region-based display support is with proprietary drivers that nobody
> > but NVIDIA has at this point. Have you considered adding region-based
>
Le 25/02/2018 à 19:13, no-re...@patchew.org a écrit :
> Hi,
>
> This series failed build test on s390x host. Please find the details below.
>
> Type: series
> Message-id: 20180225175928.13101-1-laur...@vivier.eu
> Subject: [Qemu-devel] [PULL 0/4] Linux user for 2.12 patches
>
...
> === TEST
On 19/02/18 13:46, Alexey Kardashevskiy wrote:
> On 16/02/18 16:28, David Gibson wrote:
>> On Wed, Feb 14, 2018 at 08:55:41AM -0700, Alex Williamson wrote:
>>> On Wed, 14 Feb 2018 19:09:16 +1100
>>> Alexey Kardashevskiy wrote:
>>>
On 14/02/18 12:33, David Gibson wrote:
>
On 25/02/2018 23:52, Huaicheng Li wrote:
> I remember there were some discussions back in 2015 about this, but I
> don't see it finally done. For this project, I think we can go in three
> steps: (1). add the shadow doorbell buffer support into QEMU NVMe
> emulation, this will reduce # of
On Fri, 23 Feb 2018 18:36:57 +0100
David Hildenbrand wrote:
> Right now it is possible to crash QEMU for s390x by providing e.g.
> -numa node,nodeid=0,cpus=0-1
>
> Problem is, that numa.c uses mc->cpu_index_to_instance_props as an
> indicator whether NUMA is supported by a
On 23/2/2018 9:47 PM, Mark Cave-Ayland wrote:
Commit ef0e64a983 "ide: pass IDEState to trim AIO callback" changed the
IDE trim callback from using a BlockBackend to an IDEState but forgot to update
the dma_blk_io() call in hw/ide/macio.c accordingly.
I somehow missed this whole macio part
On Fri, Feb 23, 2018 at 04:13:08PM -0600, Wei Huang wrote:
>
>
> On 02/22/2018 03:00 AM, Andrew Jones wrote:
> > On Wed, Feb 21, 2018 at 10:44:17PM -0600, Wei Huang wrote:
> >> This patch adds migration test support for aarch64. The test code, which
> >> implements the same functionality as x86,
On Fri, Feb 23, 2018 at 03:58:57PM -0600, Wei Huang wrote:
> This patch moves the settings related migration-test from the
> migration-test.c file to a seperate header file. It also renames the
> x86-a-b-bootblock.s file extension from .s to .S, allowing gcc
> pre-processor to include the C-style
On Fri, Feb 23, 2018 at 03:58:56PM -0600, Wei Huang wrote:
> The x86 boot block header currently is generated with a shell script.
> To better support other CPUs (e.g. aarch64), we convert the script
> into Makefile. This allows us to 1) support cross-compilation easily,
> and 2) avoid creating a
On Fri, Feb 23, 2018 at 03:58:55PM -0600, Wei Huang wrote:
> This patch moves the auto detection functions for cross compilation from
> roms/Makefile to rules.mak. So the functions can be shared among Makefiles
> in QEMU.
>
> Signed-off-by: Wei Huang
> ---
> roms/Makefile | 24
On 02/23/2018 06:36 PM, David Hildenbrand wrote:
> Right now it is possible to crash QEMU for s390x by providing e.g.
> -numa node,nodeid=0,cpus=0-1
>
> Problem is, that numa.c uses mc->cpu_index_to_instance_props as an
> indicator whether NUMA is supported by a machine type. We don't
>
On Monday, February 26, 2018 1:07 PM, Wei Wang wrote:
> On 02/09/2018 07:50 PM, Dr. David Alan Gilbert wrote:
> > * Wei Wang (wei.w.w...@intel.com) wrote:
> >> Use the free page reporting feature from the balloon device to clear
> >> the bits corresponding to guest free pages from the dirty
On 26.02.2018 10:20, Christian Borntraeger wrote:
>
>
> On 02/23/2018 06:36 PM, David Hildenbrand wrote:
>> Right now it is possible to crash QEMU for s390x by providing e.g.
>> -numa node,nodeid=0,cpus=0-1
>>
>> Problem is, that numa.c uses mc->cpu_index_to_instance_props as an
>> indicator
On 02/17/2018 05:31 PM, Richard Henderson wrote:
> Instead of returning DisasJumpType, immediately store it.
neat!
> Signed-off-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
> ---
> target/hppa/translate.c | 971
>
On Fri, Feb 23, 2018 at 03:58:58PM -0600, Wei Huang wrote:
> This patch adds migration test support for aarch64. The test code, which
> implements the same functionality as x86, is booted as a kernel in qemu.
> Here are the design choices we make for aarch64:
>
> * We choose this -kernel
On Fri, Feb 23, 2018 at 03:58:57PM -0600, Wei Huang wrote:
> This patch moves the settings related migration-test from the
> migration-test.c file to a seperate header file. It also renames the
> x86-a-b-bootblock.s file extension from .s to .S, allowing gcc
> pre-processor to include the C-style
On 02/23/18 14:23, marcandre.lur...@redhat.com wrote:
> From: Marc-André Lureau
>
> This module will initialize TPM device, measure reported FVs and BIOS
> version.
>
> CC: Laszlo Ersek
> CC: Stefan Berger
>
On Mon, Feb 26, 2018 at 10:30:31AM +0100, Andrew Jones wrote:
> On Fri, Feb 23, 2018 at 03:58:58PM -0600, Wei Huang wrote:
> > +/* aarch64 virt machine physical memory starts at 0x4000, which
> > + * is also the kernel loader base address. It should be fine to
>
> It's not the
The use of WHvGetExitContextSize will break ABI compatibility if the platform
changes the context size while a qemu compiled executable does not recompile.
To avoid this we now use sizeof and let the platform determine which version
of the struction was passed for ABI compatibility.
On 02/26/2018 01:48 PM, Cornelia Huck wrote:
On Mon, 26 Feb 2018 11:42:29 +0100
Thomas Huth wrote:
From: "Collin L. Walling"
Set boot menu options for an s390 guest and store them in
the iplb. These options are set via the QEMU command line
1. Fixes the changes required to the WHvTryMmioEmulation, WHvTryIoEmulation, and
WHvEmulatorCreateEmulator based on the new VpContext forwarding.
2. Removes the WHvRunVpExitReasonAlerted case.
Signed-off-by: Justin Terry (VM)
---
target/i386/whpx-all.c | 26
Renames the usage of 'memio' to 'mmio' in the emulator callbacks.
Signed-off-by: Justin Terry (VM)
---
target/i386/whpx-all.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/target/i386/whpx-all.c b/target/i386/whpx-all.c
index
This patch moves the auto detection functions for cross compilation from
roms/Makefile to rules.mak. So the functions can be shared among Makefiles
in QEMU.
Signed-off-by: Wei Huang
Reviewed-by: Andrew Jones
---
roms/Makefile | 24 +++-
On 02/26/2018 03:03 AM, Andrew Jones wrote:
> On Fri, Feb 23, 2018 at 04:13:08PM -0600, Wei Huang wrote:
>>
>>
>> On 02/22/2018 03:00 AM, Andrew Jones wrote:
>>> On Wed, Feb 21, 2018 at 10:44:17PM -0600, Wei Huang wrote:
This patch adds migration test support for aarch64. The test code,
On 02/26/2018 02:29 PM, Collin L. Walling wrote:
On 02/26/2018 01:48 PM, Cornelia Huck wrote:
On Mon, 26 Feb 2018 11:42:29 +0100
Thomas Huth wrote:
[...]
3 files changed, 66 insertions(+), 4 deletions(-)
+static void s390_ipl_set_boot_menu(S390IPLState *ipl)
+{
+
* Zhangjixiang (jixiang_zh...@h3c.com) wrote:
> From 295640e6f4aa83b843e245bb1af9995be37de84d Mon Sep 17 00:00:00 2001
> From: zhangjixiang
> Date: Sun, 25 Feb 2018 09:47:51 +0800
> Subject: [PATCH] HMP: Initialize err before using
>
> When bdrv_snapshot_delete return
* Wei Huang (w...@redhat.com) wrote:
> The x86 boot block header currently is generated with a shell script.
> To better support other CPUs (e.g. aarch64), we convert the script
> into Makefile. This allows us to 1) support cross-compilation easily,
> and 2) avoid creating a script file for every
On Mon, 26 Feb 2018 11:42:29 +0100
Thomas Huth wrote:
> From: "Collin L. Walling"
>
> Set boot menu options for an s390 guest and store them in
> the iplb. These options are set via the QEMU command line
> option:
>
> -boot
There are filesystems (among which is tmpfs) that have a hard time
reporting allocation status. That is definitely a bug in them.
However, there is no good reason why qemu-img convert should query the
allocation status in the first place. It does zero detection by itself
anyway, so we can
This patch moves the settings related migration-test from the
migration-test.c file to a seperate header file. It also renames the
x86-a-b-bootblock.s file extension from .s to .S, allowing gcc
pre-processor to include the C-style header file correctly.
Signed-off-by: Wei Huang
Fixes an issue where the SDK that was releases had a different casing for the
*.h and *.lib files causing a build break if linked directly from Windows Kits.
Signed-off-by: Justin Terry (VM)
---
configure | 10 +-
target/i386/whpx-all.c | 4 ++--
2
This change set includes fixes for two breaking changes that were introduced
in the Windows Insider SDK 17095. First, the casing of the headers/libs changed
such that a direct reference out of Windows Kits will fail during compile on
case sensitive file systems. Second, a few API's were modified
Improves the usage of the InterruptNotification registration by skipping the
additional call to WHvSetVirtualProcessorRegisters if we have already
registered for the window exit.
Signed-off-by: Justin Terry (VM)
---
target/i386/whpx-all.c | 7 +++
1 file changed, 3
This patch adds migration test support for aarch64. The test code, which
implements the same functionality as x86, is booted as a kernel in qemu.
Here are the design choices we make for aarch64:
* We choose this -kernel approach because aarch64 QEMU doesn't provide a
built-in fw like x86
Fixes an issue where if the tpr is assigned to the array but not a different
value from what is already expected on the vp the code will skip incrementing
the reg_count. In this case its possible that we set an invalid memory section
of the next call for DeliverabilityNotifications that was not
On 02/23/2018 11:20 AM, Markus Armbruster wrote:
Eric Blake writes:
On 02/11/2018 03:35 AM, Markus Armbruster wrote:
Whenever qapi-schema.json changes, we run six programs eleven times to
update eleven files. Similar for qga/qapi-schema.json. This is
silly. Replace the
Minor code cleanup. The calls to __debugbreak() are not required and should
no longer be used to prevent unnecessary breaks.
Signed-off-by: Justin Terry (VM)
---
target/i386/whpx-all.c | 12
1 file changed, 12 deletions(-)
diff --git a/target/i386/whpx-all.c
The code already is holding the qemu_mutex for the IO thread. We do not need
to additionally take the lock again in this case.
Signed-off-by: Justin Terry (VM)
---
target/i386/whpx-all.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/target/i386/whpx-all.c
On 02/26/2018 12:01 PM, Dr. David Alan Gilbert wrote:
> * Wei Huang (w...@redhat.com) wrote:
>> The x86 boot block header currently is generated with a shell script.
>> To better support other CPUs (e.g. aarch64), we convert the script
>> into Makefile. This allows us to 1) support
This patchset adds a migration test for aarch64. It leverages
Dave Gilbert's recent patch "tests/migration: Add source to PC boot block"
to create a new test case for aarch64.
V5->V6:
* Add Reviewed-by to patch 1-3
* Add more design notes in patch 4 (aarch64 assembly compilation, bin space)
The x86 boot block header currently is generated with a shell script.
To better support other CPUs (e.g. aarch64), we convert the script
into Makefile. This allows us to 1) support cross-compilation easily,
and 2) avoid creating a script file for every architecture.
Signed-off-by: Wei Huang
Triaging old bug tickets... can you still reproduce this issue with the
latest version of QEMU? Or could we close this ticket nowadays? Can you
provide a binary to reproduce this issue?
** Changed in: qemu
Status: New => Incomplete
--
You received this bug notification because you are a
The RISC-V disassembler has no dependencies outside of the 'disas'
directory so it can be applied independently. The majority of the
disassembler is machine-generated from instruction set metadata:
- https://github.com/michaeljclark/riscv-meta
Expected checkpatch errors for consistency and
GDB Register read and write routines.
Reviewed-by: Richard Henderson
Signed-off-by: Michael Clark
---
target/riscv/gdbstub.c | 62 ++
1 file changed, 62 insertions(+)
create mode 100644
Helper routines for FPU instructions and NaN definitions.
Reviewed-by: Richard Henderson
Signed-off-by: Michael Clark
---
fpu/softfloat-specialize.h | 7 +-
target/riscv/fpu_helper.c | 373 +
2 files
Add Michael Clark, Palmer Dabbelt, Sagar Karandikar and Bastian
Koppelmann as RISC-V Maintainers.
Reviewed-by: Richard Henderson
Reviewed-by: Alistair Francis
Signed-off-by: Michael Clark
---
MAINTAINERS | 11
Simple model of the PRCI (Power, Reset, Clock, Interrupt) to emulate
register reads made by the SDK BSP.
Acked-by: Richard Henderson
Signed-off-by: Michael Clark
---
hw/riscv/sifive_prci.c | 89 ++
I've pushed a signed tag which includes the cover letter for the pull
request.
https://github.com/riscv/riscv-qemu/releases/tag/riscv-qemu-upstream-v7
Apologies. I'm not exactly sure how to format a pull request email.
On Tue, Feb 27, 2018 at 11:17 AM, Michael Clark wrote:
>
On 02/23/2018 11:41 AM, Markus Armbruster wrote:
+++ b/Makefile
@@ -92,10 +92,70 @@ include $(SRC_PATH)/rules.mak
GENERATED_FILES = qemu-version.h config-host.h qemu-options.def
GENERATED_FILES += qapi-builtin-types.h qapi-builtin-types.c
GENERATED_FILES += qapi-types.h qapi-types.c
Hi,
This series failed docker-mingw@fedora build test. Please find the testing
commands and
their output below. If you have Docker installed, you can probably reproduce it
locally.
Type: series
Message-id: cover.1519647019.git.arei.gong...@huawei.com
Subject: [Qemu-devel] [PATCH v7 0/4]
The normal gdb definition of the XER registers is only 32 bit,
and that's what the current version of power64-core.xml also
says (seems copied from gdb's). But qemu's idea of the XER register
is target_ulong (in CPUPPCState, ppc_gdb_register_len and
ppc_cpu_gdb_read_register)
That mismatch leads
This provides a RISC-V Board compatible with the the SiFive E300 SDK.
The following machine is implemented:
- 'sifive_e300'; CLINT, PLIC, UART, AON, GPIO, QSPI, PWM
Acked-by: Richard Henderson
Signed-off-by: Michael Clark
---
The CLINT (Core Local Interruptor) device provides real-time clock, timer
and interprocessor interrupts based on SiFive's CLINT specification.
Acked-by: Richard Henderson
Signed-off-by: Michael Clark
---
hw/riscv/sifive_clint.c | 254
Privileged control and status register helpers and page fault handling.
Reviewed-by: Richard Henderson
Signed-off-by: Michael Clark
---
target/riscv/helper.c| 503
target/riscv/helper.h| 78 ++
RISC-V machine with device-tree, 16550a UART and VirtIO MMIO.
The following machine is implemented:
- 'virt'; CLINT, PLIC, 16550A UART, VirtIO MMIO, device-tree
Acked-by: Richard Henderson
Signed-off-by: Michael Clark
---
hw/riscv/virt.c
RISC-V machines compatble with Spike aka riscv-isa-sim, the RISC-V
Instruction Set Simulator. The following machines are implemented:
- 'spike_v1.9'; HTIF console, config-string, Privileged ISA Version 1.9.1
- 'spike_v1.10'; HTIF console, device-tree, Privileged ISA Version 1.10
Acked-by:
HTIF (Host Target Interface) provides console emulation for QEMU. HTIF
allows identical copies of BBL (Berkeley Boot Loader) and linux to run
on both Spike and QEMU. BBL provides HTIF console access via the
SBI (Supervisor Binary Interface) and the linux kernel SBI console.
The HTIT chardev
Holds the state of a heterogenous array of RISC-V hardware threads.
Reviewed-by: Richard Henderson
Signed-off-by: Michael Clark
---
hw/riscv/riscv_hart.c | 89 +++
include/hw/riscv/riscv_hart.h | 39
This adds RISC-V into the build system enabling the following targets:
- riscv32-softmmu
- riscv64-softmmu
- riscv32-linux-user
- riscv64-linux-user
This adds defaults configs for RISC-V, enables the build for the RISC-V
CPU core, hardware, and Linux User Emulation. The 'qemu-binfmt-conf.sh'
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: 1519683480-33201-1-git-send-email-...@sifive.com
Subject: [Qemu-devel] [PATCH v7 00/23] RISC-V QEMU Port Submission
=== TEST SCRIPT BEGIN ===
#!/bin/bash
BASE=base
n=1
Michael, can you please apply this patch to stable?
git cherry-pick 302705876
Regards,
Stefan
The flags of the CMD_INIT control channel command were not
initialized properly. Fix this and set to 0.
Signed-off-by: Stefan Berger
Reviewed-by: Marc-André Lureau
Add CPU state header, CPU definitions and initialization routines
Reviewed-by: Richard Henderson
Signed-off-by: Michael Clark
---
target/riscv/cpu.c | 390 +
target/riscv/cpu.h | 275
Define RISC-V ELF machine EM_RISCV 243
Reviewed-by: Richard Henderson
Reviewed-by: Alistair Francis
Signed-off-by: Michael Clark
---
include/elf.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/elf.h
QEMU RISC-V Emulation Support (RV64GC, RV32GC)
With this reelase we have contacted all contributors and have received
agreement to re-license their work as GPLv2+. This release also updates
linux-user/riscv/termbits.h which should fix S390 builds. The spike_v1.9
machine has been renamed to
The RISC-V HTIF (Host Target Interface) console device requires access
to the symbol table to locate the 'tohost' and 'fromhost' symbols.
Reviewed-by: Richard Henderson
Signed-off-by: Michael Clark
---
hw/core/loader.c | 18 --
Test finisher memory mapped device used to exit simulation.
Acked-by: Richard Henderson
Signed-off-by: Michael Clark
---
hw/riscv/sifive_test.c | 93 ++
include/hw/riscv/sifive_test.h | 42
QEMU model of the UART on the SiFive E300 and U500 series SOCs.
BBL supports the SiFive UART for early console access via the SBI
(Supervisor Binary Interface) and the linux kernel SBI console.
The SiFive UART implements the pre qom legacy interface consistent
with the 16550a UART in
This provides a RISC-V Board compatible with the the SiFive U500 SDK.
The following machine is implemented:
- 'sifive_u500'; CLINT, PLIC, UART, device-tree
Acked-by: Richard Henderson
Signed-off-by: Michael Clark
---
hw/riscv/sifive_u500.c
On Fri, Feb 16, 2018 at 01:16:20PM +, Dr. David Alan Gilbert (git) wrote:
> From: "Dr. David Alan Gilbert"
>
> This message is sent just before the end of postcopy to get the
> client to stop using userfault since we wont respond to any more
> requests. It should close
Hi Eric,
On Mon, Feb 26, 2018 at 5:14 AM, Auger Eric wrote:
> Hi Jintack,
>
> On 21/02/18 05:03, Jintack Lim wrote:
>> Hi,
>>
>> I'm using vhost with the virtual intel-iommu, and this page[1] shows
>> the QEMU command line example.
>>
>> qemu-system-x86_64 -M
On Mon, 26 Feb 2018 09:35:51 +0100
Gerd Hoffmann wrote:
> On Fri, Feb 23, 2018 at 10:05:17AM +0100, Gerd Hoffmann wrote:
> > > Hi Gerd,
> > >
> > > It's a little bit concerning that the only way we can test the
> > > region-based display support is with proprietary drivers
Triaging old bug tickets... can you still reproduce this issue with the
latest version of QEMU? Or could we close this ticket nowadays?
** Changed in: qemu
Status: New => Incomplete
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to
Implements the physical memory protection extension as specified in
Privileged ISA Version 1.10.
PMP (Physical Memory Protection) is as-of-yet unused and needs testing.
The SiFive verification team have PMP test cases that will be run.
Nothing currently depends on PMP support. It would be
The PLIC (Platform Level Interrupt Controller) device provides a
parameterizable interrupt controller based on SiFive's PLIC specification.
Acked-by: Richard Henderson
Signed-off-by: Michael Clark
---
hw/riscv/sifive_plic.c | 505
TCG code generation for the RV32IMAFDC and RV64IMAFDC. The QEMU
RISC-V code generator has complete coverage for the Base ISA v2.2,
Privileged ISA v1.9.1 and Privileged ISA v1.10:
- RISC-V Instruction Set Manual Volume I: User-Level ISA Version 2.2
- RISC-V Instruction Set Manual Volume II:
From: Gonglei
Usage:
-chardev socket,id=charcrypto0,path=/path/to/your/socket
-object cryptodev-vhost-user,id=cryptodev0,chardev=charcrypto0
-device virtio-crypto-pci,id=crypto0,cryptodev=cryptodev0
Signed-off-by: Gonglei
Signed-off-by:
From: Gonglei
Impliment the vhost-crypto's funtions, such as startup,
stop and notification etc. Introduce an enum
QCryptoCryptoDevBackendOptionsType in order to
identify the cryptodev vhost backend is vhost-user
or vhost-kernel-module (If exist).
At this point, the
From: Gonglei
Introduce two vhost-user meassges: VHOST_USER_CREATE_CRYPTO_SESSION
and VHOST_USER_CLOSE_CRYPTO_SESSION. At this point, the QEMU side
support crypto operation in cryptodev host-user backend.
Signed-off-by: Gonglei
Signed-off-by:
On 2018年02月21日 18:18, Thomas Huth wrote:
"-net" is a legacy option that often causes confusion and
misconfigurations for the users, since most people are not aware
of the underlying "vlan" (i.e. hub) concept that is used for this
parameter. The prefered way of configuring your network stack is
Closing according to comment #2.
** Changed in: qemu
Status: New => Fix Released
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devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1428958
Title:
random IO errors / data corruption in VMs
Implementation of linux user emulation for RISC-V.
Reviewed-by: Richard Henderson
Signed-off-by: Michael Clark
---
linux-user/elfload.c | 22 +++
linux-user/main.c | 99 +
linux-user/riscv/syscall_nr.h
From: Gonglei
I posted the RFC verion a few months ago for DPDK
vhost-crypto implmention, and now it's time to send
the formal version. Because we need an user space scheme
for better performance.
The vhost user crypto server side patches had been
sent to DPDK
From: Gonglei
Signed-off-by: Gonglei
---
backends/cryptodev-vhost-user.c | 4
include/sysemu/cryptodev-vhost-user.h | 3 +++
2 files changed, 7 insertions(+)
diff --git a/backends/cryptodev-vhost-user.c
On Mon, 01/22 23:07, Max Reitz wrote:
> @@ -101,7 +105,7 @@ static BlockErrorAction
> mirror_error_action(MirrorBlockJob *s, bool read,
> }
> }
>
> -static void mirror_iteration_done(MirrorOp *op, int ret)
> +static void coroutine_fn mirror_iteration_done(MirrorOp *op, int ret)
> {
>
** Also affects: gentoo
Importance: Undecided
Status: New
** No longer affects: gentoo
--
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https://bugs.launchpad.net/bugs/1750899
Title:
Mouse cursor sometimes can't pass the
dev could be NULL if the PCI device can not be found due to some
reasons, so we must not dereference the pointer in this case.
Signed-off-by: Thomas Huth
---
tests/libqos/virtio-pci.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git
v8:
- rebased on the master
v7:
- rebased on the master
v2 ... v6:
- delete the "used_memslots" global variable, and add it
for vhost-user and vhost-kernel separately
- refine the function, commit log
- used_memslots refactoring
Jay Zhou (2):
vhost: fix memslot limit check
vhost:
Used_memslots is shared by vhost kernel and user, it is equal to
dev->mem->nregions, which is correct for vhost kernel, but not for
vhost user, the latter one uses memory regions that have file
descriptor. E.g. a VM has a vhost-user NIC and 8(vhost user memslot
upper limit) memory slots, it will
Since used_memslots will be updated to the actual value after
registering memory listener for the first time, move the
memslots limit checking to the right place.
Reviewed-by: Igor Mammedov
Signed-off-by: Jay Zhou
---
hw/virtio/vhost.c | 19
From: Dave Airlie
Due to a kernel bug we can never increase the size of capability
set 1, so introduce a new capability set in parallel, old userspace
will continue to use the old set, new userspace will start using
the new one when it detects a fixed kernel.
v2: don't use a
The following changes since commit 0a773d55ac76c5aa89ed9187a3bc5af8c5c2a6d0:
maintainers: Add myself as a OpenBSD maintainer (2018-02-23 12:05:07 +)
are available in the git repository at:
git://git.kraxel.org/qemu tags/vga-20180227-pull-request
for you to fetch changes up to
On Sat, Feb 17, 2018 at 7:32 PM, Philippe Mathieu-Daudé wrote:
> [Me]
>> +#define DEBUG_SII9022 0
>> +
>> +#define DPRINTF(fmt, ...) \
>> +do { \
>> +if (DEBUG_SII9022) { \
>> +printf("sii9022: " fmt, ## __VA_ARGS__); \
>> +} \
>> +} while (0)
On 2018年02月22日 17:04, Thomas Huth wrote:
The functions are only used in this single .c file, so there is
no need to put all this code in a header that is included from
multiple places.
Signed-off-by: Thomas Huth
---
hw/net/net_rx_pkt.c| 44
On 02/26/2018 04:18 PM, Michael Clark wrote:
This adds RISC-V into the build system enabling the following targets:
- riscv32-softmmu
- riscv64-softmmu
- riscv32-linux-user
- riscv64-linux-user
This adds defaults configs for RISC-V, enables the build for the RISC-V
CPU core, hardware, and
On 02/26/2018 04:57 PM, Eric Blake wrote:
Commit f0df84c6 added watchdog-set-action in the main qapi-schema.json,
but it belongs better in qapi/run-state.json alongside the definition
of WatchdogAction.
I'm adding:
The command was written prior to commit 0e201d34 creating the latter
file,
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
The following changes since commit 0a773d55ac76c5aa89ed9187a3bc5af8c5c2a6d0:
maintainers: Add myself as a OpenBSD maintainer (2018-02-23 12:05:07 +)
are available in the git repository at:
https://github.com/riscv/riscv-qemu.git
On Mon, Feb 26, 2018 at 12:35:31PM +0800, Wei Wang wrote:
> On 02/09/2018 08:15 PM, Dr. David Alan Gilbert wrote:
> > * Wei Wang (wei.w.w...@intel.com) wrote:
> > > This patch adds a timer to limit the time that host waits for the free
> > > page hints reported by the guest. Users can specify the
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