On Fri, May 18, 2018 at 05:13:27PM +0200, Marc-André Lureau wrote:
> Hi
>
> On Thu, May 17, 2018 at 11:25 AM, Gerd Hoffmann wrote:
> > Signed-off-by: Gerd Hoffmann
> > ---
>
> Could you explain where the 0x80 offset comes from?
Pulled out of thin air.
We're going to make the next release be 3.0, not 2.13; change
the annotations in our json appropriately.
Changes produced with
sed -i -e 's/2\.13/3.0/g' qapi/*.json
Signed-off-by: Peter Maydell
---
qapi/block-core.json | 4 ++--
qapi/common.json | 2 +-
Rename the 2.13 machines to match the number we're going to
use for the next release.
Signed-off-by: Peter Maydell
---
hw/s390x/s390-virtio-ccw.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/hw/s390x/s390-virtio-ccw.c
Am 18.05.2018 um 20:12 hat Eric Blake geschrieben:
> On 05/18/2018 08:21 AM, Kevin Wolf wrote:
> > This adds QMP commands that control the transition between states of the
> > job lifecycle.
> >
> > Signed-off-by: Kevin Wolf
> > ---
> > qapi/job.json | 99
Update references to 2.13 to read 3.0, since that's the
number we're using for the next release.
Signed-off-by: Peter Maydell
---
qemu-doc.texi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/qemu-doc.texi b/qemu-doc.texi
index
Rename the 2.13 machine types to match what we're going to
use as our next release number.
Signed-off-by: Peter Maydell
---
hw/i386/pc_piix.c | 8
hw/i386/pc_q35.c | 8
2 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/hw/i386/pc_piix.c
On Tue, May 22, 2018 at 09:40:44AM +0100, Peter Maydell wrote:
> On 22 May 2018 at 04:03, Peter Xu wrote:
> > On Mon, May 21, 2018 at 03:03:49PM +0100, Peter Maydell wrote:
> >> If an IOMMU supports mappings that care about the memory
> >> transaction attributes, then it no
On 22 May 2018 at 12:02, Peter Xu wrote:
> On Tue, May 22, 2018 at 09:40:44AM +0100, Peter Maydell wrote:
>> On 22 May 2018 at 04:03, Peter Xu wrote:
>> The reason for not just passing in the transaction attributes to
>> translate is that
>> (a) the iommu
On Tue, 22 May 2018 11:39:57 +0100
Peter Maydell wrote:
> Rename the 2.13 machine types to match what we're going to
> use as our next release number.
>
> Signed-off-by: Peter Maydell
> ---
> hw/i386/pc_piix.c | 8
>
On 22.05.2018 12:39, Peter Maydell wrote:
> Rename the 2.13 machines to match the number we're going to
> use for the next release.
>
> Signed-off-by: Peter Maydell
> ---
> target/ppc/cpu.h| 2 +-
> hw/ppc/spapr.c | 14 +++---
>
On 22.05.2018 12:40, Peter Maydell wrote:
> Update references to 2.13 to read 3.0, since that's the
> number we're using for the next release.
>
> Signed-off-by: Peter Maydell
> ---
> qemu-doc.texi | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff
Pavel Balaev writes:
> Hello,
>
> Now savevm, loadvm and delvm commands only allowed from hmp monitor.
> This patch adds ability to send them via QMP api.
>
> Signed-off-by: Pavel Balaev
Quoting my reply to a prior similar patch:
savevm and loadvm are HMP only
Peter Maydell writes:
> As part of plumbing MemTxAttrs down to the IOMMU translate method,
> add MemTxAttrs as an argument to tb_invalidate_phys_addr().
> Its callers either have an attrs value to hand, or don't care
> and can use MEMTXATTRS_UNSPECIFIED.
>
>
On 22 May 2018 at 07:52, Jan Kiszka wrote:
> There was a nasty flip in identifying which register group an access is
> targeting. The issue caused spuriously raised priorities of the guest
> when handing CPUs over in the Jailhouse hypervisor.
>
> Signed-off-by: Jan Kiszka
Hi Richard,
On Sat, May 12, 2018 at 10:57 AM, Richard Henderson
wrote:
> I have one xtensa image against which to test this.
> There are enough options going on here in the xtensa
> frontend that this probably needs a better work-out.
>
>
> r~
>
>
> Richard
On 21 May 2018 at 16:49, Michael Walle wrote:
> The following changes since commit 81e9cbd0ca1131012b058df6804b1f626a6b730c:
>
> lm32: take BQL before writing IP/IM register (2018-05-21 13:37:12 +0200)
>
> are available in the git repository at:
>
>
Peter Maydell writes:
> As part of plumbing MemTxAttrs down to the IOMMU translate method,
> add MemTxAttrs as an argument to address_space_access_valid().
> Its callers either have an attrs value to hand, or don't care
> and can use MEMTXATTRS_UNSPECIFIED.
>
>
Peter Maydell writes:
> As part of plumbing MemTxAttrs down to the IOMMU translate method,
> add MemTxAttrs as an argument to address_space_get_iotlb_entry().
>
> Signed-off-by: Peter Maydell
Reviewed-by: Alex Bennée
On Tue, 22 May 2018 11:40:00 +0100
Peter Maydell wrote:
> Update references to 2.13 to read 3.0, since that's the
> number we're using for the next release.
>
> Signed-off-by: Peter Maydell
> ---
> qemu-doc.texi | 4 ++--
> 1 file changed, 2
On Wed, May 16, 2018 at 03:43:48PM +0200, Laurent Vivier wrote:
> Hi Bala,
>
> I've tested you patch migrating a pseries between a P9 host and a P8
> host with 1G huge page size on the P9 side and 16MB on P8 side and the
> information are strange now.
Hi Laurent,
Thank you for testing the patch,
On 13 May 2018 at 15:35, Eric Auger wrote:
> Let's check if KVM_VGIC_V3_ADDR_TYPE_REDIST_REGION is supported.
> If not, we check the number of redist region is equal to 1 and use the
> legacy KVM_VGIC_V3_ADDR_TYPE_REDIST attribute. Otherwise we use
> the new attribute and
Peter Maydell writes:
> Add more detail to the documentation for memory_region_init_iommu()
> and other IOMMU-related functions and data structures.
>
> Signed-off-by: Peter Maydell
Reviewed-by: Alex Bennée
> ---
>
Am 18.05.2018 um 20:22 hat Eric Blake geschrieben:
> On 05/18/2018 08:21 AM, Kevin Wolf wrote:
> > This adds a minimal query-jobs implementation that shouldn't pose many
> > design questions. It can later be extended to expose more information,
> > and especially job-specific information.
> >
> >
Peter Maydell writes:
> As part of plumbing MemTxAttrs down to the IOMMU translate method,
> add MemTxAttrs as an argument to flatview_extend_translation().
> Its callers either have an attrs value to hand, or don't care
> and can use MEMTXATTRS_UNSPECIFIED.
>
>
Peter Maydell writes:
> As part of plumbing MemTxAttrs down to the IOMMU translate method,
> add MemTxAttrs as an argument to memory_region_access_valid().
> Its callers either have an attrs value to hand, or don't care
> and can use MEMTXATTRS_UNSPECIFIED.
>
> The
On Tue, 22 May 2018 11:39:56 +0100
Peter Maydell wrote:
> We're going to make the next release be 3.0, not 2.13; change
> the annotations in our json appropriately.
>
> Changes produced with
> sed -i -e 's/2\.13/3.0/g' qapi/*.json
>
> Signed-off-by: Peter Maydell
Hi Peter,
On 05/21/2018 04:03 PM, Peter Maydell wrote:
> Add more detail to the documentation for memory_region_init_iommu()
> and other IOMMU-related functions and data structures.
>
> Signed-off-by: Peter Maydell
Reviewed-by: Eric Auger
On 13 May 2018 at 15:35, Eric Auger wrote:
> With a VGICv3 KVM device, if the number of vcpus exceeds the
> capacity of the legacy redistributor region (123 redistributors),
> we now attempt to register the second redistributor region. This
> extends the number of vcpus to
On 22 May 2018 at 13:33, Peter Maydell wrote:
> On 13 May 2018 at 15:35, Eric Auger wrote:
>> for KVM_VGIC_V3_ADDR_TYPE_REDIST_REGION attribute, the attribute
>> data pointed to by kvm_device_attr.addr is a OR of the
>> redistributor region
On Tue, 15 May 2018 10:45:02 +0200
Laszlo Ersek wrote:
> I've come across this patch in downstream review (although I really have
> zero background in s390x), and Cornelia suggested I might want to repeat
> my comments on the upstream list too:
>
> On 05/04/18 09:25, Cornelia
On 8 April 2018 at 02:50, Shannon Zhao wrote:
> On 2018/4/6 17:36, Peter Maydell wrote:
>> On reflection, I think I'd aim for 2.13 for this, since:
>> * it's not a regression
>> * it doesn't actually affect any of our boards, because
>>none of them define enough
On 05/21/18 13:53, Marcel Apfelbaum wrote:
>
>
> On 05/20/2018 10:28 AM, Zihan Yang wrote:
>> Currently only q35 host bridge us allocated space in MCFG table. To
>> put pxb host
>> into sepratate pci domain, each of them should have its own
>> configuration space
>> int MCFG table
>>
>>
On Tue, May 22, 2018 at 09:35:55AM +0200, Gerd Hoffmann wrote:
> Hi,
>
> > You must /sometimes/ supply the correct machine type.
> >
> > It is quite dependent on the guest OS you have installed, and even
> > just how the guest OS is configured. In general Linux is very
> > flexible and can
Peter Maydell writes:
> As part of plumbing MemTxAttrs down to the IOMMU translate method,
> add MemTxAttrs as an argument to flatview_do_translate().
>
> Signed-off-by: Peter Maydell
Reviewed-by: Alex Bennée
> ---
Am 18.05.2018 um 20:41 hat Dr. David Alan Gilbert geschrieben:
> * Kevin Wolf (kw...@redhat.com) wrote:
> > Before we can make x-blockdev-create a background job, we need to
> > generalise the job infrastructure so that it can be used without any
> > associated block node.
>
> Is there any
On 18 May 2018 at 12:44, Alex Bennée wrote:
> Since kernel commit a86bd139f2 (arm64: arch_timer: Enable CNTVCT_EL0
> trap..) user-space has been able to read these system registers. As we
> can't use QEMUTimer's in linux-user mode we just directly call
> cpu_get_clock().
>
On Tue, 22 May 2018 11:39:58 +0100
Peter Maydell wrote:
> Rename the 2.13 machines to match the number we're going to
> use for the next release.
>
> Signed-off-by: Peter Maydell
> ---
> hw/s390x/s390-virtio-ccw.c | 10 +-
> 1 file
Hi Peter,
On 05/21/2018 04:03 PM, Peter Maydell wrote:
> Implement the Arm TrustZone Memory Protection Controller, which sits
> in front of RAM and allows secure software to configure it to either
> pass through or reject transactions.
>
> We implement the MPC as a QEMU IOMMU, which will direct
On 22.05.2018 12:39, Peter Maydell wrote:
> Rename the 2.13 machine types to match what we're going to
> use as our next release number.
>
> Signed-off-by: Peter Maydell
> ---
> hw/i386/pc_piix.c | 8
> hw/i386/pc_q35.c | 8
> 2 files changed, 8
On Tue, May 22, 2018 at 11:39:57AM +0100, Peter Maydell wrote:
> Rename the 2.13 machine types to match what we're going to
> use as our next release number.
>
> Signed-off-by: Peter Maydell
Reviewed-by: Eduardo Habkost
--
Eduardo
On 22.05.2018 12:39, Peter Maydell wrote:
> Rename the 2.13 machines to match the number we're going to
> use for the next release.
>
> Signed-off-by: Peter Maydell
> ---
> hw/s390x/s390-virtio-ccw.c | 10 +-
> 1 file changed, 5 insertions(+), 5 deletions(-)
The function is only ignored since QEMU version 1.7.0. Let's mark
it as deprecated, so that we can finally completely remove it soon.
Signed-off-by: Thomas Huth
---
qemu-doc.texi | 5 +
vl.c | 1 +
2 files changed, 6 insertions(+)
diff --git a/qemu-doc.texi
On 13 May 2018 at 15:35, Eric Auger wrote:
> To prepare for multiple redistributor regions, we introduce
> an array of uint32_t properties that stores the redistributor
> count of each redistributor region.
>
> Non accelerated VGICv3 only supports a single redistributor
> > --- /dev/null
> > +++ b/include/hw/display/bochs-vbe.h
> > @@ -0,0 +1,64 @@
>
> No header guards & copyright notice?
Header guards ok.
Copyright?
I don't think interface #defines like this are copyrightable ...
cheers,
Gerd
On 30 April 2018 at 11:33, Daniel P. Berrangé wrote:
> a) Bump major version once a year, so we'll have 3.0, 3.1, 3.3,
> 4.0, 4.1, 4.2, 5.0, ...etc We missed the first release this
> year, so we would only have 3.0 and 3.1 this year.
I realised we didn't really
Peter Maydell writes:
> As part of plumbing MemTxAttrs down to the IOMMU translate method,
> add MemTxAttrs as an argument to address_space_translate()
> and address_space_translate_cached(). Callers either have an
> attrs value to hand, or don't care and can use
On 22.05.2018 12:39, Peter Maydell wrote:
> We're going to make the next release be 3.0, not 2.13; change
> the annotations in our json appropriately.
>
> Changes produced with
> sed -i -e 's/2\.13/3.0/g' qapi/*.json
>
> Signed-off-by: Peter Maydell
> ---
>
>Any chance you didn't export QEMU_AUDIO_DRV?
Okay, I just checked by calling env in the same fashion.
Well lash me bootlaces, it turns out that sudo needs to be invoked with
the -E flag to preserve the environment. It's funny, the examples I
read up on never mentioned this.
Sorry for
On 21 May 2018 at 20:34, Stefano Stabellini wrote:
> The following changes since commit d32e41a1188e929cc0fb16829ce3736046951e39:
>
> Merge remote-tracking branch
> 'remotes/famz/tags/docker-and-block-pull-request' into staging (2018-05-18
> 14:11:52 +0100)
>
> are
On Wed, May 16, 2018 at 9:13 PM, Dr. David Alan Gilbert
wrote:
> * 858585 jemmy (jemmy858...@gmail.com) wrote:
>
>
>
>> >> >> > I wonder why dereg_mr takes so long - I could understand if reg_mr
>> >> >> > took a long time, but why for dereg, that sounds like the easy side.
Peter Maydell writes:
> As part of plumbing MemTxAttrs down to the IOMMU translate method,
> add MemTxAttrs as an argument to flatview_access_valid().
> Its callers now all have an attrs value to hand, so we can
> correct our earlier temporary use of
Peter Maydell writes:
> As part of plumbing MemTxAttrs down to the IOMMU translate method,
> add MemTxAttrs as an argument to the MemoryRegion valid.accepts
> callback. We'll need this for subpage_accepts().
>
> We could take the approach we used with the read and
Am 18.05.2018 um 20:17 hat Peter Maydell geschrieben:
> In commit 8b9ad56e9cbfd852a, we removed the code that could result
> in our getting to sd_prealloc()'s out_with_err_set label with a
> NULL blk pointer. That makes the NULL check in the error-handling
> path unnecessary, and Coverity gripes
On Tue, 22 May 2018 11:39:59 +0100
Peter Maydell wrote:
> Rename the 2.13 machines to match the number we're going to
> use for the next release.
>
> Signed-off-by: Peter Maydell
> ---
> target/ppc/cpu.h| 2 +-
>
Patryk Olszewski writes:
> Signed-off-by: Patryk Olszewski
> ---
> chardev/char-serial.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/chardev/char-serial.c b/chardev/char-serial.c
> index feb52e5..ae548d2 100644
> ---
On 13 May 2018 at 15:35, Eric Auger wrote:
> This patch allows the creation of a GICv3 node with 1 or 2
> redistributor regions depending on the number of smu_cpus.
> The second redistributor region is located just after the
> existing RAM region, at 256GB and contains up
On 22 May 2018 at 15:55, Richard Henderson wrote:
> On 05/22/2018 07:50 AM, Peter Maydell wrote:
>> Hi; I was reading about the x86-64 calling convention and I found
>> out that apparently for returns of smaller-than-register types the
>> high parts may contain garbage:
>>
On 22 May 2018 at 13:58, Auger Eric wrote:
> Hi Peter,
> On 05/21/2018 04:03 PM, Peter Maydell wrote:
>> If an IOMMU supports mappings that care about the memory
>> transaction attributes, then it no longer has a unique
>> address -> output mapping, but more than one. We
Return code = 1 doesn't mean that we parsed base:allocation. Move
trace point to appropriate place.
Signed-off-by: Vladimir Sementsov-Ogievskiy
---
nbd/server.c | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/nbd/server.c b/nbd/server.c
index
Looking through old bug tickets... can you still reproduce this issue
with the latest version of QEMU? Or could we close this ticket nowadays?
** Changed in: qemu
Status: New => Incomplete
--
You received this bug notification because you are a member of qemu-
devel-ml, which is
Looking through old bug tickets... can you still reproduce this issue
with the latest version of QEMU, using SDL2? Or could we close this
ticket nowadays? In case the problem persists, please also specify which
host system (Linux? Window manager? Or Windows?) you are using!
** Changed in: qemu
Looking through old bug tickets... can you still reproduce this issue
with the latest version of QEMU? Or could we close this ticket nowadays?
** Changed in: qemu
Status: New => Incomplete
--
You received this bug notification because you are a member of qemu-
devel-ml, which is
On Mon, May 21, 2018 at 08:41:12PM -0400, Babu Moger wrote:
> Add information for cpuid 0x801D leaf. Populate cache topology information
> for different cache types(Data Cache, Instruction Cache, L2 and L3) supported
> by 0x801D leaf. Please refer Processor Programming Reference (PPR) for
Looking through old bug tickets... can you still reproduce this issue
with the latest version of QEMU? Or could we close this ticket nowadays?
** Changed in: qemu
Status: New => Incomplete
--
You received this bug notification because you are a member of qemu-
devel-ml, which is
On 3 May 2018 at 22:44, Alex Williamson wrote:
> We'll currently replace any 'u64' with a 'uint64_t' including when
> it's embedded in an '__aligned_u64', creating a '__aligned_uint64_t'
> which doesn't exist. Add another sed entry to find these and convert
> them
> -Original Message-
> From: Stefan Hajnoczi [mailto:stefa...@redhat.com]
> Sent: Tuesday, May 22, 2018 6:11 AM
> To: Liu, Changpeng
> Cc: qemu-devel@nongnu.org; m...@redhat.com
> Subject: Re: [PATCH] vhost-blk: turn on pre-defined RO feature bit
>
> On Sat,
On 21 May 2018 at 23:01, Eduardo Habkost wrote:
> This provides the QEMU part of the mitigations for the speculative
> store buffer bypass vulnerabilities on the x86 platform[1], and is
> the companion of the kernel patches merged in:
>
>
>
Rename the 2.13 machines to match the number we're going to
use for the next release.
Signed-off-by: Peter Maydell
---
target/ppc/cpu.h| 2 +-
hw/ppc/spapr.c | 14 +++---
target/ppc/machine.c| 8
I think that we should number the next release 3.0
(3.0.0, in long form). We already have a few places that
have used "2.13", in machine-versions or in "feature
exists since release X" annotations; update those.
thanks
-- PMM
Peter Maydell (5):
qapi: Change "since 2.13" annotations to "since
Peter Maydell writes:
> As part of plumbing MemTxAttrs down to the IOMMU translate method,
> add MemTxAttrs as an argument to address_space_map().
> Its callers either have an attrs value to hand, or don't care
> and can use MEMTXATTRS_UNSPECIFIED.
>
> Signed-off-by:
Peter Maydell writes:
> As part of plumbing MemTxAttrs down to the IOMMU translate method,
> add MemTxAttrs as an argument to flatview_translate(); all its
> callers now have attrs available.
>
> Signed-off-by: Peter Maydell
Reviewed-by:
Peter Maydell writes:
> As part of plumbing MemTxAttrs down to the IOMMU translate method,
> add MemTxAttrs as an argument to address_space_translate_iommu().
>
> Signed-off-by: Peter Maydell
Reviewed-by: Alex Bennée
On 22 May 2018 at 12:30, Auger Eric wrote:
> Hi Peter,
>
> On 05/21/2018 04:03 PM, Peter Maydell wrote:
>> Implement the Arm TrustZone Memory Protection Controller, which sits
>> in front of RAM and allows secure software to configure it to either
>> pass through or reject
Hi Peter,
On 05/22/2018 01:56 PM, Peter Maydell wrote:
> On 22 May 2018 at 12:30, Auger Eric wrote:
>> Hi Peter,
>>
>> On 05/21/2018 04:03 PM, Peter Maydell wrote:
>>> Implement the Arm TrustZone Memory Protection Controller, which sits
>>> in front of RAM and allows
On 13 May 2018 at 15:35, Eric Auger wrote:
> for KVM_VGIC_V3_ADDR_TYPE_REDIST_REGION attribute, the attribute
> data pointed to by kvm_device_attr.addr is a OR of the
> redistributor region address and other fields such as the index
> of the redistributor region and the
Am 22.05.2018 um 16:19 hat Michael S. Tsirkin geschrieben:
> On Tue, May 22, 2018 at 09:35:55AM +0200, Gerd Hoffmann wrote:
> > Hi,
> >
> > > You must /sometimes/ supply the correct machine type.
> > >
> > > It is quite dependent on the guest OS you have installed, and even
> > > just how the
On 22/05/2018 13:58, Thomas Huth wrote:
> The function is only ignored since QEMU version 1.7.0. Let's mark
> it as deprecated, so that we can finally completely remove it soon.
>
> Signed-off-by: Thomas Huth
> ---
> qemu-doc.texi | 5 +
> vl.c | 1 +
> 2 files
02.05.2018 00:13, Eric Blake wrote:
The NBD spec is clarifying [1] that a server may want to advertise
different limits for READ/WRITE (in our case, 32M) than for
TRIM/ZERO (in our case, nearly 4G). Implement the client
side support for these alternate limits, by always requesting
the new
On Tue, May 22, 2018 at 9:24 AM, Peter Maydell
wrote:
> I've put up a draft release schedule at:
> https://wiki.qemu.org/Planning/3.0
>
> 2018-04-24 Beginning of development phase
> 2018-07-03 Soft feature freeze.
> 2018-07-10 Hard feature freeze. Tag rc0
On 22 May 2018 at 16:39, Warner Losh wrote:
> On Tue, May 22, 2018 at 9:24 AM, Peter Maydell
> wrote:
>>
>> I've put up a draft release schedule at:
>> https://wiki.qemu.org/Planning/3.0
>>
>> 2018-04-24 Beginning of development phase
>> 2018-07-03
On 05/18/18 14:23, marcandre.lur...@redhat.com wrote:
> diff --git
> a/OvmfPkg/Library/Tcg2PhysicalPresenceLibNull/DxeTcg2PhysicalPresenceLib.inf
> b/OvmfPkg/Library/Tcg2PhysicalPresenceLibNull/DxeTcg2PhysicalPresenceLib.inf
> new file mode 100644
> index ..92ce5f04b37f
> ---
On Tue, 22 May 2018 11:39:59 +0100
Peter Maydell wrote:
> Rename the 2.13 machines to match the number we're going to
> use for the next release.
>
> Signed-off-by: Peter Maydell
> ---
Reviewed-by: Greg Kurz
>
On Sat, May 19, 2018 at 06:20:16AM +0800, Changpeng Liu wrote:
> Read only feature shouldn't be negotiable, because if the
> backend device reported Read only feature supported, QEMU
> host driver shouldn't change backend's RO attribute.
I don't understand this patch.
Does it make *all*
Looking through old bug tickets... can you still reproduce this issue
with the latest version of QEMU? Or could we close this ticket nowadays?
** Changed in: qemu
Status: Confirmed => Incomplete
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You received this bug notification because you are a member of qemu-
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Looking through old bug tickets... can you still reproduce this issue
with the latest version of QEMU? Or could we close this ticket nowadays?
** Changed in: qemu
Status: New => Incomplete
--
You received this bug notification because you are a member of qemu-
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On Sat, May 19, 2018 at 06:20:46AM +0800, Changpeng Liu wrote:
> This patch reports the protocol feature that is only advertised by
> QEMU if the device implements the config ops.
>
> Signed-off-by: Changpeng Liu
> ---
> contrib/vhost-user-blk/vhost-user-blk.c | 7
You have been subscribed to a public bug:
I run qemu from git with such command:
qemu-system-x86_64 -nodefaults -m 4096 -smp 8,cores=4,threads=2,sockets=1 -cpu
'kvm64' -device usb-mouse -M q35 -vga qxl -no-hpet -boot once=c,menu=on -device
vfio-pci,host=02:00.0,x-vga=on \
-enable-kvm -monitor
On Tue, May 22, 2018 at 01:32:52PM +, Moger, Babu wrote:
>
> > -Original Message-
> > From: Duran, Leo
> > Sent: Monday, May 21, 2018 8:32 PM
> > To: Moger, Babu ; m...@redhat.com;
> > marcel.apfelb...@gmail.com; pbonz...@redhat.com; r...@twiddle.net;
> >
On 05/22/2018 08:44 AM, Cornelia Huck wrote:
> On Tue, 15 May 2018 10:45:02 +0200
> Laszlo Ersek wrote:
>
>> I've come across this patch in downstream review (although I really have
>> zero background in s390x), and Cornelia suggested I might want to repeat
>> my comments on
On 22 May 2018 at 15:11, Auger Eric wrote:
> Hi Peter,
>
> On 05/22/2018 03:22 PM, Peter Maydell wrote:
>> How many substream IDs do we expect to see in practice?
>
> Spec says max 20 bits, matching the max size of the PASID
Right, but do we actually expect to see
On Tue, May 22, 2018 at 09:35:55AM +0200, Gerd Hoffmann wrote:
> Hi,
>
> > You must /sometimes/ supply the correct machine type.
> >
> > It is quite dependent on the guest OS you have installed, and even
> > just how the guest OS is configured. In general Linux is very
> > flexible and can
On 05/22/2018 04:19 PM, Peter Maydell wrote:
> On 22 May 2018 at 15:11, Auger Eric wrote:
>> Hi Peter,
>>
>> On 05/22/2018 03:22 PM, Peter Maydell wrote:
>>> How many substream IDs do we expect to see in practice?
>>
>> Spec says max 20 bits, matching the max size of the
On 05/18/18 14:23, marcandre.lur...@redhat.com wrote:
> +/**
> + Initializes QEMU PPI memory region.
> +
> + @retval EFI_SUCCESS Operation completed successfully.
> + @retval EFI_PROTOCOL_ERRORPPI address is invalid.
> +**/
> +STATIC
> +EFI_STATUS
> +QemuTpmInitPPI (
> + VOID
>
On 05/18/18 14:23, marcandre.lur...@redhat.com wrote:
> From: Marc-André Lureau
>
> Hi,
>
> The following series adds basic TPM PPI 1.3 support for OVMF-on-QEMU
> with TPM2 (I haven't looked at TPM1, for lack of interest).
>
> PPI test runs successfully with
Hi; I was reading about the x86-64 calling convention and I found
out that apparently for returns of smaller-than-register types the
high parts may contain garbage:
On 05/22/2018 07:50 AM, Peter Maydell wrote:
> Hi; I was reading about the x86-64 calling convention and I found
> out that apparently for returns of smaller-than-register types the
> high parts may contain garbage:
>
On Wed, 16 May 2018 15:32:48 +0200
Pierre Morel wrote:
> On 15/05/2018 18:10, Cornelia Huck wrote:
> > On Fri, 11 May 2018 11:33:35 +0200
> > Pierre Morel wrote:
> >
> >> On 09/05/2018 17:48, Cornelia Huck wrote:
> >>> @@ -126,7 +192,24 @@ static
Hi Peter,
On 05/21/2018 04:03 PM, Peter Maydell wrote:
> If an IOMMU supports mappings that care about the memory
> transaction attributes, then it no longer has a unique
> address -> output mapping, but more than one. We can
> represent these using an IOMMU index, analogous to TCG's
> mmu
On 22 May 2018 at 12:53, Markus Armbruster wrote:
> Patryk Olszewski writes:
>
>> Signed-off-by: Patryk Olszewski
>> ---
>> chardev/char-serial.c | 2 +-
>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git
> -Original Message-
> From: Duran, Leo
> Sent: Monday, May 21, 2018 8:32 PM
> To: Moger, Babu ; m...@redhat.com;
> marcel.apfelb...@gmail.com; pbonz...@redhat.com; r...@twiddle.net;
> ehabk...@redhat.com; mtosa...@redhat.com
> Cc: qemu-devel@nongnu.org;
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