Seems the intel link is unavailable, change it to qemu site.
Signed-off-by: Li Qiang
Reviewed-by: Philippe Mathieu-Daud??
---
hw/pci-host/piix.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/pci-host/piix.c b/hw/pci-host/piix.c
index 0e608347c1..56a42055f1 100644
---
On 10/11/18 1:06 AM, David Hildenbrand wrote:
> On 03/10/2018 21:39, Richard Henderson wrote:
>> When op raises an exception, it may not have initialized the output
>> temps that would be written back by wout or cout.
>>
>> Cc: qemu-s3...@nongnu.org
>> Signed-off-by: Richard Henderson
>> ---
>>
On 11/10/2018 17:24, Philippe Mathieu-Daudé wrote:
>> On the other hand, fd_chr_read_poll is not an IOCanReadHandler, and this
>> patch therefore probably doesn't compile?
> It does compile.
>
> fd_chr_update_read_handler() uses fd_chr_read_poll with io_add_watch_poll():
>
> GSource
Hi Thomas,
On 11/10/2018 17:21, Thomas Huth wrote:
> In downstream distros like RHEL we'd like to disable some of the "legacy"
> devices of QEMU. The ISA version of the Cirrus VGA device is one of these
> legacy devices. So let's make the build process a little bit more flexible
> here by putting
Am 11.10.2018 um 12:58 hat Alberto Garcia geschrieben:
> This doesn't have any practical effect at the moment because the
> values of BDRV_SECTOR_SIZE, QCRYPTO_BLOCK_LUKS_SECTOR_SIZE and
> QCRYPTO_BLOCK_QCOW_SECTOR_SIZE are all the same (512 bytes), but
> future encryption methods could have
On 11 October 2018 at 17:20, Damien Hedde wrote:
>
> Hi Philippe,
>
> On 10/4/18 6:13 PM, Philippe Mathieu-Daudé wrote:
>> Hi Damien,
>>
>> On 02/10/2018 16:24, Damien Hedde wrote:
>>> This series aims to add a way to model clocks in qemu between devices.
>>> This allows to model the clock tree
On Thu, Oct 11, 2018 at 04:56:04PM +0200, Kevin Wolf wrote:
> Am 11.10.2018 um 16:01 hat Markus Armbruster geschrieben:
[...]
> > I think we need to invest more resources in Python 2/3 compatiblity, or
> > else we'll miss our hard deadline of January 1, 2020.
>
> Did we decide until when we want
On 11/10/2018 15:14, Philippe Mathieu-Daudé wrote:
> The number of bytes can not be negative nor zero.
>
> Fixed 2 format string:
> - hw/char/spapr_vty.c
> - hw/usb/ccid-card-passthru.c
>
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> See:
Split entry repairing to separate function, to be reused later in
check_refcounts_l2, prepare the whole pipeline for adding more
corruption types which may be repaired.
Note: entry in in-memory l2 table (local variable in
check_refcounts_l2) is not updated after this patch.
Signed-off-by:
Separate offset and size of compressed cluster.
Signed-off-by: Vladimir Sementsov-Ogievskiy
---
block/qcow2-refcount.c | 13 -
1 file changed, 8 insertions(+), 5 deletions(-)
diff --git a/block/qcow2-refcount.c b/block/qcow2-refcount.c
index afaa1a1409..23b105b43b 100644
---
On 2018-10-11 16:47, Eric Blake wrote:
> GNU make is perfectly happy to use 'check-FOO-y += bar' to
> initialize check-FOO-y. (GNU Automake strictly insists that
> you cannot use += until after an initial = per variable, but
> thankfully we aren't using automake).
>
> As we have had more than
On Thu, 2018-10-11 at 17:09 +0200, Gerd Hoffmann wrote:
> > > Ok. We probably should fix interface_client_monitors_config() to use
> > > the channel_id instead of qemu_console_get_head() then.
> >
> > It's not that simple. This would break the QXL with multiple monitors
> > per channel case.
>
On 11/10/2018 19:12, Peter Maydell wrote:
> On 11 October 2018 at 18:00, Philippe Mathieu-Daudé wrote:
>> On 11/10/2018 18:23, Peter Maydell wrote:
>>> How many devices have a clock and nothing else that would cause
>>> them to be non-user-creatable (ie no GPIOs, no IRQ lines, no
>>>
Eric Blake writes:
> On 10/8/18 12:30 PM, Markus Armbruster wrote:
>> Add a slight improvement of the Coccinelle semantic patch from commit
>> 07d04a0219b,
>
> which shares the same commit title, but does not actually have a
> semantic patch, but rather defers to the even older 007b065. But I'm
Eduardo Habkost writes:
> On Mon, Oct 08, 2018 at 07:31:08PM +0200, Markus Armbruster wrote:
>> Calling error_report() in a function that takes an Error ** argument
>> is suspicious. parse_numa_node() does that, and then exit()s. It
>> also passes _fatal to machine_set_cpu_numa_node(). Both
In downstream distros like RHEL we'd like to disable some of the "legacy"
devices of QEMU. The ISA version of the Cirrus VGA device is one of these
legacy devices. So let's make the build process a little bit more flexible
here by putting the Cirrus ISA code into a separate file and by providing
a
On 11/10/2018 17:34, Paolo Bonzini wrote:
> On 11/10/2018 17:24, Philippe Mathieu-Daudé wrote:
>>> On the other hand, fd_chr_read_poll is not an IOCanReadHandler, and this
>>> patch therefore probably doesn't compile?
>> It does compile.
>>
>> fd_chr_update_read_handler() uses fd_chr_read_poll
On 11/10/2018 18:23, Peter Maydell wrote:
> On 11 October 2018 at 17:20, Damien Hedde wrote:
>>
>> Hi Philippe,
>>
>> On 10/4/18 6:13 PM, Philippe Mathieu-Daudé wrote:
>>> Hi Damien,
>>>
>>> On 02/10/2018 16:24, Damien Hedde wrote:
This series aims to add a way to model clocks in qemu
Hi all!
v3:
01: s/l2_fixed_entries/l2_dirty/
02: add comment, s/>/>=
03: s/BDRV_SECTOR_SIZE/512
04: add Max's r-b
05: new
06-08: mostly rewritten
v2:
02, 06: check bdrv_getlength error return code
v1:
We've faced the following problem: after host fs corruption, vm images
becomes invalid. And
Rewrite corrupted L2 table entry, which reference space out of
underlying file.
Signed-off-by: Vladimir Sementsov-Ogievskiy
---
block/qcow2-refcount.c | 66 +-
1 file changed, 65 insertions(+), 1 deletion(-)
diff --git a/block/qcow2-refcount.c
Adding Markus since we're talking about new CLI argument and capability
reporting standards.
On Fri, Sep 14, 2018 at 05:52:30PM +0400, Marc-André Lureau wrote:
> As discussed during "[PATCH v4 00/29] vhost-user for input & GPU"
> review, let's define a common set of backend conventions to help
On 11 October 2018 at 18:00, Philippe Mathieu-Daudé wrote:
> On 11/10/2018 18:23, Peter Maydell wrote:
>> How many devices have a clock and nothing else that would cause
>> them to be non-user-creatable (ie no GPIOs, no IRQ lines, no
>> memory-mapped memory regions) ?
>
> I'm not sure I
When using an incorrect backend for the debugcon, QEMU exits silently
without any error indication, which is confusing.
Add a message that the character backend is invalid.
Signed-off-by: Philippe Mathieu-Daudé
---
vl.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/vl.c b/vl.c
index
* Wei Huang (w...@redhat.com) wrote:
> This patch adds migration test support for aarch64. The test code, which
> implements the same functionality as x86, is booted as a kernel in qemu.
> Here are the design choices we make for aarch64:
>
> * We choose this -kernel approach because aarch64 QEMU
Marc-André Lureau writes:
> Hi
> On Mon, Oct 8, 2018 at 9:54 PM Markus Armbruster wrote:
>>
>> When -netdev l2tpv3 fails, it first reports a specific error, then a
>> generic one, like this:
>>
>> $ qemu-system-x86_64 -netdev l2tpv3,id=foo,src=,dst=,txsession=1
>> qemu-system-x86_64:
Reduce number of structures ignored in overlap check: when checking
active table ignore active tables, when checking inactive table ignore
inactive ones.
Signed-off-by: Vladimir Sementsov-Ogievskiy
Reviewed-by: Max Reitz
---
block/qcow2-refcount.c | 16 +---
1 file changed, 9
On 11/10/2018 17:14, Paolo Bonzini wrote:
> On 11/10/2018 15:14, Philippe Mathieu-Daudé wrote:
>> The number of bytes can not be negative nor zero.
>>
>> Fixed 2 format string:
>> - hw/char/spapr_vty.c
>> - hw/usb/ccid-card-passthru.c
>>
>> Signed-off-by: Philippe Mathieu-Daudé
>> ---
>> See:
ping
19.09.2018 15:43, Vladimir Sementsov-Ogievskiy wrote:
> Hi all!
>
> We finally implemented fleecing scheme, create a test case for it (222)
> and even made it safe (f8d59dfb40).
>
> However, fleecing is used inside block-replication long ago, and to make
> the scheme safe it uses direct
Li Qiang writes:
> Seems the intel link is unavailable, change it to qemu site.
>
> Signed-off-by: Li Qiang
> Reviewed-by: Philippe Mathieu-Daud©
Mojibake. Perhaps the maintainer is willing to correct it.
GNU make is perfectly happy to use 'check-FOO-y += bar' to
initialize check-FOO-y. (GNU Automake strictly insists that
you cannot use += until after an initial = per variable, but
thankfully we aren't using automake).
As we have had more than one instance where copy-and-paste of
'check-FOO-y =
On 11/10/2018 14:38, Li Qiang wrote:
> Make them more QOMConventional.
> Cc:qemu-triv...@nongnu.org
>
> Signed-off-by: Li Qiang
Reviewed-by: Philippe Mathieu-Daudé
> ---
> hw/pci-host/piix.c | 11 +++
> 1 file changed, 7 insertions(+), 4 deletions(-)
>
> diff --git
Am 11.10.2018 um 16:01 hat Markus Armbruster geschrieben:
> Paolo Bonzini writes:
>
> > On 11/10/2018 13:33, Kevin Wolf wrote:
> >> 045 1s ...[13:31:47] [13:31:47] [failed, exit status 1] - output
> >> mismatch (see 045.out.bad)
> >> ---
On 11/10/2018 16:47, Eric Blake wrote:
> GNU make is perfectly happy to use 'check-FOO-y += bar' to
> initialize check-FOO-y. (GNU Automake strictly insists that
> you cannot use += until after an initial = per variable, but
> thankfully we aren't using automake).
>
> As we have had more than
Hi Li,
On 11/10/2018 16:44, Li Qiang wrote:
> Seems the intel link is unavailable, change it to qemu site.
>
> Signed-off-by: Li Qiang
> ---
> hw/pci-host/piix.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/hw/pci-host/piix.c b/hw/pci-host/piix.c
> index
Great! I'm voting with all my fingers up for such rules. But I would
suggest even more generic rules which prevent breaking determinism in a
more wide sense. At least, where such breakage is trivial to avoid.
Currently I'm working on modification, which extends conditions where guest
execution is
> > Ok. We probably should fix interface_client_monitors_config() to use
> > the channel_id instead of qemu_console_get_head() then.
>
> It's not that simple. This would break the QXL with multiple monitors
> per channel case.
It is that simple.
qxl doesn't use that code path and has its own
Hi Philippe,
On 10/4/18 6:13 PM, Philippe Mathieu-Daudé wrote:
> Hi Damien,
>
> On 02/10/2018 16:24, Damien Hedde wrote:
>> This series aims to add a way to model clocks in qemu between devices.
>> This allows to model the clock tree of a platform allowing us to inspect
>> clock
>>
On Thu, Oct 11, 2018 at 12:43:06AM -0400, Cleber Rosa wrote:
>
>
> On 10/10/18 11:42 PM, Eduardo Habkost wrote:
> > On Wed, Oct 10, 2018 at 08:17:26PM -0400, Cleber Rosa wrote:
> >>
> >>
> >> On 10/10/18 11:47 AM, Cleber Rosa wrote:
> >>>
> >>>
> >>> On 10/10/18 10:28 AM, Eduardo Habkost wrote:
* Thomas Huth (th...@redhat.com) wrote:
> We can re-use the s390-ccw bios code to implement a small firmware
> for a s390x guest which prints out the "A" and "B" characters and
> modifies the memory, as required for the migration test.
>
> [quintela: Converted the compile script to Makefile
The get_phys_addr() functions take a pointer to an ARMMMUFaultInfo
struct, which they fill in only if a fault occurs. This means that
the caller must always zero-initialize the struct before passing
it in. We forgot to do this in v7m_stack_read() and v7m_stack_write().
Correct the error.
Increase corruptions_fixed only after successful fix.
Signed-off-by: Vladimir Sementsov-Ogievskiy
---
block/qcow2-refcount.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/block/qcow2-refcount.c b/block/qcow2-refcount.c
index 3c539f02e5..b453d87a3f 100644
---
Zero out corrupted L1 table entry, which reference L2 table out of
underlying file.
Zero L1 table entry means that "the L2 table and all clusters described
by this L2 table are unallocated."
Signed-off-by: Vladimir Sementsov-Ogievskiy
---
block/qcow2-refcount.c | 26 ++
Misaligned entries will lead to fatal qcow2 driver corruption on read
or write to corresponding offset, so there is no sense to take them
into account.
Signed-off-by: Vladimir Sementsov-Ogievskiy
---
block/qcow2-refcount.c | 25 +
1 file changed, 13 insertions(+), 12
qcow2_inc_refcounts_imrt() (through realloc_refcount_array()) can eat
an unpredictable amount of memory on corrupted table entries, which are
referencing regions far beyond the end of file.
Prevent this, by skipping such regions from further processing.
Signed-off-by: Vladimir
The function vte_terminal_set_encoding() is deprecated since VTE 0.54,
so stop calling it from that version on. This fixes a build error
because of our use of warning flags [-Werror=deprecated-declarations].
Fixes: https://bugs.launchpad.net/bugs/1794939
Reported-by: Bastian Koppelmann
ping
17.09.2018 17:57, Vladimir Sementsov-Ogievskiy wrote:
> Hi all.
>
> 1. bdrv_dirty_iter_next_area don't use hbitmap_next_zero and uses
> inefficient loop instead. Let's improve it.
>
> 2. bdrv_dirty_iter_next_area don't handle unaligned offset and
> max_offset correctly. I'm not sure that it
On 10 October 2018 at 20:54, Cleber Rosa wrote:
> On 10/10/18 2:07 PM, Peter Maydell wrote:
>> We should aim to test the machines we care about (regardless
>> of what architectures they are), rather than thinking about it
>> in terms of "testing architectures X, Y, Z", I think.
>>
>
> To me it's
Marc-André Lureau writes:
> Hi
>
> On Mon, Oct 8, 2018 at 9:50 PM Markus Armbruster wrote:
>>
>> Calling error_report() in a function that takes an Error ** argument
>> is suspicious. parse_sandbox() does that, and then fails without
>> setting an error. Its caller main(), via
On Tue, Oct 09, 2018 at 11:32:32AM +0200, David Hildenbrand wrote:
> On 05/10/2018 11:20, David Hildenbrand wrote:
> > This series completes refactoring of pre_plug, plug and unplug logic of
> > memory devices. With this as a basis, we can built e.g. virtio
> > based memory devices or internal
* Juan Quintela (quint...@redhat.com) wrote:
> Several changes:
> - We only allow generate header "inside" the tree. Why? Because we
> need to connit the result, so it makes no sense to generate them on
> the build dir.
> - We only generate a single target each time. Getting all the
>
From: Michael Clark
This patch makes op_helper.c contain only instruction
operation helpers used by translate.c and moves any
unrelated cpu helpers into cpu_helper.c. No logic is
changed by this patch.
Cc: Sagar Karandikar
Cc: Bastian Koppelmann
Cc: Palmer Dabbelt
Cc: Alistair Francis
From: Michael Clark
* Add user-mode CSR defininitions.
* Reorder CSR definitions to match the specification.
* Change H mode interrupt comment to 'reserved'.
* Remove unused X_COP interrupt.
* Add user-mode interrupts.
* Remove erroneous until comments on machine mode interrupts.
* Move together
From: Michael Clark
Cc: Palmer Dabbelt
Cc: Sagar Karandikar
Cc: Bastian Koppelmann
Cc: Alistair Francis
Signed-off-by: Michael Clark
Reviewed-by: Alistair Francis
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Palmer Dabbelt
Signed-off-by: Alistair Francis
---
hw/riscv/virt.c | 2 ++
Instead of shifts and masks, use direct loads and stores from the neon
register file. Mirror the iteration structure of the ARM pseudocode
more closely. Correct the parameters of the VLD2 A2 insn.
Signed-off-by: Richard Henderson
---
target/arm/translate.c | 170
Also introduces neon_element_offset to find the env offset
of a specific element within a neon register.
Signed-off-by: Richard Henderson
---
target/arm/translate.c | 63 --
1 file changed, 36 insertions(+), 27 deletions(-)
diff --git
Signed-off-by: Richard Henderson
---
target/arm/translate.c | 31 +++
1 file changed, 15 insertions(+), 16 deletions(-)
diff --git a/target/arm/translate.c b/target/arm/translate.c
index fae132791a..e195efcc55 100644
--- a/target/arm/translate.c
+++
Move expanders for VBSL, VBIT, and VBIF from translate-a64.c.
Signed-off-by: Richard Henderson
---
target/arm/translate.h | 6 +-
target/arm/translate-a64.c | 61 --
target/arm/translate.c | 162 +++--
3 files changed, 123 insertions(+),
On Wed, Oct 10, 2018 at 11:00 PM Andrea Bolognani wrote:
>
> On Wed, 2018-10-10 at 10:57 -0700, Alistair wrote:
> > On 10/10/2018 05:26 AM, Andrea Bolognani wrote:
> > > * what should libvirt look for to figure out whether or not a RISC-V
> > >guest will have PCI support? For aarch64 we look
From: "Denis V. Lunev"
According to PCI specification, subsystem id and subsystem vendor id
are present only in type 0 and type 2 headers (at different offsets),
but not in type 1 headers.
Thus we should make this data optional in struct PciDeviceId and skip
reporting them via HMP if the
From: Ilya Maximets
According to documentation, NEED_REPLY_MASK should not be set
for VHOST_USER_SET_MEM_TABLE request in postcopy mode.
This restriction was mistakenly applied to 'reply_supported'
variable, which is local and used only for non-postcopy case.
CC: Dr. David Alan Gilbert
Fixes:
From: "Dr. David Alan Gilbert"
The following changes since commit 75e50c80e051423a6f55a34ee4a1eec842444a5b:
Merge remote-tracking branch 'remotes/armbru/tags/pull-misc-2018-10-10' into
staging (2018-10-11 10:43:37 +0100)
are available in the Git repository at:
From: Ilya Maximets
'fd' received from the vhost side is never freed.
Also, everything (including 'postcopy_listen' state) should be
cleaned up on vhost cleanup.
Fixes: 46343570c06e ("vhost+postcopy: Wire up POSTCOPY_END notify")
Fixes: f82c11165ffa ("vhost+postcopy: Register shared ufd with
Instead of shifts and masks, use direct loads and stores from
the neon register file.
Signed-off-by: Richard Henderson
---
target/arm/translate.c | 92 +++---
1 file changed, 50 insertions(+), 42 deletions(-)
diff --git a/target/arm/translate.c
For a sequence of loads or stores from a single register,
little-endian operations can be promoted to an 8-byte op.
This can reduce the number of operations by a factor of 8.
Signed-off-by: Richard Henderson
---
target/arm/translate-a64.c | 66 +++---
1 file
* Ilya Maximets (i.maxim...@samsung.com) wrote:
> Sending as RFC because it's not fully tested yet.
Since we've bothed Review-by it, I've queued it.
Dave
> Ilya Maximets (2):
> migration: Stop postcopy fault thread before notifying
> vhost-user: Fix userfaultfd leak
>
>
Eric Blake writes:
> On 10/8/18 12:31 PM, Markus Armbruster wrote:
>> Calling error_report() from within a a function that takes an Error **
>
> s/a a/a/
Fixing, thanks!
>> argument is suspicious. qemu_fsdev_add() does that, and its caller
>> fsdev_init_func() then fails without setting an
Increase the number of interrupts to match the HiFive Unleashed board.
Signed-off-by: Alistair Francis
---
include/hw/riscv/virt.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/hw/riscv/virt.h b/include/hw/riscv/virt.h
index 91163d6cbf..7cb2742070 100644
---
Connect the Xilinx PCIe device based on the information in the device
tree stored in the ROM of the HiFish Unleashed board.
Signed-off-by: Alistair Francis
---
hw/riscv/sifive_u.c | 64 +
include/hw/riscv/sifive_u.h | 4 ++-
2 files changed, 67
Enable compile support for VGA devices. This allows the user to conenct
a display by adding '-device bochs-display -display sdl' to their
command line argument.
Signed-off-by: Alistair Francis
---
default-configs/riscv32-softmmu.mak | 3 +++
default-configs/riscv64-softmmu.mak | 3 +++
-20181011
for you to fetch changes up to f39e645c5f5e9f2b3d41e9c1ad84caae1829cce2:
RISC-V: Don't add NULL bootargs to device-tree (2018-10-11 10:30:26 -0700)
riscv: Connect PCIe and apply some misc patches
Connect PCIe to the RISC
For a sequence of loads or stores from a single register,
little-endian operations can be promoted to an 8-byte op.
This can reduce the number of operations by a factor of 8.
Signed-off-by: Richard Henderson
---
target/arm/translate.c | 10 ++
1 file changed, 10 insertions(+)
diff
On 10/11/18 10:20 AM, Peter Maydell wrote:
> The get_phys_addr() functions take a pointer to an ARMMMUFaultInfo
> struct, which they fill in only if a fault occurs. This means that
> the caller must always zero-initialize the struct before passing
> it in. We forgot to do this in v7m_stack_read()
From: Thomas Huth
We can re-use the s390-ccw bios code to implement a small firmware
for a s390x guest which prints out the "A" and "B" characters and
modifies the memory, as required for the migration test.
[quintela: Converted the compile script to Makefile rules]
Signed-off-by: Juan Quintela
Move cmtst_op expanders from translate-a64.c.
Signed-off-by: Richard Henderson
---
target/arm/translate.h | 2 +
target/arm/translate-a64.c | 38 --
target/arm/translate.c | 81 +++---
3 files changed, 60 insertions(+), 61 deletions(-)
Signed-off-by: Richard Henderson
---
target/arm/translate.c | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/target/arm/translate.c b/target/arm/translate.c
index 4dcd7123e9..fae132791a 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@
Move shi_op and sli_op expanders from translate-a64.c.
Signed-off-by: Richard Henderson
---
target/arm/translate.h | 2 +
target/arm/translate-a64.c | 152 +--
target/arm/translate.c | 244 ++---
3 files changed, 179 insertions(+),
From: Juan Quintela
Several changes:
- We only allow generate header "inside" the tree. Why? Because we
need to connit the result, so it makes no sense to generate them on
the build dir.
- We only generate a single target each time. Getting all the
cross-compilers correctly is an
From: Wei Huang
This patch adds migration test support for aarch64. The test code, which
implements the same functionality as x86, is booted as a kernel in qemu.
Here are the design choices we make for aarch64:
* We choose this -kernel approach because aarch64 QEMU doesn't provide a
From: Ilya Maximets
POSTCOPY_NOTIFY_INBOUND_END handlers will remove userfault fds
from the postcopy_remote_fds array which could be still in
use by the fault thread. Let's stop the thread before
notification to avoid possible accessing wrong memory.
Fixes: 46343570c06e ("vhost+postcopy: Wire
Signed-off-by: Richard Henderson
---
target/arm/translate.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/target/arm/translate.c b/target/arm/translate.c
index 736880ee71..d59ffa1c67 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@ -72,7 +72,7 @@
Signed-off-by: Richard Henderson
---
target/arm/translate-a64.c | 28 +++-
1 file changed, 3 insertions(+), 25 deletions(-)
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index ac9723c1b9..fff99ca303 100644
--- a/target/arm/translate-a64.c
+++
Signed-off-by: Richard Henderson
---
target/arm/translate.c | 29 ++---
1 file changed, 10 insertions(+), 19 deletions(-)
diff --git a/target/arm/translate.c b/target/arm/translate.c
index 4ab9f69b01..4dcd7123e9 100644
--- a/target/arm/translate.c
+++
Move mla_op and mls_op expanders from translate-a64.c.
Signed-off-by: Richard Henderson
---
target/arm/translate.h | 2 +
target/arm/translate-a64.c | 106 -
target/arm/translate.c | 134 -
3 files changed, 120
Marc-André Lureau writes:
> Hi
>
> On Mon, Oct 8, 2018 at 9:51 PM Markus Armbruster wrote:
>>
>> Calling error_report() in a function that takes an Error ** argument
>> is suspicious. chardev_init_func() does that, and then fails without
>> setting an error. Its caller main(), via
The conversion to gvec is by no means complete, but it brings aa32
to parity with the work already done for aa64. Plus some misc changes,
at least one of which has been sitting on a branch for 2 years. ;-P
I've run the result through Alex's aarch32-all.tar.xz RISU tests.
There are no
This is done generically in translator_loop.
Reported-by: Laurent Desnogues
Signed-off-by: Richard Henderson
---
target/arm/translate-a64.c | 1 -
target/arm/translate.c | 1 -
2 files changed, 2 deletions(-)
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index
Signed-off-by: Richard Henderson
---
target/arm/translate.c | 81 ++
1 file changed, 26 insertions(+), 55 deletions(-)
diff --git a/target/arm/translate.c b/target/arm/translate.c
index a9bd93bba1..1e79a1eec0 100644
--- a/target/arm/translate.c
+++
From: Richard Henderson
This can reduce the number of opcodes required for certain
complex forms of load-multiple (e.g. ld4.16b).
Signed-off-by: Richard Henderson
---
target/arm/translate-a64.c | 12
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git
Move ssra_op and usra_op expanders from translate-a64.c.
Signed-off-by: Richard Henderson
---
target/arm/translate.h | 2 +
target/arm/translate-a64.c | 106
target/arm/translate.c | 139 ++---
3 files changed, 130
Signed-off-by: Richard Henderson
---
target/arm/translate.c | 70 +-
1 file changed, 48 insertions(+), 22 deletions(-)
diff --git a/target/arm/translate.c b/target/arm/translate.c
index e195efcc55..a16f323d52 100644
--- a/target/arm/translate.c
+++
Signed-off-by: Richard Henderson
---
target/arm/translate.c | 67 --
1 file changed, 39 insertions(+), 28 deletions(-)
diff --git a/target/arm/translate.c b/target/arm/translate.c
index 4ac526e298..109689a286 100644
--- a/target/arm/translate.c
+++
On Thu, Oct 11, 2018 at 09:31:23PM +0200, Kamil Rytarowski wrote:
> On 11.10.2018 16:25, Brad Smith wrote:
> > On 10/11/2018 5:41 AM, Kamil Rytarowski wrote:
> >
> >> On 11.10.2018 11:36, Peter Maydell wrote:
> >>> On 11 October 2018 at 00:55, Brad Smith wrote:
> And from FreeBSD...
>
On Mon, 17 Sep 2018 08:17:29 +0200
Gerd Hoffmann wrote:
> So we have a boot display when using a vgpu as primary display.
>
> ramfb depends on a fw_cfg file. fw_cfg files can not be added and
> removed at runtime, therefore a ramfb-enabled vfio device can't be
> hotplugged.
>
> Add a
Markus Armbruster writes:
> Calling error_report() in a function that takes an Error ** argument
> is suspicious. vnc_init_func() does that, and then fails without
> setting an error. Its caller main(), via qemu_opts_foreach(), is fine
> with it, but clean it up anyway.
>
> Cc: Gerd Hoffmann
On Wed, Oct 10, 2018 at 03:30:25PM +0200, Philippe Mathieu-Daudé wrote:
> Cc'ing Eduardo since it might make sens to have this series go via his
> machine-next tree, rather than Jason's net tree.
Queued on machine-next, thanks!
>
> On 01/10/2018 08:37, Cédric Le Goater wrote:
> > Hello,
> >
>
* Markus Armbruster (arm...@redhat.com) wrote:
> "Denis V. Lunev" writes:
>
> > According to PCI specification subsystem id and subsystem vendor id are
> > optinal and could be abscent in Type1 header and can be found on
> > different offsets within Type0 and Type2 headers.
>
> Well, they *are*
Signed-off-by: Alistair Francis
---
default-configs/riscv32-softmmu.mak | 1 +
default-configs/riscv64-softmmu.mak | 1 +
hw/riscv/virt.c | 20 +---
3 files changed, 19 insertions(+), 3 deletions(-)
diff --git a/default-configs/riscv32-softmmu.mak
Connect the gpex PCIe device based on the device tree included in the
HiFive Unleashed ROM.
Signed-off-by: Alistair Francis
---
default-configs/riscv32-softmmu.mak | 6 ++-
default-configs/riscv64-softmmu.mak | 6 ++-
hw/riscv/virt.c | 58 +
From: Michael Clark
Change the API of riscv_set_local_interrupt to take a
write mask and value to allow setting and clearing of
multiple local interrupts atomically in a single call.
Rename the new function to riscv_cpu_update_mip.
Cc: Sagar Karandikar
Cc: Bastian Koppelmann
Cc: Palmer
Hi All,
On Thu, Oct 11, 2018 at 7:22 AM Palmer Dabbelt wrote:
> On Wed, 10 Oct 2018 11:10:07 PDT (-0700), peter.mayd...@linaro.org wrote:
> > On 10 October 2018 at 18:49, Palmer Dabbelt wrote:
> >> we should really
> >> get the ball rolling on our big patch backlog.
> >
> > Yes, please do.
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