On Mon, 25 Feb 2019 21:03:11 +0100
David Hildenbrand wrote:
> Before we start with the real magic, some more cleanups and refactorings.
> This series does not depend on other patches not yet in master.
>
> Also add a variant of "LOAD LENGTHENED" that is used along with
> vector instructions in
>
>
>> > It seems to me that the C extension can be enabled at any point, since
>> if C is
>> > off, you know that the next insn is aligned modulo 4.
>> >
>>
>
> > Ok, This is mostly right. When C extension is enabled 32-bit base
> instructions can be aligned on 2 bytes boundaries instead of 4
On 25/02/2019 18.29, Andrew Randrianasulu wrote:
> В сообщении от Monday 25 February 2019 19:19:01 Philippe Mathieu-Daudc3a9
> написал(а):
>> Hi Andrew,
>>
>> On 2/23/19 1:35 AM, Andrew Randrianasulu wrote:
>>> Hello!
>>>
>>> I just pulled latest git
>>
>> [...]
>>
>>> and default build with
Hi Igor,
On 2/25/19 10:42 AM, Igor Mammedov wrote:
> On Fri, 22 Feb 2019 18:35:26 +0100
> Auger Eric wrote:
>
>> Hi Igor,
>>
>> On 2/22/19 5:27 PM, Igor Mammedov wrote:
>>> On Wed, 20 Feb 2019 23:39:46 +0100
>>> Eric Auger wrote:
>>>
This series aims to bump the 255GB RAM limit in
В сообщении от Tuesday 26 February 2019 11:54:12 вы написали:
> On 25/02/2019 18.29, Andrew Randrianasulu wrote:
> > В сообщении от Monday 25 February 2019 19:19:01 Philippe Mathieu-Daudc3a9
> >
> > написал(а):
> >> Hi Andrew,
> >>
> >> On 2/23/19 1:35 AM, Andrew Randrianasulu wrote:
> >>> Hello!
Mark Cave-Ayland writes:
> On 19/02/2019 18:25, Emilio G. Cota wrote:
>
>> On Tue, Feb 19, 2019 at 14:22:37 +, Alex Bennée wrote:
>>> Emilio,
>>>
>>> Any chance you could run it through your benchmark suite?
>>
>> Something isn't quite right. For instance, gcc in SPEC doesn't
>> complete;
Am 25.02.2019 um 17:18 hat Stefan Hajnoczi geschrieben:
> Test 238 does not require the kvm accelerator. tcg and qtest work too.
>
> Use qtest since it's always built in while kvm and tcg are not.
>
> Suggested-by: Thomas Huth
> Signed-off-by: Stefan Hajnoczi
> ---
> tests/qemu-iotests/238 |
Hi!
A question about s->cow_bitmap, introduced in far b812f6719c
"mirror: perform COW if the cluster size is bigger than the granularity"
cow_bitmap is just a bitmap which tracks, what clusters of target are
allocated, to
prevent COW in target, if target backing is not ready yet. And it is
On 26/02/2019 09.58, Andrew Randrianasulu wrote:
> В сообщении от Tuesday 26 February 2019 11:54:12 вы написали:
>> On 25/02/2019 18.29, Andrew Randrianasulu wrote:
>>> В сообщении от Monday 25 February 2019 19:19:01 Philippe Mathieu-Daudc3a9
>>>
>>> написал(а):
Hi Andrew,
On
Stefan Hajnoczi writes:
> On Mon, Feb 25, 2019 at 10:28:46AM +0100, Peter Krempa wrote:
>> On Mon, Feb 25, 2019 at 09:50:26 +0100, Markus Armbruster wrote:
>> > Stefan Hajnoczi writes:
>> >
>> > > QMP clients can usually detect the presence of features via schema
>> > > introspection. There
Hi Markus,
On 02/25/19 19:37, Markus Armbruster wrote:
> The PC machines put firmware in ROM by default. To get it put into
> flash memory (required by OVMF), you have to use -drive
> if=pflash,unit=0,... and optionally -drive if=pflash,unit=1,...
>
> Why two -drive? This permits setting up
On 26/02/2019 10.46, Andrew Randrianasulu wrote:
[...]
> also, -g 1186x864x32 resulted in funnuy diagonal corruption even at firmware
> screen level, and probably same happening with x86-64/kvm guest if I select
> some less comon, but exposed via xrandr mode. (this bit for -vga std, default)
* Zhang Chen (chen.zh...@intel.com) wrote:
> From: Zhang Chen
>
> In migration_incoming_state_destroy(void) will check the mis->to_src_file
> to double close the mis->to_src_file when occur COLO failover.
>
> Signed-off-by: Zhang Chen
Reviewed-by: Dr. David Alan Gilbert
> ---
>
On Tue, Feb 12, 2019 at 10:56:58AM +0800, Stefan Hajnoczi wrote:
> I'll return to this issue on Monday.
I have played around with posix_fadvise(POSIX_FADV_DONTNEED) and
measured 100+ millisecond latencies. This is not a great primitive to
rely on during migration downtime since it can be slow.
On Tue, Feb 26, 2019 at 03:42:11AM +0200, Nir Soffer wrote:
> On Mon, Feb 25, 2019 at 10:36 PM Eduardo Habkost
[...]
> > -c = f.read(1)
> > -toggled = chr(ord(c) ^ bitmap_flag_unknown)
> > +# The casts to bytearray() below are only necessary
> > +# for Python 2
Dear qemu developers,
Honestly SubmitAPatch is a bit complicated for me, so I'm hoping I've
done everything right. To be sure, you can find my patch here:
https://github.com/bztsrc/qemu-local-timer and diff against the latest
github repo here:
Fairly easy, load with desired size and store it into the right element.
Signed-off-by: David Hildenbrand
---
target/s390x/insn-data.def | 5 +
target/s390x/translate_vx.inc.c | 18 ++
2 files changed, 23 insertions(+)
diff --git a/target/s390x/insn-data.def
This is the first part of vector instruction support for s390x. Parts
will be sent and reviewed piece by piece.
Part 1: Vector Support Instructions
Part 2: Vector Integer Instructions
Part 3: Vector String Instructions
Part 4: Vector Floating-Point Instructions
The current state can be found at
When loading from memory, load to our temporary vector first, so in case
we get an access exception on the second 64 bit element, the vector
won't get modified.
Loading with strange alingment from the end of the address space will
not properly wrap, we can ignore that for now.
Signed-off-by:
Fairly easy, just load from to gprs into a single vector.
Signed-off-by: David Hildenbrand
---
target/s390x/insn-data.def | 2 ++
target/s390x/translate_vx.inc.c | 7 +++
2 files changed, 9 insertions(+)
diff --git a/target/s390x/insn-data.def b/target/s390x/insn-data.def
index
Also fairly easy to implement. One issue we have is that exceptions will
result in some vectors already being modified. At least handle it
consistently per vector by using a temporary vector. Good enough for
now, add a FIXME.
Signed-off-by: David Hildenbrand
---
target/s390x/insn-data.def
We can reuse the helper introduced along with VECTOR LOAD TO BLOCK
BOUNDARY. We just have to take care of converting the highest index into
a length.
Signed-off-by: David Hildenbrand
---
target/s390x/insn-data.def | 2 ++
target/s390x/translate.c| 7 +++
Load the element and replicate it using gvec_dup.
Signed-off-by: David Hildenbrand
---
target/s390x/insn-data.def | 2 ++
target/s390x/translate_vx.inc.c | 18 ++
2 files changed, 20 insertions(+)
diff --git a/target/s390x/insn-data.def b/target/s390x/insn-data.def
index
* Juan Quintela (quint...@redhat.com) wrote:
> Signed-off-by: Juan Quintela
> ---
> hmp.c| 17 +
> hw/core/qdev-properties.c| 11 +++
> include/hw/qdev-properties.h | 1 +
> migration/migration.c| 25 +
>
26.02.2019 12:28, Kevin Wolf wrote:
> Am 26.02.2019 um 09:48 hat Vladimir Sementsov-Ogievskiy geschrieben:
>> Hi!
>>
>> A question about s->cow_bitmap, introduced in far b812f6719c
>> "mirror: perform COW if the cluster size is bigger than the
>> granularity"
>>
>> cow_bitmap is just a
From: Mateja Marjanovic
Add emulation of MMI instruction PCPYUD. The emulation is implemented
using TCG front end operations directly to achieve better performance.
Signed-off-by: Mateja Marjanovic
Reviewed-by: Aleksandar Rikalo
---
target/mips/translate.c | 43
From: Mateja Marjanovic
Add emulation of MMI instruction PEXCH. The emulation is implemented
using TCG front end operations directly to achieve better performance.
Signed-off-by: Mateja Marjanovic
---
target/mips/translate.c | 97 -
1 file
From: Mateja Marjanovic
Add emulation of MMI instruction PCPYH. The emulation is implemented
using TCG front end operations directly to achieve better performance.
Signed-off-by: Mateja Marjanovic
Reviewed-by: Aleksandar Rikalo
---
target/mips/translate.c | 66
On Tue, 26 Feb 2019 at 12:17, Dr. David Alan Gilbert
wrote:
>
> * Peter Maydell (peter.mayd...@linaro.org) wrote:
> > Backtrace of process 125450:
> > Thread 6 (Thread 0xfff800012de0b900 (LWP 127434)):
> > #0 0xfff80001034c5cdc in futex_abstimed_wait_cancelable (private=0,
> >
* Zhang Chen (chen.zh...@intel.com) wrote:
> From: Zhang Chen
>
> When finished COLO failover, the status is FAILOVER_STATUS_COMPLETED.
> The origin codes misunderstand the FAILOVER_STATUS_REQUIRE.
>
> Signed-off-by: Zhang Chen
Why do these 'case's have to only deal with COMPLETED - what
-Original Message-
From: Dr. David Alan Gilbert [mailto:dgilb...@redhat.com]
Sent: Tuesday, February 26, 2019 6:55 PM
To: Zhang, Chen
Cc: Li Zhijian ; Zhang Chen ;
Juan Quintela ; zhanghailiang
; qemu-dev
Subject: Re: [PATCH 2/3] Migration/colo.c: Fix COLO failover status error
*
To avoid an helper, we have to do the actual calculation of the element
address (offset in cpu_env + cpu_env) manually. Factor that out into
get_vec_element_ptr_i64(). The same logic will be reused for "VECTOR
LOAD VR ELEMENT FROM GR".
Signed-off-by: David Hildenbrand
---
We cannot use gvex expansion as the element size of source and
destination differs. So expand manually. Luckily, VECTOR PACK does not
care about saturation or setting the CC, so it can be implemented
without a helper. We have to watch out for overlapping source and
destination registers and use a
We'll have to read/write vector elements quite frequently from helpers.
The tricky bit is properly taking care of endianess. Handle it similar
to aarch64.
target/s390x/vec_helper.c will later also contain vector support
instruction helpers.
Signed-off-by: David Hildenbrand
---
Add a FIXME regarding exceptions during the second store.
Signed-off-by: David Hildenbrand
---
target/s390x/insn-data.def | 2 ++
target/s390x/translate_vx.inc.c | 22 ++
2 files changed, 24 insertions(+)
diff --git a/target/s390x/insn-data.def
Similar to VECTOR LOAD MULTIPLE, just the opposite direction.
Signed-off-by: David Hildenbrand
---
target/s390x/insn-data.def | 2 ++
target/s390x/translate_vx.inc.c | 25 +
2 files changed, 27 insertions(+)
diff --git a/target/s390x/insn-data.def
From: Aleksandar Markovic
Rename function extract_ac_13_12() to extract_ac_15_14().
Signed-off-by: Aleksandar Markovic
Reviewed-by: Aleksandar Rikalo
---
disas/nanomips.cpp | 96 +++---
disas/nanomips.h | 2 +-
2 files changed, 49
Hi Igor,
On 2/26/19 9:40 AM, Auger Eric wrote:
> Hi Igor,
>
> On 2/25/19 10:42 AM, Igor Mammedov wrote:
>> On Fri, 22 Feb 2019 18:35:26 +0100
>> Auger Eric wrote:
>>
>>> Hi Igor,
>>>
>>> On 2/22/19 5:27 PM, Igor Mammedov wrote:
On Wed, 20 Feb 2019 23:39:46 +0100
Eric Auger wrote:
В сообщении от Tuesday 26 February 2019 12:58:11 вы написали:
> On 26/02/2019 10.46, Andrew Randrianasulu wrote:
> [...]
>
> > also, -g 1186x864x32 resulted in funnuy diagonal corruption even at
> > firmware screen level, and probably same happening with x86-64/kvm guest
> > if I select some less
This is the first instruction that uses gvec expansion for duplicating
elements. We will use makros for most gvec calls to simplify translating
vector numbers into offsets (and to not have to worry about oprsz and
maxsz).
Signed-off-by: David Hildenbrand
---
target/s390x/insn-data.def | 2
Take care of overlying inputs and outputs by using a temporary vector.
Signed-off-by: David Hildenbrand
---
target/s390x/helper.h | 1 +
target/s390x/insn-data.def | 2 ++
target/s390x/translate_vx.inc.c | 12
target/s390x/vec_helper.c | 20
Let's start with a more involved one, but it is the first in the list
of vector support instructions (introduced with the vector facility).
Good thing is, we need a lot of basic infrastructure for this. Reading
and writing vector elements, checking element validity as well as loading
vector
We cannot use gvec expansion as source and destination elements are
have different element numbers. So we'll expand using a fancy loop.
Also, we have to take care of overlapping source and target registers and
use a temporary register in case they do.
Signed-off-by: David Hildenbrand
---
Similar to VECTOR GATHER ELEMENT, but the other direction.
Signed-off-by: David Hildenbrand
---
target/s390x/insn-data.def | 3 +++
target/s390x/translate_vx.inc.c | 22 ++
2 files changed, 25 insertions(+)
diff --git a/target/s390x/insn-data.def
Like VECTOR REPLICATE, but the element to be replicated comes from an
immediate.
Signed-off-by: David Hildenbrand
---
target/s390x/insn-data.def | 2 ++
target/s390x/translate_vx.inc.c | 18 ++
2 files changed, 20 insertions(+)
diff --git a/target/s390x/insn-data.def
* Peter Maydell (peter.mayd...@linaro.org) wrote:
> On Mon, 25 Feb 2019 at 14:00, Peter Maydell wrote:
> >
> > Hi; the migration-test is failing really frequently for me
> > for TCG targets (usually on sparc64 host) -- can we just disable
> > it from the test set until we've figured out and
On Tue, 26 Feb 2019 at 11:38, bzt wrote:
>
> Dear qemu developers,
>
> Honestly SubmitAPatch is a bit complicated for me, so I'm hoping I've
> done everything right. To be sure, you can find my patch here:
> https://github.com/bztsrc/qemu-local-timer and diff against the latest
> github repo
From: Mateja Marjanovic
Add emulation of MMI instruction PEXCW. The emulation is implemented
using TCG front end operations directly to achieve better performance.
Signed-off-by: Mateja Marjanovic
---
target/mips/translate.c | 73 -
1 file
Hi
On Mon, Feb 25, 2019 at 7:40 PM Markus Armbruster wrote:
>
> The first call of sysbus_get_default() creates the main system bus and
> stores it in QOM as "/machine/unattached/sysbus". This must not
> happen before main() creates "/machine", or else container_get() would
> "helpfully" create
From: Aleksandar Markovic
Move section on MIPS' mipssim pseudo board to the more
appropriate place.
Signed-off-by: Aleksandar Markovic
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Aleksandar Rikalo
---
qemu-doc.texi | 26 +-
1 file changed, 13 insertions(+), 13
From: Aleksandar Markovic
Add wrappers for MSA integer max/min instructions.
Signed-off-by: Aleksandar Markovic
Reviewed-by: Aleksandar Rikalo
---
tests/tcg/mips/include/wrappers_msa.h | 30 ++
1 file changed, 30 insertions(+)
diff --git
On Tue, 26 Feb 2019 at 12:30, Peter Maydell wrote:
>
> On Tue, 26 Feb 2019 at 12:17, Dr. David Alan Gilbert
> wrote:
> >
> > * Peter Maydell (peter.mayd...@linaro.org) wrote:
> > > Backtrace of process 125450:
> > > Thread 6 (Thread 0xfff800012de0b900 (LWP 127434)):
> > > #0 0xfff80001034c5cdc
Signed-off-by: Denis Plotnikov
---
hmp.c | 8
1 file changed, 8 insertions(+)
diff --git a/hmp.c b/hmp.c
index b2a2b1f84e..5f105b816f 100644
--- a/hmp.c
+++ b/hmp.c
@@ -334,6 +334,10 @@ void hmp_info_migrate_parameters(Monitor *mon, const QDict
*qdict)
params =
zstd allows to migrate with less cpu consumption maintaining the
the same level of data compression as qzip (zlib).
Compression level for zstd is set with migration parameter "compress-level"
in the range 1 - 22. 1 - the best speed, 22 - the best compression.
Levels in the range of 20-22 should
On 2/24/19 12:29 AM, Richard Henderson wrote:
Signed-off-by: Richard Henderson
---
docs/decodetree.rst | 58 +
scripts/decodetree.py | 144 ++
2 files changed, 191 insertions(+), 11 deletions(-)
diff --git a/docs/decodetree.rst
В сообщении от Tuesday 26 February 2019 12:05:02 Thomas Huth написал(а):
> On 26/02/2019 09.58, Andrew Randrianasulu wrote:
> > В сообщении от Tuesday 26 February 2019 11:54:12 вы написали:
> >> On 25/02/2019 18.29, Andrew Randrianasulu wrote:
> >>> В сообщении от Monday 25 February 2019 19:19:01
On Tue, 26 Feb 2019 at 09:06, Thomas Huth wrote:
> Ok, then that's the problem here: GCC often produces some additional
> "may be unused" warnings with -O3, and we normally only guarantee that
> QEMU compiles without warnings when using the standard -O2 optimization
> level.
> So if you want to
Very similar to VECTOR LOAD GR FROM VR ELEMENT, just the opposite
direction.
Signed-off-by: David Hildenbrand
---
target/s390x/insn-data.def | 2 ++
target/s390x/translate_vx.inc.c | 33 +
2 files changed, 35 insertions(+)
diff --git
We sometimes want to work on a temporary vector register instead of the
actual destination, because source and destination might overlap. An
alternative would be loading the vector into two i64 variables, but than
separate handling for accessing the vector elements would be needed.
This is easier.
Take care of properly sign-extending the immediate.
Signed-off-by: David Hildenbrand
---
target/s390x/insn-data.def | 5 +
target/s390x/translate_vx.inc.c | 17 +
2 files changed, 22 insertions(+)
diff --git a/target/s390x/insn-data.def b/target/s390x/insn-data.def
As we only store one element, there is nothing to consider regarding
exceptions.
Signed-off-by: David Hildenbrand
---
target/s390x/insn-data.def | 5 +
target/s390x/translate_vx.inc.c | 18 ++
2 files changed, 23 insertions(+)
diff --git a/target/s390x/insn-data.def
Combine all variant in a single handler. As source and destination
have different element sizes, we can't use gvec expansion. Expand
manually. Also watch out for overlapping source and destination and
use a temporary register in that case.
Signed-off-by: David Hildenbrand
---
Very similar to VECTOR LOAD WITH LENGTH, just the opposite direction.
Signed-off-by: David Hildenbrand
---
target/s390x/helper.h | 1 +
target/s390x/insn-data.def | 2 ++
target/s390x/translate_vx.inc.c | 13 +
target/s390x/vec_helper.c | 15 +++
4
On 26/02/2019 12.05, Peter Maydell wrote:
> On Tue, 26 Feb 2019 at 09:06, Thomas Huth wrote:
>> Ok, then that's the problem here: GCC often produces some additional
>> "may be unused" warnings with -O3, and we normally only guarantee that
>> QEMU compiles without warnings when using the standard
Add emulation of MMI instruction PCPYLD. The emulation is implemented
using TCG front end operations directly to achieve better performance.
Signed-off-by: Mateja Marjanovic
Reviewed-by: Aleksandar Rikalo
---
target/mips/translate.c | 43 ++-
1 file
From: Aleksandar Markovic
Add section on MIPS' Boston board in QEMU user documentation.
Signed-off-by: Aleksandar Markovic
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Aleksandar Rikalo
---
qemu-doc.texi | 9 +
1 file changed, 9 insertions(+)
diff --git a/qemu-doc.texi
Check them at a central point. We'll use a new instruction flag to
flag all vector instructions (IF_VEC) and handle it very similar to
AFP, whereby we use another unused position in the PSW mask to store
the state of vector register enablement per translation block.
Signed-off-by: David
Read the whole input before modifying the destination vector.
Signed-off-by: David Hildenbrand
---
target/s390x/insn-data.def | 2 ++
target/s390x/translate_vx.inc.c | 16
2 files changed, 18 insertions(+)
diff --git a/target/s390x/insn-data.def
Load both elements signed and store them into the two 64 bit elements.
Signed-off-by: David Hildenbrand
---
target/s390x/insn-data.def | 2 ++
target/s390x/translate_vx.inc.c | 33 +
2 files changed, 35 insertions(+)
diff --git a/target/s390x/insn-data.def
From: Mateja Marjanovic
This series adds emulation of PCPYH, PCPYLD, and PCPYUD MMI
instructions.
v2:
- The patch for PCPYH is split into two patches
- Cleaned up handler for PCPYH
- Fixed bugs and cleaned up in handler for PCPYLD
- Fixed bugs and cleaned up in handler for PCPYUD
-
From: Mateja Marjanovic
Set up MMI code to be compiled only for TARGET_MIPS64. This is
needed so that GPRs are 64 bit, and combined with MMI registers,
they will form full 128 bit registers.
Signed-off-by: Mateja Marjanovic
Reviewed-by: Aleksandar Rikalo
---
target/mips/translate.c | 43
Laszlo Ersek writes:
> Hi Markus,
>
> On 02/25/19 19:37, Markus Armbruster wrote:
>> The PC machines put firmware in ROM by default. To get it put into
>> flash memory (required by OVMF), you have to use -drive
>> if=pflash,unit=0,... and optionally -drive if=pflash,unit=1,...
>>
>> Why two
Hi
On Mon, Feb 25, 2019 at 7:46 PM Markus Armbruster wrote:
>
> See the previous commit for rationale.
>
> Signed-off-by: Markus Armbruster
Reviewed-by: Marc-André Lureau
> ---
> hw/core/qdev.c | 39 ---
> include/hw/qdev-core.h | 4
>
On Mon, Feb 25, 2019 at 7:41 PM Markus Armbruster wrote:
>
> main() registers the user's -global only after we create the machine
> object, i.e. too late for devices created in the machine's
> .instance_init().
>
> Fortunately, we know the bug is only latent: the commit before
> previous fixed a
From: Yongbok Kim
The optional Data Scratch Pad RAM (DSPRAM) block provides a general scratch pad
RAM
used for temporary storage of data. The DSPRAM provides a connection to on-chip
memory or memory-mapped registers, which are accessed in parallel with the L1
data
cache to minimize access
From: Aleksandar Markovic
A collection of misc target/mips fixes and improvements for
February 2019.
v3->v4:
- added a patch on DSPRAM support
- order of patches slightly changed
- minor changes in commit messages
- rebased to the latest code
v2->v3:
- added a patches on
Also, the patch adds new migration parameter parameter: compress-type
to be able choose between data compressors available.
By the moment, the only available data compressor is gzip (zlib)
Signed-off-by: Denis Plotnikov
---
migration/migration.c | 42 -
migration/migration.h | 1 +
On 2019-02-26 16:44, Alex Bennée wrote:
> I'm basing this on email addresses or published employment. Please
> confirm if this is correct or you want to be under (None).
Please list me as (None) instead, QEMU is not related to my paid work.
Aurelien
--
Aurelien Jarno
On 18/02/2019 13.27, David Hildenbrand wrote:
> The floating-point extension facility implemented certain changes to
> BFP, HFP and DFP instructions.
>
> As we don't implement HFP/DFP, we can ignore those completely. Related
> to BFP, the changes include
> - SET BFP ROUNDING MODE (SRNMB)
On 26/02/19 14:44, Markus Armbruster wrote:
> Paolo Bonzini writes:
>
>> On 25/02/19 09:44, Stefano Garzarella wrote:
config I440FX
bool
+select PC_PCI
+select PC_ACPI
+select ACPI_SMBUS
+select PCI_PIIX
+select FDC
>>> Should we move
On Mon, Feb 25, 2019 at 08:36:33AM -0600, Eric Blake wrote:
> I missed reviewing this before the pull request, so comments here are
> best for a followup patch:
>
> On 2/25/19 6:31 AM, Daniel P. Berrangé wrote:
> > From: "Daniel P. Berrange"
> >
> > Add a QAuthZList object type that implements
From: "Daniel P. Berrange"
The current qemu_acl module provides a simple access control list
facility inside QEMU, which is used via a set of monitor commands
acl_show, acl_policy, acl_add, acl_remove & acl_reset.
Note there is no ability to create ACLs - the network services (eg VNC
server)
On Fri, 22 Feb 2019 at 14:55, Jason Wang wrote:
>
> The following changes since commit 7817ea16c1bb91ba3849e704d5f3e3c5775087bf:
>
> Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20190221' into
> staging (2019-02-22 13:04:42 +)
>
> are available in the git repository at:
>
>
From: Daniel P. Berrangé
When we run "certtool 2>&1 | head -1" the latter command is likely to
complete and exit before certtool has written everything it wants to
stderr. In at least the RHEL-7 gnutls 3.3.29 this causes certtool to
quit with broken pipe before it has finished writing the
On Tue, 26 Feb 2019 14:11:58 +0100
Auger Eric wrote:
> Hi Igor,
>
> On 2/26/19 9:40 AM, Auger Eric wrote:
> > Hi Igor,
> >
> > On 2/25/19 10:42 AM, Igor Mammedov wrote:
> >> On Fri, 22 Feb 2019 18:35:26 +0100
> >> Auger Eric wrote:
> >>
> >>> Hi Igor,
> >>>
> >>> On 2/22/19 5:27 PM, Igor
On Thu, 21 Feb 2019 at 14:20, Auger Eric wrote:
>
> Hi Peter, Alex,
> On 2/14/19 8:05 PM, Peter Maydell wrote:
> > Support this by making kvm_arch_put_registers() synchronize
> > CPU state back into the list. We sync only those registers
> > where the initial write succeeds, which should be
On 02/26/19 13:35, Markus Armbruster wrote:
> Laszlo Ersek writes:
>>> -#define FLASH_MAP_UNIT_MAX 2
>>> +static PFlashCFI01 *pc_pflash_create(const char *name)
>>> +{
>>> +DeviceState *dev = qdev_create(NULL, TYPE_CFI_PFLASH01);
>>> +
>>> +qdev_prop_set_uint64(dev, "sector-length",
On 2/26/19 10:11 AM, Andrey Shinkevich wrote:
> The data type for bytes in Python 3 differs from the one in Python 2.
> The type cast that is compatible with both versions was applied.
>
> Signed-off-by: Nir Soffer
> Signed-off-by: Andrey Shinkevich
> Reported-by: Kevin Wolf
> ---
Hi
On Thu, Feb 21, 2019 at 5:09 PM Michael S. Tsirkin wrote:
>
> On Fri, Feb 08, 2019 at 12:23:44PM +0100, Marc-André Lureau wrote:
> > Hi,
> >
> > This series is based on previously discussed "[PATCH v4 00/29]
> > vhost-user for input & GPU" and "vhost-user: define conventions for
> >
On 26/02/2019 16:33, Alberto Garcia wrote:
> On Mon 25 Feb 2019 05:39:14 PM CET, Vladimir Sementsov-Ogievskiy wrote:
>>> --- a/block/stream.c
>>> +++ b/block/stream.c
>>> @@ -259,6 +259,15 @@ void stream_start(const char *job_id, BlockDriverState
>>> *bs,
>>>
On 26/02/2019 19:35, Eric Blake wrote:
> On 2/26/19 10:11 AM, Andrey Shinkevich wrote:
>> The data type for bytes in Python 3 differs from the one in Python 2.
>> The type cast that is compatible with both versions was applied.
>>
>> Signed-off-by: Nir Soffer
>> Signed-off-by: Andrey Shinkevich
From: Aleksandar Markovic
Add Citrix, Huawei, Intel, and Microsoft to domain-map.
Signed-off-by: Aleksandar Markovic
[AJB: sorted, added Fujitsu]
Signed-off-by: Alex Bennée
---
contrib/gitdm/domain-map | 5 +
1 file changed, 5 insertions(+)
diff --git a/contrib/gitdm/domain-map
Hi,
I had a few patches sat in my queue so I spent a little time doing
some email address archaeology and cleaning up the gitdm output. Some
of these are guesses so I won't be including them in a pull-request
until I get confirmation from the various contributors.
For reference the current
Based on Tom's LinkedIn profile his QEMU work was while in IBM's
virtualisation group.
Cc: Tom Musta
Signed-off-by: Alex Bennée
---
contrib/gitdm/group-map-ibm | 1 +
1 file changed, 1 insertion(+)
diff --git a/contrib/gitdm/group-map-ibm b/contrib/gitdm/group-map-ibm
index
Marcel works in Red Hat's KVM team.
Cc: Marcel Apfelbaum
Signed-off-by: Alex Bennée
---
contrib/gitdm/group-map-redhat | 1 +
1 file changed, 1 insertion(+)
diff --git a/contrib/gitdm/group-map-redhat b/contrib/gitdm/group-map-redhat
index 6d05c6b54f..1335569dda 100644
---
I'm basing this on email addresses or published employment. Please
confirm if this is correct or you want to be under (None).
Cc: Samuel Thibault
Cc: Aurelien Jarno
Cc: BALATON Zoltan
Signed-off-by: Alex Bennée
---
contrib/gitdm/group-map-academics | 9 +
1 file changed, 9
From: Aleksandar Markovic
Add all missing MIPS/Imgtec/Wave contributors (from the inception of
QEMU).
Signed-off-by: Aleksandar Markovic
Signed-off-by: Alex Bennée
---
contrib/gitdm/group-map-wavecomp | 12
1 file changed, 12 insertions(+)
diff --git
I know Richard's is right because I asked him in the pub. I'm guessing
Fredrik's based on the fact I vaguely remember an Atari demo.
Cc: Richard Henderson
Cc: Fredrik Noring
Signed-off-by: Alex Bennée
---
contrib/gitdm/group-map-individuals | 2 ++
1 file changed, 2 insertions(+)
diff --git
On Sat, 23 Feb 2019 at 14:16, Marcel Apfelbaum
wrote:
>
> The following changes since commit 8eb29f1bf5a974dc4c11d2d1f5e7c7f7a62be116:
>
> Merge remote-tracking branch
> 'remotes/awilliam/tags/vfio-updates-20190221.0' into staging (2019-02-22
> 15:48:04 +)
>
> are available in the Git
From: Andrey Shinkevich
The data type for bytes in Python 3 differs from the one in Python 2.
The type cast that is compatible with both versions was applied.
Signed-off-by: Nir Soffer
Signed-off-by: Andrey Shinkevich
Reported-by: Kevin Wolf
Message-Id:
1 - 100 of 327 matches
Mail list logo
