Re: [PATCH v2] util/cutils: Expand do_strtosz parsing precision to 64 bits

Patchew URL: https://patchew.org/QEMU/20191209063841.8321-1-tao3...@intel.com/ Hi, This series failed the docker-quick@centos7 build test. Please find the testing commands and their output below. If you have Docker installed, you can probably reproduce it locally. === TEST SCRIPT BEGIN === #!

Re: [PATCH 1/5] arm64: zynqmp: Add firmware DT node

On Sun, Dec 08, 2019 at 11:19:33PM -0800, Guenter Roeck wrote: > On 12/8/19 10:42 PM, Michal Simek wrote: > > Hi, +Edgar > > > > > > On 08. 12. 19 23:38, Guenter Roeck wrote: > > > On Fri, Oct 18, 2019 at 06:07:31PM +0200, Michael Tretter wrote: > > > > From: Rajan Vaja > > > > > > > > Add firm

[PATCH RESEND v2] util/cutils: Expand do_strtosz parsing precision to 64 bits

Parse input string both as a double and as a uint64_t, then use the method which consumes more characters. Update the related test cases. Signed-off-by: Tao Xu --- Changes in v2: - Resend to use double small than DBL_MIN - Add more test case for double overflow and underflow. - Set m

Re: [PATCH 1/5] arm64: zynqmp: Add firmware DT node

On 09. 12. 19 8:48, Edgar E. Iglesias wrote: > On Sun, Dec 08, 2019 at 11:19:33PM -0800, Guenter Roeck wrote: >> On 12/8/19 10:42 PM, Michal Simek wrote: >>> Hi, +Edgar >>> >>> >>> On 08. 12. 19 23:38, Guenter Roeck wrote: On Fri, Oct 18, 2019 at 06:07:31PM +0200, Michael Tretter wrote: >

Re: [PATCH] hw/core: Fix data type in do_nmi()

On Sun, 8 Dec 2019 00:14:00 +1100 Gavin Shan wrote: > On 12/7/19 3:50 AM, Greg Kurz wrote: > > On Fri, 6 Dec 2019 17:36:42 +1100 > > Gavin Shan wrote: > > > >> object_dynamic_cast() should return machine (or GPIO) state instad of NMI > >> state in do_nmi(). So it's wrong to convert it to NMI s

Re: [PATCH 1/5] arm64: zynqmp: Add firmware DT node

On 09. 12. 19 8:19, Guenter Roeck wrote: > On 12/8/19 10:42 PM, Michal Simek wrote: >> Hi, +Edgar >> >> >> On 08. 12. 19 23:38, Guenter Roeck wrote: >>> On Fri, Oct 18, 2019 at 06:07:31PM +0200, Michael Tretter wrote: From: Rajan Vaja Add firmware DT node in ZynqMP device tree. This

[RFC] Use of the Nacked-by tag by CI scripts

Hi, The Nacked-by tag can be used to manually hold a patch for further review, or by automatic CI because of failing test. We often miss travis-ci and shippable failures. These CI provide a easy way to send email on failure, we can integrate the Nacked-by use there. We can easily have patch

Re: [PATCH] target/i386: remove unused pci-assign codes

On 09/12/19 08:29, Eiichi Tsukata wrote: > Legacy PCI device assignment has been already removed in commit ab37bfc7d641 > ("pci-assign: Remove"), but some codes remain unused. > > CC: qemu-triv...@nongnu.org > Signed-off-by: Eiichi Tsukata > --- > target/i386/kvm.c | 140 ---

[PATCH] hw/arm/virt: Simplify by moving the gic in the machine state

Make the gic a field in the machine state, and instead of filling an array of qemu_irq and passing it around, directly call qdev_get_gpio_in() on the gic field. Signed-off-by: Philippe Mathieu-Daudé --- include/hw/arm/virt.h | 1 + hw/arm/virt.c | 109 +-

Re: [PATCH] Fix some comment spelling errors.

On 07/12/19 08:44, Stefan Weil wrote: > > s/compatabile/compatible/ > > can perhaps be fixed, too, when merging this commit. Done, and queued. Thanks! Paolo

Re: [for-5.0 PATCH 1/3] cpu: Introduce CPUReset callback typedef

On Fri, 06 Dec 2019 19:43:54 +0100 Greg Kurz wrote: > Use it in include/hw/core/cpu.h and convert all targets to use it as > well with: > > perl -pi \ > -e 's/void\s+\(\*(parent_reset)\)\(CPUState\s+\*\w+\)/CPUReset \1/;' \ > $(git ls-files 'target/*.h') > > Signed-off-by: Greg Kurz > --- >

Re: [PATCH V3 0/4] Introduce Advanced Watch Dog module

On 08/12/19 18:52, Zhang, Chen wrote: > Hi All~ > > No news for a long time. > > Please give me more comments about this series. Sorry, people were probably busy with the QEMU release candidates. Even before looking at the code, the series is completely missing documentation on how to use it an

[PATCH] target/i386: remove unused pci-assign codes

Legacy PCI device assignment has been already removed in commit ab37bfc7d641 ("pci-assign: Remove"), but some codes remain unused. CC: qemu-triv...@nongnu.org Signed-off-by: Eiichi Tsukata --- target/i386/kvm.c | 140 - target/i386/kvm_i386.h | 20 --

Re: [PATCH] hw/core: Fix data type in do_nmi()

On 12/9/19 7:36 PM, Greg Kurz wrote: On Sun, 8 Dec 2019 00:14:00 +1100 Gavin Shan wrote: On 12/7/19 3:50 AM, Greg Kurz wrote: On Fri, 6 Dec 2019 17:36:42 +1100 Gavin Shan wrote: object_dynamic_cast() should return machine (or GPIO) state instad of NMI state in do_nmi(). So it's wrong to c

Re: [for-5.0 PATCH 2/3] cpu: Introduce cpu_class_set_parent_reset()

On Fri, 06 Dec 2019 19:44:00 +0100 Greg Kurz wrote: > Similarly to what we already do with qdev, use a helper to overload the > reset QOM methods of the parent in children classes, for clarity. > > Signed-off-by: Greg Kurz > --- > hw/core/cpu.c |8 > include/hw/core/cpu.h

Re: [PATCH 1/5] hw/arm/smmuv3: Apply address mask to linear strtab base address

Hi Simon, On 12/5/19 11:04 PM, Simon Veith wrote: > Hello Eric, > > On 05/12/2019 09:42, Auger Eric wrote: >> Not related to this patch but I noticed SMMU_BASE_ADDR_MASK should be >> 0xffc0 and not 0xffe0. I can fix it separately or if you >> respin, you may fix it as well? > > G

Re: [for-5.0 PATCH 3/3] cpu: Use cpu_class_set_parent_reset()

On Fri, 06 Dec 2019 19:44:06 +0100 Greg Kurz wrote: > Convert all targets to use cpu_class_set_parent_reset() with the following > coccinelle script: > > @@ > type CPUParentClass; > CPUParentClass *pcc; > CPUClass *cc; > identifier parent_fn; > identifier child_fn; > @@ > +cpu_class_set_parent_r

Re: [PATCH] hw/arm/virt: Simplify by moving the gic in the machine state

On 12/9/19 10:03 AM, Philippe Mathieu-Daudé wrote: > Make the gic a field in the machine state, and instead of filling > an array of qemu_irq and passing it around, directly call > qdev_get_gpio_in() on the gic field. > > Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Luc Michel > --- > i

Re: [RFC] Use of the Nacked-by tag by CI scripts

On Monday, December 9, 2019, Philippe Mathieu-Daudé wrote: > Hi, > > The Nacked-by tag can be used to manually hold a patch for further review, > or by automatic CI because of failing test. > > We often miss travis-ci and shippable failures. These CI provide a easy > way to send email on failure,

Re: [RFC] Use of the Nacked-by tag by CI scripts

On 09/12/19 10:28, Aleksandar Markovic wrote: > If there is a consensus about using this tag, the following patch > can be added to Peter's management scripts: > https://git.linaro.org/people/pmaydell/misc-scripts.git/ > >

[PATCH-for-5.0 v3 1/6] hw/pci-host/i440fx: Correct the header description

Missed during the refactor in commits 14a026dd58 and 0f25d865a, this file is now only about the i440FX chipset. Signed-off-by: Philippe Mathieu-Daudé --- hw/pci-host/i440fx.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/pci-host/i440fx.c b/hw/pci-host/i440fx.c index f27

[PATCH-for-5.0 v3 0/6] hw/pci-host: Add Kconfig selector for IGD PCIe pass-through

Introduce a kconfig selector to allow builds without Intel Integrated Graphics Device GPU PCIe passthrough. This device is enabled by default on the Xen build. v3: - Make it Xen specific v2: - do not mix with vfio code (Alex) - extract to different file to avoid #ifdef (Thomas) Philippe Mathieu

[PATCH-for-5.0 v3 4/6] hw/pci-host/i440fx: Use definitions instead of magic values

Use definitions from "hw/pci/pci_regs.h". This also helps when using git-grep. Signed-off-by: Philippe Mathieu-Daudé --- hw/pci-host/i440fx.c | 14 +++--- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/hw/pci-host/i440fx.c b/hw/pci-host/i440fx.c index 0cc80b276d..414138595

[PATCH-for-5.0 v3 2/6] hw/pci-host/i440fx: Extract PCII440FXState to "hw/pci-host/i440fx.h"

Make the PCII440FXState structure public, so it can be used out of this source file. This will allow us to extract the IGD Passthrough Host Bridge, which is a children of the TYPE_I440FX_PCI_DEVICE. Signed-off-by: Philippe Mathieu-Daudé --- include/hw/pci-host/i440fx.h | 19 +--

[PATCH-for-5.0 v3 6/6] hw/pci-host: Add Kconfig entry to select the IGD Passthrough Host Bridge

Add the XEN_IGD_PASSTHROUGH Kconfig option. Xen build has that option selected by default. Non-Xen builds now have to select this feature manually. Signed-off-by: Philippe Mathieu-Daudé --- v3: Only default with Xen (Alex Williamson) I did not used 'depends on XEN' as suggested by Alex but 'def

[PATCH-for-5.0 v3 3/6] hw/pci-host/i440fx: Use size_t to iterate over ARRAY_SIZE()

We don't enforce the -Wsign-conversion CPPFLAG, but it doesn't hurt to avoid this warning: warning: implicit conversion changes signedness: 'int' to 'size_t' (aka 'unsigned long') [-Wsign-conversion] Signed-off-by: Philippe Mathieu-Daudé --- hw/pci-host/i440fx.c | 5 ++--- 1 file changed, 2

[PATCH-for-5.0 v3 5/6] hw/pci-host/i440fx: Extract the IGD passthrough host bridge device

We can use a i440FX without the IGD passthrough host bridge. Extract it into a new file, 'hw/pci-host/igd_pt.c'. Signed-off-by: Philippe Mathieu-Daudé --- v3: - Rename as 'xen_igd_pt.c' (Alex Williamson) - Add an entry in MAINTAINERS::Xen --- hw/pci-host/i440fx.c | 84 -

Re: [PATCH-for-5.0 v3 1/6] hw/pci-host/i440fx: Correct the header description

On 09/12/2019 10.49, Philippe Mathieu-Daudé wrote: > Missed during the refactor in commits 14a026dd58 and 0f25d865a, > this file is now only about the i440FX chipset. > > Signed-off-by: Philippe Mathieu-Daudé > --- > hw/pci-host/i440fx.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) >

Re: [PATCH-for-5.0 v3 2/6] hw/pci-host/i440fx: Extract PCII440FXState to "hw/pci-host/i440fx.h"

On 09/12/2019 10.49, Philippe Mathieu-Daudé wrote: > Make the PCII440FXState structure public, so it can be used out of > this source file. This will allow us to extract the IGD Passthrough > Host Bridge, which is a children of the TYPE_I440FX_PCI_DEVICE. > > Signed-off-by: Philippe Mathieu-Daudé

Re: [PATCH-for-5.0 v3 3/6] hw/pci-host/i440fx: Use size_t to iterate over ARRAY_SIZE()

On 09/12/2019 10.49, Philippe Mathieu-Daudé wrote: > We don't enforce the -Wsign-conversion CPPFLAG, but it doesn't hurt > to avoid this warning: > > warning: implicit conversion changes signedness: 'int' to 'size_t' (aka > 'unsigned long') [-Wsign-conversion] > > Signed-off-by: Philippe Mathi

Re: [PATCH-for-5.0 v3 4/6] hw/pci-host/i440fx: Use definitions instead of magic values

On 09/12/2019 10.50, Philippe Mathieu-Daudé wrote: > Use definitions from "hw/pci/pci_regs.h". > This also helps when using git-grep. > > Signed-off-by: Philippe Mathieu-Daudé > --- > hw/pci-host/i440fx.c | 14 +++--- > 1 file changed, 7 insertions(+), 7 deletions(-) > > diff --git a/hw

Re: [RFC] Use of the Nacked-by tag by CI scripts

On Monday, December 9, 2019, Paolo Bonzini wrote: > On 09/12/19 10:28, Aleksandar Markovic wrote: > > If there is a consensus about using this tag, the following patch > > can be added to Peter's management scripts: > > https://git.linaro.org/people/pmaydell/misc-scripts.git/ > >

Re: [PATCH] gdbstub: change GDBState.last_packet to GByteArray

On 12/6/19 2:42 PM, Damien Hedde wrote: > Remove the packet size upper limit by using a GByteArray > instead of a statically allocated array for last_packet. > Thus we can now send big packets. > > Also remove the last_packet_len field and use last_packet->len > instead. > > Signed-off-by: Dam

Re: [Bug 1855617] [NEW] savevm with hax saves wrong register state

cc'ing Colin and Yu for Hax info: * Alex (1855...@bugs.launchpad.net) wrote: > Public bug reported: > > I use qemu-i386 with IntelHaxm on Windows 10 x64 host with Windows 7 x86 > guest. I run the guest till OS loads and create a snapshot with savevm, then > close qemu, run it again and try to l

Re: [RFC] Use of the Nacked-by tag by CI scripts

On 09/12/19 11:12, Aleksandar Markovic wrote: > I'm afraid this would be opening a Pandora's box. For such rare cases, a > message from a person: "Please hold on this patch until I am back from > vacation.", "Please wait until I merge my series acting on the same > files", or similar, would perfect

Re: [PATCH-for-5.0 v3 6/6] hw/pci-host: Add Kconfig entry to select the IGD Passthrough Host Bridge

On 09/12/19 10:50, Philippe Mathieu-Daudé wrote: > Add the XEN_IGD_PASSTHROUGH Kconfig option. > > Xen build has that option selected by default. Non-Xen builds now > have to select this feature manually. > > Signed-off-by: Philippe Mathieu-Daudé > --- > v3: Only default with Xen (Alex Williamso

Re: [Xen-devel] [PATCH-for-5.0 v3 6/6] hw/pci-host: Add Kconfig entry to select the IGD Passthrough Host Bridge

On 09/12/19 11:10, Durrant, Paul wrote: >> >> Signed-off-by: Philippe Mathieu-Daudé >> --- >> v3: Only default with Xen (Alex Williamson) >> >> I did not used 'depends on XEN' as suggested by Alex but >> 'default y if XEN', so one can build XEN without this feature >> (for example, on other ARCH t

Re: [PATCH] hw/core: Fix data type in do_nmi()

On Mon, 9 Dec 2019 20:12:09 +1100 Gavin Shan wrote: > On 12/9/19 7:36 PM, Greg Kurz wrote: > > On Sun, 8 Dec 2019 00:14:00 +1100 > > Gavin Shan wrote: > > > >> On 12/7/19 3:50 AM, Greg Kurz wrote: > >>> On Fri, 6 Dec 2019 17:36:42 +1100 > >>> Gavin Shan wrote: > >>> > object_dynamic_cast

Re: [Xen-devel] [PATCH-for-5.0 v3 6/6] hw/pci-host: Add Kconfig entry to select the IGD Passthrough Host Bridge

On 12/9/19 11:42 AM, Paolo Bonzini wrote: On 09/12/19 11:10, Durrant, Paul wrote: Signed-off-by: Philippe Mathieu-Daudé --- v3: Only default with Xen (Alex Williamson) I did not used 'depends on XEN' as suggested by Alex but 'default y if XEN', so one can build XEN without this feature (for e

Re: [Virtio-fs] [PATCH 4/4] virtiofsd: Implement blocking posix locks

* Vivek Goyal (vgo...@redhat.com) wrote: > On Tue, Nov 26, 2019 at 01:02:29PM +, Dr. David Alan Gilbert wrote: > > [..] > > > > > @@ -1950,21 +1948,54 @@ static void lo_setlk(fuse_req_t req, > > > > > fuse_ino_t ino, > > > > > > > > > > if (!plock) { > > > > > saverr = r

Re: [for-5.0 PATCH 0/4] ppc: Fix interrupt controller emulation

On Mon, 9 Dec 2019 12:14:28 +1100 David Gibson wrote: > On Wed, Dec 04, 2019 at 08:43:31PM +0100, Greg Kurz wrote: > > Guest hangs have been observed recently on POWER9 hosts, specifically LC92x > > "Boston" systems, when the guests are being rebooted multiple times. The > > issue isn't POWER9 sp

Re: [for-5.0 PATCH 0/4] ppc: Fix interrupt controller emulation

On Mon, 9 Dec 2019 11:59:47 +0100 Greg Kurz wrote: > On Mon, 9 Dec 2019 12:14:28 +1100 > David Gibson wrote: > > > On Wed, Dec 04, 2019 at 08:43:31PM +0100, Greg Kurz wrote: > > > Guest hangs have been observed recently on POWER9 hosts, specifically > > > LC92x > > > "Boston" systems, when t

[PATCH] virtio-fs: fix MSI-X nvectors calculation

The following MSI-X vectors are required: * VIRTIO Configuration Change * hiprio virtqueue * requests virtqueues Fix the calculation to reserve enough MSI-X vectors. Otherwise guest drivers fall back to a sub-optional configuration where all virtqueues share a single vector. This change does

Re: [Xen-devel] [PATCH-for-5.0 v3 6/6] hw/pci-host: Add Kconfig entry to select the IGD Passthrough Host Bridge

On 09/12/19 11:56, Philippe Mathieu-Daudé wrote: > > I think so, but with PC_I440FX -> PCI_I440FX ;) > > It would be cleaner to pass the CONFIG_XEN_PCI_PASSTHROUGH variable to > Kconfig and use it (use 'depends on XEN_PCI_PASSTHROUGH'). > > This can be another step, so if this series looks OK to

Re: [for-5.0 PATCH 0/4] ppc: Fix interrupt controller emulation

On Mon, 9 Dec 2019 12:07:35 +0100 Cornelia Huck wrote: > On Mon, 9 Dec 2019 11:59:47 +0100 > Greg Kurz wrote: > > > On Mon, 9 Dec 2019 12:14:28 +1100 > > David Gibson wrote: > > > > > On Wed, Dec 04, 2019 at 08:43:31PM +0100, Greg Kurz wrote: > > > > Guest hangs have been observed recently

Re: [PATCH 2/2] net: Drop the NetLegacy structure, always use Netdev instead

On 06/12/2019 16.14, Eric Blake wrote: > On 12/5/19 11:36 PM, Thomas Huth wrote: >> Now that the "name" parameter is gone, there is hardly any difference >> between NetLegacy and Netdev anymore. Drop NetLegacy and always use >> Netdev to simplify the code quite a bit. >> >> Signed-off-by: Thomas Hu

Re: [PATCH 03/11] target/arm: Add mmu_idx for EL1 and EL2 w/ PAN enabled

On Tue, 3 Dec 2019 at 22:53, Richard Henderson wrote: > > To implement PAN, we will want to swap, for short periods > of time, to a different privileged mmu_idx. In addition, > we cannot do this with flushing alone, because the AT* > instructions have both PAN and PAN-less versions. > > Add the A

Re: [PATCH 09/11] target/arm: Set PAN bit as required on exception entry

On Tue, 3 Dec 2019 at 22:53, Richard Henderson wrote: > > The PAN bit is preserved, or set as per SCTLR_ELx.SPAN, > plus several other conditions listed in the ARM ARM. > > Signed-off-by: Richard Henderson > --- > target/arm/helper.c | 42 +++--- > 1 file chan

Re: [PATCH v6 02/21] libqos: Rename i2c_send and i2c_recv

On 29/11/2019 22.34, Oleinik, Alexander wrote: > The names i2c_send and i2c_recv collide with functions defined in > hw/i2c/core.c. This causes an error when linking against libqos and > softmmu simultaneously (for example when using qtest inproc). Rename the > libqos functions to avoid this. > >

[PATCH v2 0/4] Remove deprecated pc-0.x machine types and related hacks

These have been on the deprecation list since a year now, so it's time to finally remove the pc-0.x machine types. We then can also remove some compatibility hacks in the devices, i.e. the "use_broken_id" in ac97, the "command_serr_enable" in PCI devices and the "rombar" stuff in VGA devices. v2:

[PATCH v2 3/4] hw/pci: Remove the "command_serr_enable" property

Now that the old pc-0.x machine types have been removed, this config knob is not required anymore. Signed-off-by: Thomas Huth --- hw/pci/pci.c | 6 +- include/hw/pci/pci.h | 2 +- 2 files changed, 2 insertions(+), 6 deletions(-) diff --git a/hw/pci/pci.c b/hw/pci/pci.c index cbc7a32

[PATCH v2 1/4] hw/i386: Remove the deprecated machines 0.12 up to 0.15

These machines can't be used reliably for migration anymore, quoting https://lists.gnu.org/archive/html/qemu-devel/2018-12/msg04516.html : " due to the introduction of the memory API, the firmware is not migrated correctly from source to destination. On QEMU <1.3 the 0xf-0xf area is ba

[PATCH v2 4/4] hw/display: Remove "rombar" hack from vga-pci and vmware_vga

Now that the old pc-0.x machine types have been removed, we do not need the old "rombar" hacks anymore. Signed-off-by: Thomas Huth --- hw/display/vga-pci.c| 5 - hw/display/vga.c| 4 +--- hw/display/vmware_vga.c | 5 - 3 files changed, 1 insertion(+), 13 deletions(-) diff --

[PATCH v2 2/4] hw/audio: Remove the "use_broken_id" hack from the AC97 device

Now that the old pc-0.x machine types are gone, we do not need the "use_broken_id" hack anymore. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Thomas Huth --- hw/audio/ac97.c | 9 - 1 file changed, 9 deletions(-) diff --git a/hw/audio/ac97.c b/hw/audio/ac97.c index a136b97f68..78c

RE: [PATCH 1/5] hw/arm: Align ACPI blob len to PAGE size

Hi Igor/ Michael, > -Original Message- > From: Linuxarm [mailto:linuxarm-boun...@huawei.com] On Behalf Of > Shameerali Kolothum Thodi > Sent: 11 November 2019 12:47 > To: Igor Mammedov > Cc: peter.mayd...@linaro.org; shannon.zha...@gmail.com; Michael S. Tsirkin > ; qemu-devel@nongnu.org;

Re: [RESEND PATCH v21 5/6] target-arm: kvm64: handle SIGBUS signal from kernel or KVM

On Sat, 7 Dec 2019 at 09:33, gengdongjiu wrote: > > > > On 2019/11/22 23:47, Beata Michalska wrote: > > Hi, > > > > On Mon, 11 Nov 2019 at 01:48, Xiang Zheng wrote: > >> > >> From: Dongjiu Geng > >> > >> Add a SIGBUS signal handler. In this handler, it checks the SIGBUS type, > >> translates the

Re: [PATCH v2 0/4] Remove deprecated pc-0.x machine types and related hacks

On 09/12/19 13:52, Thomas Huth wrote: > These have been on the deprecation list since a year now, so it's > time to finally remove the pc-0.x machine types. > > We then can also remove some compatibility hacks in the devices, i.e. > the "use_broken_id" in ac97, the "command_serr_enable" in PCI dev

[PATCH for-5.0 v2 4/9] acpi: cpuhp: spec: clarify 'CPU selector' register usage and endianness

* Move reserved registers to the top of the section, so reader would be aware of effects when reading registers description. * State registers endianness explicitly at the beginning of the section * Describe registers behavior in case of 'CPU selector' register contains value that doesn't point

[PATCH for-5.0 v2 1/9] hw: add compat machines for 5.0

From: Cornelia Huck Add 5.0 machine types for arm/i440fx/q35/s390x/spapr. For i440fx and q35, unversioned cpu models are still translated to -v1; I'll leave changing this (if desired) to the respective maintainers. Signed-off-by: Cornelia Huck Signed-off-by: Igor Mammedov --- include/hw/boar

[PATCH for-5.0 v2 0/9] q35: CPU hotplug with secure boot, part 1+2

ChangeLog: * since v1: - include "hw: add compat machines for 5.0" to provide compat context for 4.2 machine types - add comment that SMRAM at SMBASE is QEMU hack and why it was used - split command data 2 into a separate patch "acpi: cpuhp: introduce '

[PATCH for-5.0 v2 2/9] q35: implement 128K SMRAM at default SMBASE address

It's not what real HW does, implementing which would be overkill [**] and would require complex cross stack changes (QEMU+firmware) to make it work. So considering that SMRAM is owned by MCH, for simplicity (ab)use reserved Q35 register, which allows QEMU and firmware easily init and make RAM at SM

[PATCH for-5.0 v2 3/9] tests: q35: MCH: add default SMBASE SMRAM lock test

test lockable SMRAM at default SMBASE feature, introduced by patch "q35: implement 128K SMRAM at default SMBASE address" Signed-off-by: Igor Mammedov --- tests/q35-test.c | 105 +++ 1 file changed, 105 insertions(+) diff --git a/tests/q35-test

[PATCH for-5.0 v2 5/9] acpi: cpuhp: spec: fix 'Command data' description

Correct returned value description in case 'Command field' == 0x0, it's not PXM but CPU selector value with pending event In addition describe 0 blanket value in case of not supported 'Command field' value. Signed-off-by: Igor Mammedov Reviewed-by: Laszlo Ersek --- v2: * rephrase a docs little

[PATCH for-5.0 v2 7/9] acpi: cpuhp: introduce 'Command data 2' field

No functional change in practice, patch only aims to properly document (in spec and code) intended usage of the reserved space. The new field is to be used for 2 purposes: - detection of modern CPU hotplug interface using CPHP_GET_NEXT_CPU_WITH_EVENT_CMD command. procedure will be descri

[PATCH for-5.0 v2 6/9] acpi: cpuhp: spec: clarify store into 'Command data' when 'Command field' == 0

Write section of 'Command data' register should describe what happens when it's written into. Correct description in case the last stored 'Command field' value is equal to 0, to reflect that currently it's not supported. Signed-off-by: Igor Mammedov Reviewed-by: Laszlo Ersek --- docs/specs/acpi

[PATCH for-5.0 v2 9/9] acpi: cpuhp: add CPHP_GET_CPU_ID_CMD command

Firmware can enumerate present at boot APs by broadcasting wakeup IPI, so that woken up secondary CPUs could register them-selves. However in CPU hotplug case, it would need to know architecture specific CPU IDs for possible and hotplugged CPUs so it could prepare environment for and wake hotplugge

[PATCH for-5.0 v2 8/9] acpi: cpuhp: spec: add typical usecases

Document work-flows for * enabling/detecting modern CPU hotplug interface * finding a CPU with pending 'insert/remove' event * enumerating present and possible CPUs Signed-off-by: Igor Mammedov --- v2: - fix indent of "other values" that's just above being added "Typical usecases:" sect

Re: [PULL 0/1] ppc-for-4.2 queue 2019-12-06

ilable in the Git repository at: > > git://github.com/dgibson/qemu.git tags/ppc-for-4.2-20191209 > > for you to fetch changes up to a2fad86497b981426dc720236c15f2a99ca674a9: > > pseries: Update SLOF firmware image (2019-12-09 12:16:26 +1100) > > ---

Re: [PATCH v2 4/4] hw/display: Remove "rombar" hack from vga-pci and vmware_vga

On 12/9/19 1:52 PM, Thomas Huth wrote: Now that the old pc-0.x machine types have been removed, we do not need the old "rombar" hacks anymore. Signed-off-by: Thomas Huth --- hw/display/vga-pci.c| 5 - hw/display/vga.c| 4 +--- hw/display/vmware_vga.c | 5 - 3 files chan

[for-5.0 PATCH] ppc: Make PPCVirtualHypervisor an incomplete type

PPCVirtualHypervisor is an interface instance. It should never be dereferenced. Drop the dummy type definition for extra safety, which is the common practice with QOM interfaces. Signed-off-by: Greg Kurz --- target/ppc/cpu.h |4 1 file changed, 4 deletions(-) diff --git a/target/ppc/cp

Re: [PATCH v2 4/4] hw/display: Remove "rombar" hack from vga-pci and vmware_vga

On 09/12/19 14:12, Philippe Mathieu-Daudé wrote: > On 12/9/19 1:52 PM, Thomas Huth wrote: >> Now that the old pc-0.x machine types have been removed, we do not need >> the old "rombar" hacks anymore. >> >> Signed-off-by: Thomas Huth >> --- >>   hw/display/vga-pci.c    | 5 - >>   hw/display/vga

Re: [PATCH v2 4/4] hw/display: Remove "rombar" hack from vga-pci and vmware_vga

On Mon, Dec 09, 2019 at 02:12:35PM +0100, Philippe Mathieu-Daudé wrote: > On 12/9/19 1:52 PM, Thomas Huth wrote: > > Now that the old pc-0.x machine types have been removed, we do not need > > the old "rombar" hacks anymore. > > > > Signed-off-by: Thomas Huth > > --- > > hw/display/vga-pci.c

Re: [PATCH 0/3] iotests: Check for the possibility to create large files

Am 02.12.2019 um 11:16 hat Thomas Huth geschrieben: > Travis recently added the possibility to test on ppc64le, arm64 and s390x > hosts, too. However, the containers are very restricted there and do not > allow the creation of large files, so that the tests 060 and 079 are > currently failing there

RE: [Xen-devel] [PATCH-for-5.0 v3 6/6] hw/pci-host: Add Kconfig entry to select the IGD Passthrough Host Bridge

> -Original Message- > From: Xen-devel On Behalf Of > Philippe Mathieu-Daudé > Sent: 09 December 2019 09:50 > To: qemu-devel@nongnu.org > Cc: Thomas Huth ; Stefano Stabellini > ; Michael S. Tsirkin ; Paul > Durrant ; Markus Armbruster ; Alex > Williamson ; Marcel Apfelbaum > ; Paolo Bonzin

RE: [Xen-devel] [PATCH-for-5.0 v3 5/6] hw/pci-host/i440fx: Extract the IGD passthrough host bridge device

> -Original Message- > From: Xen-devel On Behalf Of > Philippe Mathieu-Daudé > Sent: 09 December 2019 09:50 > To: qemu-devel@nongnu.org > Cc: Thomas Huth ; Stefano Stabellini > ; Michael S. Tsirkin ; Paul > Durrant ; Markus Armbruster ; Alex > Williamson ; Marcel Apfelbaum > ; Paolo Bonzin

Re: [PATCH 10/11] target/arm: Implement ATS1E1 system registers

On Tue, 3 Dec 2019 at 22:53, Richard Henderson wrote: > > This is a minor enhancement over ARMv8.1-PAN. > The *_PAN mmu_idx are used with the existing do_ats_write. > > Signed-off-by: Richard Henderson > --- > target/arm/helper.c | 50 +++-- > 1 file chang

[PATCH] target/arm: Display helpful message when hflags mismatch

Instead of crashing in a confuse way, give some hint to the user about why we aborted. He might report the issue without having to use a debugger. Signed-off-by: Philippe Mathieu-Daudé --- target/arm/helper.c | 18 +++--- 1 file changed, 15 insertions(+), 3 deletions(-) diff --git a

[PATCH for-5.0 v3 3/9] tests: q35: MCH: add default SMBASE SMRAM lock test

test lockable SMRAM at default SMBASE feature, introduced by patch "q35: implement 128K SMRAM at default SMBASE address" Signed-off-by: Igor Mammedov --- v3: - a bunch of spelling fixes (Christophe de Dinechin ) --- tests/q35-test.c | 105 +

Re: [PATCH v2 4/4] hw/display: Remove "rombar" hack from vga-pci and vmware_vga

On 09/12/2019 14.30, Paolo Bonzini wrote: > On 09/12/19 14:12, Philippe Mathieu-Daudé wrote: >> On 12/9/19 1:52 PM, Thomas Huth wrote: >>> Now that the old pc-0.x machine types have been removed, we do not need >>> the old "rombar" hacks anymore. >>> >>> Signed-off-by: Thomas Huth >>> --- >>>   hw

Re: [PATCH for-5.0 v2 02/23] blockdev: Allow resizing everywhere

On 06.12.19 15:04, Alberto Garcia wrote: > On Mon 11 Nov 2019 05:01:55 PM CET, Max Reitz wrote: >> @@ -3177,11 +3177,6 @@ void qmp_block_resize(bool has_device, const char >> *device, >> aio_context = bdrv_get_aio_context(bs); >> aio_context_acquire(aio_context); >> >> -if (!bdrv_i

Re: [for-5.0 PATCH] ppc: Make PPCVirtualHypervisor an incomplete type

On 12/9/19 2:28 PM, Greg Kurz wrote: PPCVirtualHypervisor is an interface instance. It should never be dereferenced. Drop the dummy type definition for extra safety, which is the common practice with QOM interfaces. This "common practice" is also referenced in commit 00ed3da9b5: xics: Mino

Re: [RESEND PATCH v21 5/6] target-arm: kvm64: handle SIGBUS signal from kernel or KVM

On 2019/12/9 21:05, Beata Michalska wrote: >> Here we set the FnV to not valid, not to set it to valid. >> because Guest will use the physical address that recorded in APEI table. >> > To be precise : the FnV is giving the status of FAR - so what you are setting > here is status of 0b0 which me

Re: [PATCH 1/5] arm64: zynqmp: Add firmware DT node

On 12/8/19 11:48 PM, Edgar E. Iglesias wrote: On Sun, Dec 08, 2019 at 11:19:33PM -0800, Guenter Roeck wrote: On 12/8/19 10:42 PM, Michal Simek wrote: Hi, +Edgar On 08. 12. 19 23:38, Guenter Roeck wrote: On Fri, Oct 18, 2019 at 06:07:31PM +0200, Michael Tretter wrote: From: Rajan Vaja Add

[PATCH] target/arm: ensure we use current exception state after SCR update

A write to the SCR can change the effective EL by droppping the system from secure to non-secure mode. However if we use a cached current_el from before the change we'll rebuild the flags incorrectly. To fix this we overload the ARM_CP_CURRENTEL flag for the register and ensure the new EL is used w

Re: [PATCH v6 04/21] qtest: add qtest_server_send abstraction

On 29/11/2019 22.34, Oleinik, Alexander wrote: > qtest_server_send is a function pointer specifying the handler used to > transmit data to the qtest client. In the standard configuration, this > calls the CharBackend handler, but now it is possible for other types of > handlers, e.g direct-function

Re: [PATCH] virtio-fs: fix MSI-X nvectors calculation

* Stefan Hajnoczi (stefa...@redhat.com) wrote: > The following MSI-X vectors are required: > * VIRTIO Configuration Change > * hiprio virtqueue > * requests virtqueues > > Fix the calculation to reserve enough MSI-X vectors. Otherwise guest > drivers fall back to a sub-optional configuration w

Re: [PATCH 1/2] tests/acceptance: Add PVH boot test

On 12/6/19 2:54 PM, Cleber Rosa wrote: On Fri, Dec 06, 2019 at 09:00:11AM -0500, Wainer dos Santos Moschetta wrote: QEMU 4.0 onward is able to boot an uncompressed kernel image by using the x86/HVM direct boot ABI. It needs Linux >= 4.21 built with CONFIG_PVH=y. This introduces an acceptance

Re: [PATCH] target/arm: ensure we use current exception state after SCR update

On 12/9/19 3:37 PM, Alex Bennée wrote: A write to the SCR can change the effective EL by droppping the system from secure to non-secure mode. However if we use a cached current_el from before the change we'll rebuild the flags incorrectly. To fix this we overload the ARM_CP_CURRENTEL flag for the

Re: [PATCH for-5.0 v2 15/23] mirror: Prevent loops

On 02.12.19 13:12, Vladimir Sementsov-Ogievskiy wrote: > 11.11.2019 19:02, Max Reitz wrote: >> While bdrv_replace_node() will not follow through with it, a specific >> @replaces asks the mirror job to create a loop. >> >> For example, say both the source and the target share a child where the >> so

[PATCH] virtfs: Remove the deprecated "-virtfs_synth" option

It's been marked as deprecated since QEMU v4.1, time to remove it now. Signed-off-by: Thomas Huth --- qemu-deprecated.texi | 5 - qemu-options.hx | 10 -- vl.c | 23 --- 3 files changed, 38 deletions(-) diff --git a/qemu-deprecated.texi b/qe

[PATCH v2 02/18] vl: move icount configuration earlier

Once qemu_tcg_configure is turned into a QOM property setter, it will not be able to set a default value for mttcg_enabled. Setting the default will move to the TCG instance_init function, which currently runs before "-icount" is processed. However, it is harmless to do configure_icount for all a

[PATCH v2 09/18] vl: warn for unavailable accelerators, clarify messages

So far, specifying an accelerator that was not compiled in did not result in an error; fix that. While at it, clarify the mysterious "Back to TCG" message. Reviewed-by: Marc-André Lureau Signed-off-by: Paolo Bonzini --- vl.c | 7 ++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --g

[PATCH v2 01/18] memory: do not look at current_machine->accel

"info mtree -f" prints the wrong accelerator name if used with for example "-machine accel=kvm:tcg". The right thing to do is to fetch the name from the AccelClass, which will also work nicely once current_machine->accel stops existing. Tested-by: Thomas Huth Reviewed-by: Marc-André Lureau Sign

[PATCH v2 05/18] vl: merge -accel processing into configure_accelerators

The next step is to move the parsing of "-machine accel=..." into vl.c, unifying it with the configure_accelerators() function that has just been introduced. This way, we will be able to desugar it into multiple "-accel" options, without polluting accel/accel.c. The CONFIG_TCG and CONFIG_KVM symb

[PATCH v2 00/18] Complete the implementation of -accel

This series completes the implementation of -accel: - Alternative accelerators can be specified with multiple -accel options, and each -accel option will configure the respective accelerator. This is implemented in patches 1 to 6, with a small addendum in patch 7. - Accelerators can now suppo

[PATCH v2 04/18] vl: extract accelerator option processing to a separate function

As a first step towards supporting multiple "-accel" options, push the late processing of -icount and -accel into a new function, and use qemu_opts_foreach to retrieve -accel options instead of stashing them into globals. Signed-off-by: Paolo Bonzini --- vl.c | 28 1

[PATCH v2 03/18] tcg: move qemu_tcg_configure to accel/tcg/tcg-all.c

Move everything related to mttcg_enabled in accel/tcg/tcg-all.c, which will make even more sense when "thread" becomes a QOM property. For now, initializing mttcg_enabled in the instance_init function prepares for the next patch, which will only invoke qemu_tcg_configure when the command line incl

[PATCH v2 11/18] qom: add object_new_with_class

Similar to CPU and machine classes, "-accel" class names are mangled, so we have to first get a class via accel_find and then instantiate it. Provide a new function to instantiate a class without going through object_class_get_name, and use it for CPUs and machines already. Reviewed-by: Marc-André

[PATCH v2 06/18] accel: compile accel/accel.c just once

Now that accel/accel.c does not use CONFIG_TCG or CONFIG_KVM anymore, it need not be compiled once for every softmmu target. Signed-off-by: Paolo Bonzini --- Makefile.objs | 1 + accel/Makefile.objs | 2 +- 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/Makefile.objs b/Makef

[PATCH v2 08/18] vl: configure accelerators from -accel options

Drop the "accel" property from MachineState, and instead desugar "-machine accel=" to a list of "-accel" options. This has a semantic change due to removing merge_lists from -accel. For example: - "-accel kvm -accel tcg" all but ignored "-accel kvm". This is a bugfix. - "-accel kvm -accel threa

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