Re: [Qemu-devel] [PATCH v2 00/17] Translation loop conversion for sh4/sparc/mips/s390x/openrisc/riscv targets
On 04/10/2018 11:45 PM, Bastian Koppelmann wrote: > On 04/10/2018 03:40 PM, Emilio G. Cota wrote: >> On Tue, Apr 10, 2018 at 15:16:19 +0200, Bastian Koppelmann wrote: >>> On 04/10/2018 03:03 PM, Emilio G. Cota wrote: On Tue, Apr 10, 2018 at 14:24:23 +1000, Richard Henderson wrote: > On 04/10/2018 02:11 AM, Emilio G. Cota wrote: >> On Mon, Apr 09, 2018 at 16:01:36 +0200, Bastian Koppelmann wrote: >>> Thanks for doing this grunt work. Me and a colleague were planning to do >>> this as well after converting the RISC-V frontend to decodetree. Do you >>> have any plans to do this for the TriCore frontend as well? I have the >>> same plan for Tricore: Convert it to decodetree, then to translation >>> loop. >> >> I won't do any further conversions in the near future, so please go >> ahead with your plans :-) > > In which case I won't review Emilio's final two patches for risc-v. >>> >>> I'm confused as well :). I don't understand why Richard is not reviewing >>> the last two patch. Maybe you can clarify as well, Richard. >> >> I think he understood you already had patches (not yet on-list) to do the >> trloop conversion for riscv, and therefore my patches should be discarded. > > No, I don't have patches. Ah, right. Misunderstanding on my part. I'll get back to the risc-v patches soon. >> Note that the first patch in this series does change the TranslatorOps >> interface, that's why I think the whole series should go >> through the same tree (Richard's TCG tree, I presume). > > Works for me. That's fine with me too. r~
Re: [Qemu-devel] [PATCH v2 00/17] Translation loop conversion for sh4/sparc/mips/s390x/openrisc/riscv targets
On 04/10/2018 03:40 PM, Emilio G. Cota wrote: > On Tue, Apr 10, 2018 at 15:16:19 +0200, Bastian Koppelmann wrote: >> On 04/10/2018 03:03 PM, Emilio G. Cota wrote: >>> On Tue, Apr 10, 2018 at 14:24:23 +1000, Richard Henderson wrote: On 04/10/2018 02:11 AM, Emilio G. Cota wrote: > On Mon, Apr 09, 2018 at 16:01:36 +0200, Bastian Koppelmann wrote: >> Thanks for doing this grunt work. Me and a colleague were planning to do >> this as well after converting the RISC-V frontend to decodetree. Do you >> have any plans to do this for the TriCore frontend as well? I have the >> same plan for Tricore: Convert it to decodetree, then to translation >> loop. > > I won't do any further conversions in the near future, so please go > ahead with your plans :-) In which case I won't review Emilio's final two patches for risc-v. >> >> I'm confused as well :). I don't understand why Richard is not reviewing >> the last two patch. Maybe you can clarify as well, Richard. > > I think he understood you already had patches (not yet on-list) to do the > trloop conversion for riscv, and therefore my patches should be discarded. No, I don't have patches. > [...] > > Note that the first patch in this series does change the TranslatorOps > interface, that's why I think the whole series should go > through the same tree (Richard's TCG tree, I presume). Works for me. Cheers, Bastian
Re: [Qemu-devel] [PATCH v2 00/17] Translation loop conversion for sh4/sparc/mips/s390x/openrisc/riscv targets
On Tue, Apr 10, 2018 at 15:16:19 +0200, Bastian Koppelmann wrote: > On 04/10/2018 03:03 PM, Emilio G. Cota wrote: > > On Tue, Apr 10, 2018 at 14:24:23 +1000, Richard Henderson wrote: > >> On 04/10/2018 02:11 AM, Emilio G. Cota wrote: > >>> On Mon, Apr 09, 2018 at 16:01:36 +0200, Bastian Koppelmann wrote: > Thanks for doing this grunt work. Me and a colleague were planning to do > this as well after converting the RISC-V frontend to decodetree. Do you > have any plans to do this for the TriCore frontend as well? I have the > same plan for Tricore: Convert it to decodetree, then to translation > loop. > >>> > >>> I won't do any further conversions in the near future, so please go > >>> ahead with your plans :-) > >> > >> In which case I won't review Emilio's final two patches for risc-v. > > I'm confused as well :). I don't understand why Richard is not reviewing > the last two patch. Maybe you can clarify as well, Richard. I think he understood you already had patches (not yet on-list) to do the trloop conversion for riscv, and therefore my patches should be discarded. > > I might be mistaken but my impression is that Bastian would be happy taking > > these risc-v patches (w/ a minor correction, already noted) since he > > has not yet started the TranslatorOps conversion he planned. > > > > Bastian, can you please clarify? > > Sure, I can take the three RISC-V patches into my tree and send a pull > as soon as the next development cycle start. Note that the first patch in this series does change the TranslatorOps interface, that's why I think the whole series should go through the same tree (Richard's TCG tree, I presume). Thanks, E.
Re: [Qemu-devel] [PATCH v2 00/17] Translation loop conversion for sh4/sparc/mips/s390x/openrisc/riscv targets
On 04/10/2018 03:03 PM, Emilio G. Cota wrote: > On Tue, Apr 10, 2018 at 14:24:23 +1000, Richard Henderson wrote: >> On 04/10/2018 02:11 AM, Emilio G. Cota wrote: >>> On Mon, Apr 09, 2018 at 16:01:36 +0200, Bastian Koppelmann wrote: Thanks for doing this grunt work. Me and a colleague were planning to do this as well after converting the RISC-V frontend to decodetree. Do you have any plans to do this for the TriCore frontend as well? I have the same plan for Tricore: Convert it to decodetree, then to translation loop. >>> >>> I won't do any further conversions in the near future, so please go >>> ahead with your plans :-) >> >> In which case I won't review Emilio's final two patches for risc-v. I'm confused as well :). I don't understand why Richard is not reviewing the last two patch. Maybe you can clarify as well, Richard. > > I might be mistaken but my impression is that Bastian would be happy taking > these risc-v patches (w/ a minor correction, already noted) since he > has not yet started the TranslatorOps conversion he planned. > > Bastian, can you please clarify? Sure, I can take the three RISC-V patches into my tree and send a pull as soon as the next development cycle start. Cheers, Bastian
Re: [Qemu-devel] [PATCH v2 00/17] Translation loop conversion for sh4/sparc/mips/s390x/openrisc/riscv targets
On Tue, Apr 10, 2018 at 14:24:23 +1000, Richard Henderson wrote: > On 04/10/2018 02:11 AM, Emilio G. Cota wrote: > > On Mon, Apr 09, 2018 at 16:01:36 +0200, Bastian Koppelmann wrote: > >> Thanks for doing this grunt work. Me and a colleague were planning to do > >> this as well after converting the RISC-V frontend to decodetree. Do you > >> have any plans to do this for the TriCore frontend as well? I have the > >> same plan for Tricore: Convert it to decodetree, then to translation loop. > > > > I won't do any further conversions in the near future, so please go > > ahead with your plans :-) > > In which case I won't review Emilio's final two patches for risc-v. I might be mistaken but my impression is that Bastian would be happy taking these risc-v patches (w/ a minor correction, already noted) since he has not yet started the TranslatorOps conversion he planned. Bastian, can you please clarify? Thanks, E.
Re: [Qemu-devel] [PATCH v2 00/17] Translation loop conversion for sh4/sparc/mips/s390x/openrisc/riscv targets
On 04/10/2018 02:11 AM, Emilio G. Cota wrote: > On Mon, Apr 09, 2018 at 16:01:36 +0200, Bastian Koppelmann wrote: >> Thanks for doing this grunt work. Me and a colleague were planning to do >> this as well after converting the RISC-V frontend to decodetree. Do you >> have any plans to do this for the TriCore frontend as well? I have the >> same plan for Tricore: Convert it to decodetree, then to translation loop. > > I won't do any further conversions in the near future, so please go > ahead with your plans :-) In which case I won't review Emilio's final two patches for risc-v. r~
Re: [Qemu-devel] [PATCH v2 00/17] Translation loop conversion for sh4/sparc/mips/s390x/openrisc/riscv targets
On Mon, Apr 09, 2018 at 16:01:36 +0200, Bastian Koppelmann wrote: > Thanks for doing this grunt work. Me and a colleague were planning to do > this as well after converting the RISC-V frontend to decodetree. Do you > have any plans to do this for the TriCore frontend as well? I have the > same plan for Tricore: Convert it to decodetree, then to translation loop. I won't do any further conversions in the near future, so please go ahead with your plans :-) Thanks, Emilio
Re: [Qemu-devel] [PATCH v2 00/17] Translation loop conversion for sh4/sparc/mips/s390x/openrisc/riscv targets
Hi Emilio, On 04/06/2018 08:19 PM, Emilio G. Cota wrote: > v1: https://lists.gnu.org/archive/html/qemu-devel/2018-03/msg00445.html > > Changes since v1: > > - Rebase onto master > > - Add R-b's > > - Add riscv conversion Thanks for doing this grunt work. Me and a colleague were planning to do this as well after converting the RISC-V frontend to decodetree. Do you have any plans to do this for the TriCore frontend as well? I have the same plan for Tricore: Convert it to decodetree, then to translation loop. Cheers, Bastian
Re: [Qemu-devel] [PATCH v2 00/17] Translation loop conversion for sh4/sparc/mips/s390x/openrisc/riscv targets
Hi, This series seems to have some coding style problems. See output below for more information: Type: series Message-id: 1523038800-2494-1-git-send-email-c...@braap.org Subject: [Qemu-devel] [PATCH v2 00/17] Translation loop conversion for sh4/sparc/mips/s390x/openrisc/riscv targets === TEST SCRIPT BEGIN === #!/bin/bash BASE=base n=1 total=$(git log --oneline $BASE.. | wc -l) failed=0 git config --local diff.renamelimit 0 git config --local diff.renames True git config --local diff.algorithm histogram commits="$(git log --format=%H --reverse $BASE..)" for c in $commits; do echo "Checking PATCH $n/$total: $(git log -n 1 --format=%s $c)..." if ! git show $c --format=email | ./scripts/checkpatch.pl --mailback -; then failed=1 echo fi n=$((n+1)) done exit $failed === TEST SCRIPT END === Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384 From https://github.com/patchew-project/qemu d7fa7fb504..08e173f294 master -> master * [new tag] patchew/1523038800-2494-1-git-send-email-c...@braap.org -> patchew/1523038800-2494-1-git-send-email-c...@braap.org Switched to a new branch 'test' 3bf0c1c6d4 target/riscv: convert to TranslatorOps 8c8cf713ea target/riscv: convert to DisasContextBase cda65dc923 target/riscv: convert to DisasJumpType b959e20396 target/openrisc: convert to TranslatorOps 8a1f5ad2cd target/openrisc: convert to DisasContextBase f6ef3b753a target/s390x: convert to TranslatorOps 8dad6fc829 target/s390x: convert to DisasContextBase afc9aac550 target/s390x: convert to DisasJumpType f588ffbd0c target/mips: convert to TranslatorOps b8797aa5c2 target/mips: use *ctx for DisasContext bf4f835373 target/mips: convert to DisasContextBase a422870894 target/mips: convert to DisasJumpType fdc97e620f target/sparc: convert to TranslatorOps 880c214bd0 target/sparc: convert to DisasContextBase feec87def1 target/sparc: convert to DisasJumpType 5d0217ee29 target/sh4: convert to TranslatorOps c1fffdaba5 translator: merge max_insns into DisasContextBase === OUTPUT BEGIN === Checking PATCH 1/17: translator: merge max_insns into DisasContextBase... Checking PATCH 2/17: target/sh4: convert to TranslatorOps... Checking PATCH 3/17: target/sparc: convert to DisasJumpType... Checking PATCH 4/17: target/sparc: convert to DisasContextBase... Checking PATCH 5/17: target/sparc: convert to TranslatorOps... Checking PATCH 6/17: target/mips: convert to DisasJumpType... Checking PATCH 7/17: target/mips: convert to DisasContextBase... Checking PATCH 8/17: target/mips: use *ctx for DisasContext... ERROR: space prohibited after that '&' (ctx:WxW) #81: FILE: target/mips/translate.c:20220: +ctx->kscrexist = (env->CP0_Config4 >> CP0C4_KScrExist) & 0xff; ^ total: 1 errors, 0 warnings, 254 lines checked Your patch has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. Checking PATCH 9/17: target/mips: convert to TranslatorOps... Checking PATCH 10/17: target/s390x: convert to DisasJumpType... ERROR: braces {} are necessary for all arms of this statement #3464: FILE: target/s390x/translate.c:6225: +} while (status == DISAS_NEXT); [...] total: 1 errors, 0 warnings, 3340 lines checked Your patch has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. Checking PATCH 11/17: target/s390x: convert to DisasContextBase... Checking PATCH 12/17: target/s390x: convert to TranslatorOps... Checking PATCH 13/17: target/openrisc: convert to DisasContextBase... ERROR: braces {} are necessary for all arms of this statement #223: FILE: target/openrisc/translate.c:1605: +} while (!dc->base.is_jmp [...] total: 1 errors, 0 warnings, 246 lines checked Your patch has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. Checking PATCH 14/17: target/openrisc: convert to TranslatorOps... Checking PATCH 15/17: target/riscv: convert to DisasJumpType... Checking PATCH 16/17: target/riscv: convert to DisasContextBase... Checking PATCH 17/17: target/riscv: convert to TranslatorOps... === OUTPUT END === Test command exited with code: 1 --- Email generated automatically by Patchew [http://patchew.org/]. Please send your feedback to patchew-de...@redhat.com