Copy some RAM from the latched address
With what? The second CPU or dedicated DMA?
The second CPU
Edwin Blink
[EMAIL PROTECTED]
http://www.designing.myweb.nl/samcoupe/
Dnia 00-08-03 Edwin Blink pisze:
That can be done by making /BUSREQ low and let your hardware
wait for /BUSACK
You mean always or while NMI activation?
Latch interrupt status using /M1=0 AND /MREQ=0 AND
databus=x011 X=1 for EI or 0 for DI.
What for? This can be read with LD A,I and fail
Dnia 00-08-02 Andrew Gale pisze:
The easiest way to avoid this problem is to latch the NMI
request from the button and then wait for the CPU to take opcode
(/M1=0) dealing with the stack.
That's a very neat idea
And perhaps simplest to do. The possible delay have no meaning,
as nobody is
That had been my thinking - disable the SAM's z80 and hang a
different z80 off the back... then I could trap and memory
writes before they reach the ASIC.
That can be done by making /BUSREQ low and let your hardware wait for
/BUSACK
Use pullup resistors with the control lines
The easiest way to avoid this problem is to latch the NMI
request from the button and then wait for the CPU to take opcode
(/M1=0) dealing with the stack. The best are #C9 (RET) and
%11xxx000 (conditional RET), assuming the code uses RETs at all.
That's a very neat idea
[...] SAM
Dnia 00-07-27 Andrew Gale pisze:
My question is about the PC that gets written to the stack by
the z80 - clearly this is going to get written to RAM, exactly
where being determined by SP. This is fine assuming the program
being interrupted is using the SP sensibly - i.e. to implement
a stack
On Thu, Jul 27, 2000 at 09:44:28PM +0100, Simon Owen wrote:
Andrew Gale wrote:
but what if it is playing silly buggers with the SP and
some important section of memory gets overwritten? Is this
just very unusual and tough luck when it happens?
For the original Spectrum versions it was
I've got a quick question regarding the speccy multiface - I'm
trying to come up with a paper design for the SAM. I am assuming
that a multiface works by causing an NMI and then swapping its
own ROM/RAM in place of the speccy ROM when the interrupt service
routine gets entered (and hence the
Andrew Gale wrote:
but what if it is playing silly buggers with the SP and
some important section of memory gets overwritten? Is this
just very unusual and tough luck when it happens?
For the original Spectrum versions it was just tough luck. I frequently
remember the pushed values being
Hi,
to aid me in my continuing attempts to write some code that does
something interesting, please feel free to answer the following
questions :
- is LDIR the fastest way to draw sprites to random positions
on the
screen (random in the same way as random access memory is
to aid me in my continuing attempts to write some code that does
something interesting, please feel free to answer the following
questions :
- is LDIR the fastest way to draw sprites to random
positions on the
screen (random in the same way as random access memory is anyway)
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