[SeaBIOS] Re: [PATCH v2 0/2] esp-scsi: fix reliance on QEMU ESP SCSI implementation bugs

2023-08-03 Thread Paolo Bonzini
-scsi: check for INTR_BS/INTR_FC instead of STAT_TC for command completion src/hw/esp-scsi.c | 38 +- 1 file changed, 25 insertions(+), 13 deletions(-) Reviewed-by: Paolo Bonzini ___ SeaBIOS mailing list

[SeaBIOS] Re: [Qemu-devel] Regression with floppy drive controller

2019-08-21 Thread Paolo Bonzini
On 21/08/19 08:42, Gerd Hoffmann wrote: >> So we should use '-cpu Conroe' or '-cpu core2duo' minimum? > -cpu Conroe for -M isapc is kida silly though ... > > Maybe we should simply build seabios with CONFIG_TSC_TIMER=n ? > > Using the TSC in a virtual machine is problematic anyway, the >

[SeaBIOS] CFP: KVM Forum 2019

2019-04-06 Thread Paolo Bonzini
KVM Forum 2019: Call For Participation October 30-November 1, 2019 - Lyon Convention Center - Lyon, France (All submissions must be received before June 15, 2019 at 23:59 PST)

[SeaBIOS] Download URLs changed

2018-08-02 Thread Paolo Bonzini
Hi, it looks like at some point the download URLs for SeaBIOS changed from https://code.coreboot.org/p/seabios/downloads/get/seabios-X.Y.Z.tar.gz to https://code.coreboot.org/p/seabios/downloads/seabios-X.Y.Z.tar.gz. Would it be possible to add a redirect or symlink from the old files, so as not

Re: [SeaBIOS] 1TB Guest changes to receive phys bits >=40

2018-06-11 Thread Paolo Bonzini
On 11/06/2018 15:21, Christian Ehrhardt wrote: > Hi, > I was asked about x86 Guests of >1TB in size. And while some discussions > where around qemu/libvirt and host-phys-bits [1] I realized that in > Seabios I need exactly what is already in CentOS/RHEL [2] to get the > phys-bits passed on. > >

[SeaBIOS] KVM Forum 2018: Call For Participation

2018-05-17 Thread Paolo Bonzini
KVM Forum 2018: Call For Participation October 24-26, 2018 - Edinburgh International Conference Centre - Edinburgh, UK (All submissions must be received before midnight June 14, 2018)

Re: [SeaBIOS] [PATCH] Ignore sgabios rom in case sercon is enabled.

2017-11-04 Thread Paolo Bonzini
On 04/11/2017 11:09, Peter Stuge wrote: >> +if (strcmp(file->name, "vgaroms/sgabios.bin") == 0 && >> +CONFIG_SERCON && romfile_loadint("etc/sercon-port", 0)) { >> +dprintf(1, "sercon: is enabled, not loading sgabios rom.\n"); >> +continue; >> +}

Re: [SeaBIOS] [Qemu-devel] seabios serial console vs. sgabios

2017-11-02 Thread Paolo Bonzini
On 02/11/2017 17:11, Daniel P. Berrange wrote: > Historically libvirt will always use '-device sgabios' if the user has > requested . So if that -device arg is given, I > think QEMU must honour it, which implies QEMU must disable Seabios' > own built-in serial console impl in that scenario. We

Re: [SeaBIOS] [PATCH 3/4] block: Rename disk_op_s->drive_gf to drive_fl

2017-09-27 Thread Paolo Bonzini
On 11/07/2017 18:50, Kevin O'Connor wrote: > Now that the drive_s struct does not need to be in the f-segment, > rename references to drive_gf in the generic drive code to drive_fl. > > This is just variable renames - no code changes. > > Signed-off-by: Kevin O'Connor There

Re: [SeaBIOS] [PATCH 3/4] block: Rename disk_op_s->drive_gf to drive_fl

2017-09-27 Thread Paolo Bonzini
On 27/09/2017 16:56, Paolo Bonzini wrote: > On 11/07/2017 18:50, Kevin O'Connor wrote: >> Now that the drive_s struct does not need to be in the f-segment, >> rename references to drive_gf in the generic drive code to drive_fl. >> >> This is just variable renames - no

Re: [SeaBIOS] [PATCH 0/4] Avoid using f-segment memory for virtio

2017-09-27 Thread Paolo Bonzini
approach > has the benefit of avoiding a "big bang" patch series. > > Comments welcome. Tested-by: Paolo Bonzini <pbonz...@redhat.com> Thank you very much for the fix! It would be nice to have it in 1.11. Paolo > -Kevin > > > Kevin O'Connor (4): >

Re: [SeaBIOS] [PATCH 1/2] scsi: ensure LUN0 is added first

2017-09-27 Thread Paolo Bonzini
On 27/09/2017 16:35, Kevin O'Connor wrote: > On Wed, Sep 27, 2017 at 04:15:49PM +0200, Paolo Bonzini wrote: >> On 27/09/2017 15:58, Kevin O'Connor wrote: >>> On Wed, Sep 27, 2017 at 09:36:01AM +0200, Paolo Bonzini wrote: >>>> On 21/06/2017 00:44, Kevin O'Connor wrote

Re: [SeaBIOS] [PATCH 1/2] scsi: ensure LUN0 is added first

2017-09-27 Thread Paolo Bonzini
On 27/09/2017 15:58, Kevin O'Connor wrote: > On Wed, Sep 27, 2017 at 09:36:01AM +0200, Paolo Bonzini wrote: >> On 21/06/2017 00:44, Kevin O'Connor wrote: >>>> Yes, I think so. I'm not sure why virtqueues are allocated >>>> in low memory. Either cargo culting

Re: [SeaBIOS] [PATCH 1/2] scsi: ensure LUN0 is added first

2017-09-27 Thread Paolo Bonzini
On 21/06/2017 00:44, Kevin O'Connor wrote: >> Yes, I think so. I'm not sure why virtqueues are allocated >> in low memory. Either cargo culting, or a remain of when >> virtio was a 16-bit driver, if it ever was. > The 'struct drive_s' storage currently must be allocated in the > f-segment so

Re: [SeaBIOS] [Qemu-devel] Commit 77af8a2b95b79699de650965d5228772743efe84 breaks Windows 2000 support

2017-07-27 Thread Paolo Bonzini
On 27/07/2017 10:39, Gerd Hoffmann wrote: >>> C - We'd be introducing "shared ownership" of the acpi >>> tables. Some >>> of the tables would be produced by QEMU and some of them by >>> SeaBIOS. Explaining when and why to future developers would be >>> a >>> challenge. >> >> The

Re: [SeaBIOS] [qemu PATCH for 2.10] i386: acpi: provide an XSDT instead of an RSDT

2017-07-26 Thread Paolo Bonzini
> The point is that for PC we really should not keep piling up hacks, > compatibility is more important. Non-explosion of the test matrix is just as important. > > Doing it for PC only would mean switching > > back from FADT rev3 to rev1, which is worse for guest OS support, > > It's only OSX

Re: [SeaBIOS] [Qemu-devel] Commit 77af8a2b95b79699de650965d5228772743efe84 breaks Windows 2000 support

2017-07-26 Thread Paolo Bonzini
> > (4) would be acceptable I guess. However I think it's a bit worse > > because fw-cfg files are a somewhat scarce resource. The "legacy" > > aspect is something that SeaBIOS is in the best position to address, > > because it knows what OSes are running on it; QEMU instead only takes > > care

Re: [SeaBIOS] [qemu PATCH for 2.10] i386: acpi: provide an XSDT instead of an RSDT

2017-07-26 Thread Paolo Bonzini
On 26/07/2017 14:52, Michael S. Tsirkin wrote: > On Wed, Jul 26, 2017 at 11:31:36AM +0200, Paolo Bonzini wrote: >> The tables that QEMU provides are not ACPI 1.0 compatible since commit >> 77af8a2b95 ("hw/i386: Use Rev3 FADT (ACPI 2.0) instead of Rev1 to improve >> gues

Re: [SeaBIOS] [Qemu-devel] Commit 77af8a2b95b79699de650965d5228772743efe84 breaks Windows 2000 support

2017-07-26 Thread Paolo Bonzini
On 26/07/2017 13:42, Laszlo Ersek wrote: > Not exactly; the PCD controls whether the EFI_ACPI_TABLE_PROTOCOL will > expose an RSDT, an XSDT, or both (with matching contents). You're right that the code does not produce a v1 FADT, I mis-skimmed the awful code of AcpiTableDxe. Though the

[SeaBIOS] [seabios PATCH 2/2] seabios: create rev1 FADT in compatibility RSDT

2017-07-26 Thread Paolo Bonzini
This patch completes the job, presenting a rev1 FADT inside the compatibility RSDT, so that ACPI 1.0 operating systems such as Windows 2000 are not broken. Signed-off-by: Paolo Bonzini <pbonz...@redhat.com> --- src/fw/paravirt.c | 19 +++ 1 file changed, 19 insertions(+)

[SeaBIOS] [seabios PATCH for qemu 2.10 0/2] seabios: build ACPI 1.0-compatible ACPI tables

2017-07-26 Thread Paolo Bonzini
Old operating systems would like to have a rev1 (ACPI 1.0) FADT, but new operating systems would like to have rev3 (ACPI 2.0). Since old operating systems do not know about XSDTs, the solution is to point the RSDT to a v1 FADT and the XSDT to a rev3 FADT. Paolo Bonzini (2): seabios: build RSDT

[SeaBIOS] [seabios PATCH 1/2] seabios: build RSDT from XSDT

2017-07-26 Thread Paolo Bonzini
and rev1 FADT to satisfy ACPI 1.0-compliant operating systems. This part makes SeaBIOS build an RSDT out of an existing XSDT, patching the RSDP to point to the RSDT. Reviewed-by: Phil Dennis-Jordan <p...@philjordan.eu> Signed-off-by: Paolo Bonzini <pbonz...@redhat.com> --- src/fw/par

[SeaBIOS] [qemu PATCH for 2.10] i386: acpi: provide an XSDT instead of an RSDT

2017-07-26 Thread Paolo Bonzini
ld an RSDT that points to the compatibility FADT. When running Windows 2000 with an old BIOS, Windows would simply fall back to a non-ACPI HAL; however, the plan should be to include a BIOS with the new feature in 2.10. Reported-by: Programmingkid <programmingk...@gmail.com> Signed-off-by: Paol

Re: [SeaBIOS] [Qemu-devel] Commit 77af8a2b95b79699de650965d5228772743efe84 breaks Windows 2000 support

2017-07-26 Thread Paolo Bonzini
promoting the SeaBIOS code from "hack" to "right thing to do". Though then I cannot brag about Kevin's nice words, too bad. :) Paolo > On Tue, Jul 25, 2017 at 7:10 PM, Paolo Bonzini <pbonz...@redhat.com> wrote: >> On 25/07/2017 18:23, Paolo Bonzini wrote: >>&

Re: [SeaBIOS] [Qemu-devel] Commit 77af8a2b95b79699de650965d5228772743efe84 breaks Windows 2000 support

2017-07-26 Thread Paolo Bonzini
On 26/07/2017 00:01, Kevin O'Connor wrote: > On Tue, Jul 25, 2017 at 07:10:21PM +0200, Paolo Bonzini wrote: >> On 25/07/2017 18:23, Paolo Bonzini wrote: >>> On 25/07/2017 18:14, Laszlo Ersek wrote: >>>> "No regressions became apparent in tests wit

Re: [SeaBIOS] [Qemu-devel] Commit 77af8a2b95b79699de650965d5228772743efe84 breaks Windows 2000 support

2017-07-25 Thread Paolo Bonzini
On 25/07/2017 18:23, Paolo Bonzini wrote: > On 25/07/2017 18:14, Laszlo Ersek wrote: >> "No regressions became apparent in tests with a range of Windows >>(XP-10)" >> >> In theory, w2k falls within that range. > > Nope, Windows 2000 is like NT 5.0,

Re: [SeaBIOS] [PATCH 1/2] scsi: ensure LUN0 is added first

2017-07-07 Thread Paolo Bonzini
On 21/06/2017 00:44, Kevin O'Connor wrote: > On Tue, Jun 20, 2017 at 04:05:32PM -0400, Paolo Bonzini wrote: >>> If virtio-scsi didn't need to allocate any space in the f-segment, >>> does this problem go away in practice? >> >> Yes, I think so. I'm not

Re: [SeaBIOS] [PATCH 1/2] scsi: ensure LUN0 is added first

2017-06-20 Thread Paolo Bonzini
> Alas, none of these options seem appealing to me. > > If virtio-scsi didn't need to allocate any space in the f-segment, > does this problem go away in practice? Yes, I think so. I'm not sure why virtqueues are allocated in low memory. Either cargo culting, or a remain of when virtio was a

Re: [SeaBIOS] [PATCH 1/2] scsi: ensure LUN0 is added first

2017-06-20 Thread Paolo Bonzini
On 20/06/2017 15:59, Roman Kagan wrote: > On Tue, Jun 20, 2017 at 02:42:15PM +0200, Paolo Bonzini wrote: > But does the LUN processing order matter per se? Doesn't fixing it only > change which LUNs are more likely to fall out? For a long time, only LUN0 was booted from (or in fact

Re: [SeaBIOS] [PATCH 1/2] scsi: ensure LUN0 is added first

2017-06-20 Thread Paolo Bonzini
On 19/06/2017 23:55, Roman Kagan wrote: > On Mon, Jun 19, 2017 at 06:21:09PM +0200, Paolo Bonzini wrote: >> The introduction of REPORT LUNS caused a potential regression when >> many disks are present on the same SCSI target. If LUN0 is processed >> too late, SeaBIOS mi

[SeaBIOS] [PATCH 1/2] scsi: ensure LUN0 is added first

2017-06-19 Thread Paolo Bonzini
cond phase. When multiple SCSI controllers are found, it's still possible to have a regression because they are scanned in parallel. Signed-off-by: Paolo Bonzini <pbonz...@redhat.com> --- src/hw/blockcmd.c| 4 ++-- src/hw/esp-scsi.c| 10 -- src/hw/lsi-scsi.c| 10 ++

[SeaBIOS] [PATCH 0/2] scsi: fixes and improvements to bus scan

2017-06-19 Thread Paolo Bonzini
and therefore was slowed down the most. Paolo Bonzini (2): scsi: ensure LUN0 is added first virtio-scsi: speed up SCSI bus scan src/hw/blockcmd.c| 6 -- src/hw/esp-scsi.c| 10 -- src/hw/lsi-scsi.c| 10 -- src/hw/mpt-scsi.c| 10 -- src/hw/usb-uas.c

[SeaBIOS] [PATCH 2/2] virtio-scsi: speed up SCSI bus scan

2017-06-19 Thread Paolo Bonzini
ore, the LUN0 scan can be used to prepare a compact bitmap of targets that we have to scan, and omit sending REPORT LUNS to the others. Signed-off-by: Paolo Bonzini <pbonz...@redhat.com> --- src/hw/blockcmd.c| 2 ++ src/hw/virtio-scsi.c | 45 +++--

Re: [SeaBIOS] allocation zone extensions for the firmware linker/loader

2017-06-12 Thread Paolo Bonzini
On 08/06/2017 19:44, Michael S. Tsirkin wrote: > On Tue, Jun 06, 2017 at 08:10:17PM +0200, Laszlo Ersek wrote: >> On 06/05/17 18:02, Michael S. Tsirkin wrote: >>> On Sat, Jun 03, 2017 at 09:36:23AM +0200, Laszlo Ersek wrote: On 06/02/17 17:45, Laszlo Ersek wrote: > The patches can

[SeaBIOS] Reminder: CFP: KVM Forum 2017

2017-06-08 Thread Paolo Bonzini
Just a quick reminder that the CFP is going to close in a week. Paolo On 02/05/2017 12:42, Paolo Bonzini wrote: > > KVM Forum 2017: Call For Participation > October 25-27, 2017 - Hilton Prague - Prague, Czech Republic

Re: [SeaBIOS] [PATCH 4/4] stacks: There is no need to disable NMI if it is already disabled

2017-05-16 Thread Paolo Bonzini
On 16/05/2017 18:14, Kevin O'Connor wrote: > Don't write to the cmos index port on a mode switch if NMI is already > disabled. This reduces the number of outb() calls. > > Signed-off-by: Kevin O'Connor > --- > src/stacks.c | 13 + > 1 file changed, 9

Re: [SeaBIOS] A20: ahci_process_op is called with A20 off

2017-05-12 Thread Paolo Bonzini
On 12/05/2017 18:26, Kevin O'Connor wrote: > On Thu, May 11, 2017 at 11:22:02PM +, Xu, Anthony wrote: >>> SeaBIOS has a couple of different methods to accomplish this mode >>> switching - it can directly switch modes (C16_BIG switch) or it can >>> use a helper in SMM mode to perform the

Re: [SeaBIOS] A20: ahci_process_op is called with A20 off

2017-05-12 Thread Paolo Bonzini
On 12/05/2017 01:22, Xu, Anthony wrote: >> SeaBIOS has a couple of different methods to accomplish this mode >> switching - it can directly switch modes (C16_BIG switch) or it can >> use a helper in SMM mode to perform the switch (C16_SMM). The >> preferred method is C16_SMM as C16_BIG isn't

Re: [SeaBIOS] A20: ahci_process_op is called with A20 off

2017-05-11 Thread Paolo Bonzini
On 10/05/2017 21:21, Kevin O'Connor wrote: > On Tue, May 09, 2017 at 08:39:07PM +, Xu, Anthony wrote: >> Hi All, >> >> I recently met an issue, I can't boot my centos guest in below scenarios. >> >> I disabled kvmvapic by >> >> diff --git a/hw/intc/apic_common.c b/hw/intc/apic_common.c >>

[SeaBIOS] CFP: KVM Forum 2017

2017-05-02 Thread Paolo Bonzini
KVM Forum 2017: Call For Participation October 25-27, 2017 - Hilton Prague - Prague, Czech Republic (All submissions must be received before midnight June 15, 2017) =

Re: [SeaBIOS] Support for QEMU's virtio modern-pio-notify option?

2017-04-08 Thread Paolo Bonzini
On 02/04/2017 23:41, Jonathan Boeing wrote: > Specifically, it spins forever in the while(!vring_more_used(vq)) loop in the > call stack: > > scsi_drive_setup() > cdb_get_inquiry() > ... > virtio_scsi_process_op() Hi, this is a QEMU bug. The fix is commit e49a661 ("virtio: always use

Re: [SeaBIOS] [PATCH 0/9] add support for generic lun enumeration

2017-04-08 Thread Paolo Bonzini
On 01/03/2017 18:45, Roman Kagan wrote: > A number of SCSI drivers currently only see luns #0 in their targets. > > This may be a problem when drives have to be assigned bigger lun > numbers, e.g. because the storage controllers don't provide enough > target numbers to accomodate all drives. >

Re: [SeaBIOS] [PATCH 0/9] add support for generic lun enumeration

2017-03-15 Thread Paolo Bonzini
On 15/03/2017 12:33, Roman Kagan wrote: > On Tue, Mar 14, 2017 at 07:13:19PM +0100, Paolo Bonzini wrote: >> On 14/03/2017 16:16, Roman Kagan wrote: >>>> - if REPORT LUNS fails, then I don't think we need to iterate over >>>> every possible lun. If this

Re: [SeaBIOS] [PATCH 0/9] add support for generic lun enumeration

2017-03-14 Thread Paolo Bonzini
On 14/03/2017 16:16, Roman Kagan wrote: >> - if REPORT LUNS fails, then I don't think we need to iterate over >> every possible lun. If this is just to workaround qemu issues, then >> falling back to just using the first lun should be fine. > > Perhaps. As it was trivial to code

Re: [SeaBIOS] varlow/extrastack vs code

2017-02-20 Thread Paolo Bonzini
On 18/02/2017 17:55, Kevin O'Connor wrote: > On Sat, Feb 18, 2017 at 04:11:28PM +0100, Paolo Bonzini wrote: >> On 18/02/2017 04:45, Kevin O'Connor wrote: >>> On Fri, Feb 17, 2017 at 02:12:57PM +0100, Paolo Bonzini wrote: >>>> On 15/02/2017 18:35, Dr. David Alan Gil

Re: [SeaBIOS] varlow/extrastack vs code

2017-02-18 Thread Paolo Bonzini
On 18/02/2017 04:45, Kevin O'Connor wrote: > On Fri, Feb 17, 2017 at 02:12:57PM +0100, Paolo Bonzini wrote: >> On 15/02/2017 18:35, Dr. David Alan Gilbert wrote: >>> Yes it seems to. >>> One worry is that if we ever fix the qemu triple-fault so it really >>>

Re: [SeaBIOS] varlow/extrastack vs code

2017-02-17 Thread Paolo Bonzini
On 15/02/2017 18:35, Dr. David Alan Gilbert wrote: > Yes it seems to. > One worry is that if we ever fix the qemu triple-fault so it really > does what you're describing and only resets the CPU, then I'm not > sure your int3 is the right choice. > > The other question is whether that

Re: [SeaBIOS] varlow/extrastack vs code

2017-02-17 Thread Paolo Bonzini
On 14/02/2017 22:50, Gerd Hoffmann wrote: > Hi, > >> Just for historical perspective - the reason I think qemu didn't >> implement the pam "read from rom and write to memory" mode is that I >> don't think there's a good way to emulate that with page tables (and >> the range needs to be

Re: [SeaBIOS] varlow/extrastack vs code

2017-02-17 Thread Paolo Bonzini
On 15/02/2017 16:52, Kevin O'Connor wrote: > On Wed, Feb 15, 2017 at 11:01:03AM +0100, Laszlo Ersek wrote: >> On 02/14/17 20:14, Kevin O'Connor wrote: >>> On Tue, Feb 14, 2017 at 07:52:01PM +0100, Laszlo Ersek wrote: If item (1) is fixed in QEMU, then the above "root cause" goes away, and

Re: [SeaBIOS] [PATCH] ahci: Set upper 32-bit registers to zero

2017-01-17 Thread Paolo Bonzini
_HI, 0); > +} > + > return port; > } Weird as it may seem, HBA reset doesn't clear the address fields according to the spec. Reviewed-by: Paolo Bonzini <pbonz...@redhat.com> ___ SeaBIOS mailing list SeaBIOS@seabios.org https://www.coreboot.org/mailman/listinfo/seabios

[SeaBIOS] next release?

2016-10-12 Thread Paolo Bonzini
Hi, is there a plan for SeaBIOS 1.10? It would be nice for one to have the mpt-scsi driver included in the next QEMU release. :) Thanks, Paolo ___ SeaBIOS mailing list SeaBIOS@seabios.org https://www.coreboot.org/mailman/listinfo/seabios

Re: [SeaBIOS] [QUESTION]stuck in SeaBIOS and vm cannot be reset any more

2016-08-11 Thread Paolo Bonzini
On 11/08/2016 04:13, Xulei (Stone) wrote: > Following your suggestion, I found this problem may be caused by the flag of > HF_SMM_MASK. I'm now sure QEMU is sending the KVM_SMI ioctl, and > kmod already handles this ioctl. > > I add printk in inject_pending_event(), like this: > > /* try to

Re: [SeaBIOS] [QUESTION]stuck in SeaBIOS and vm cannot be reset any more

2016-08-09 Thread Paolo Bonzini
On 09/08/2016 10:04, Xulei (Stone) wrote: > Following your suggestion, i'm now sure it is caused by missing SMI. > I have tried adding dprintf() like this: > > --- a/roms/seabios/src/fw/smm.c > +++ b/roms/seabios/src/fw/smm.c > @@ -65,7 +65,8 @@ handle_smi(u16 cs) > u8 cmd =

Re: [SeaBIOS] [PATCH v3 1/3] paravirt: disable legacy bios tables in case of more than 255 CPUs

2016-08-08 Thread Paolo Bonzini
On 07/08/2016 07:57, Michael S. Tsirkin wrote: > On Fri, Aug 05, 2016 at 12:47:27PM +0200, Igor Mammedov wrote: >> MPTable doesn't support more than 255 CPUs and >> QEMU supplies an alternative MADT table which >> guest will use instead of it. So do not install >> legacy tables if more than 254

Re: [SeaBIOS] [PATCH] restore MSRs on S3 resume

2016-07-07 Thread Paolo Bonzini
> On Thu, Jul 07, 2016 at 04:00:40PM +0200, Paolo Bonzini wrote: > > Currently the MTRRs and MSR_IA32_FEATURE_CONTROL are not restored on S3 > > resume. Because these have to be applied to all processors, SMP setup > > has to be added to S3 resume. > > > >

[SeaBIOS] [PATCH] restore MSRs on S3 resume

2016-07-07 Thread Paolo Bonzini
-by: Laszlo Ersek <ler...@redhat.com> Signed-off-by: Paolo Bonzini <pbonz...@redhat.com> --- src/fw/paravirt.c | 1 + src/fw/smp.c | 28 +++- src/resume.c | 1 + src/util.h| 2 ++ 4 files changed, 27 insertions(+), 5 deletions(-) diff --

Re: [SeaBIOS] [PATCH v3] fw/msr_feature_control: add support to set MSR_IA32_FEATURE_CONTROL

2016-07-07 Thread Paolo Bonzini
> I've worried that if I only *call* these interfaces to set the MSR, then > the next (independent) use of the same interfaces would clear the MSR > through the INIT-SIPI-SIPI. That would have forced me to modify the > protocol / PPI implementations so that any use of them would reprogram > the

Re: [SeaBIOS] [PATCH v3] fw/msr_feature_control: add support to set MSR_IA32_FEATURE_CONTROL

2016-07-06 Thread Paolo Bonzini
> I forgot to restore MSR_IA32_FEATURE_CONTROL in the resume path, and > MSR_IA32_FEATURE_CONTROL is zero after S3 resume. This is a bug. Sorry Laszlo. :) > Not restore MSR_IA32_FEATURE_CONTROL during S3 resume does not affect > at least Linux guest (tested 4.5). Current QEMU may advise the

Re: [SeaBIOS] [Qemu-devel] [PATCH v2 0/3] seabios: add serial console support

2016-07-05 Thread Paolo Bonzini
On 05/07/2016 12:07, Daniel P. Berrange wrote: >> > What the final default behavior will be is not clear yet. Not enabled? >> > Enabled in case no VGA is present? Enabled unconditionally (simliar to >> > ovmf)? > (Bitter) experiance in libvirt has shown us that magically enabling > things

Re: [SeaBIOS] [Qemu-devel] [PATCH v2 0/3] seabios: add serial console support

2016-07-05 Thread Paolo Bonzini
On 05/07/2016 12:00, Gerd Hoffmann wrote: > One option would be to continue using sgabios.bin in fw_cfg. But > instead of loading and executing it activate the build-in serial console > if we find the file. That would make the switch completely transparent > to upper layers. But it is quite

Re: [SeaBIOS] [RFC PATCH 1/2] serial console, output

2016-07-04 Thread Paolo Bonzini
On 04/07/2016 18:00, Kevin O'Connor wrote: > So, if I read the sgabios code correctly, it allocates a buffer of: > > struct { u8 x, y; char c; } logbuf[256]; > int logbuf_offset; > > Every character sent on the serial port is appended to "logbuf" in > order, wrapping if necessary:

Re: [SeaBIOS] [RFC PATCH 1/2] serial console, output

2016-07-04 Thread Paolo Bonzini
On 04/07/2016 17:26, Kevin O'Connor wrote: > > 4k, we need both character and attribute. But, yes, if we can allocate > > that somewhere in real mode address space without running into memory > > pressure this might be the best option. > > Unfortunately, the screen can be larger than 80x25.

Re: [SeaBIOS] [RFC PATCH 1/2] serial console, output

2016-07-04 Thread Paolo Bonzini
On 04/07/2016 10:16, Gerd Hoffmann wrote: > > +sercon_putchar('\x1b'); > +sercon_putchar('c'); > +/* clear screen */ > +sercon_putchar('\x1b'); > +sercon_putchar('['); > +sercon_putchar('2'); > +sercon_putchar('J'); > +} > + > +static void sercon_set_color(u8 fg, u8

Re: [SeaBIOS] [PATCH v2 0/4] support booting more than 255 CPUs with QEMU

2016-06-24 Thread Paolo Bonzini
On 24/06/2016 10:06, Gerd Hoffmann wrote: > Hi, > >>> If there are any other suggestions for cherry-picks please speak up now. >> >> I would like to have "[PATCH v3] fw/msr_feature_control: add support to >> set MSR_IA32_FEATURE_CONTROL", please. > > Hmm, the qemu side for that one isn't

Re: [SeaBIOS] [PATCH v2 0/4] support booting more than 255 CPUs with QEMU

2016-06-24 Thread Paolo Bonzini
On 24/06/2016 09:28, Gerd Hoffmann wrote: > On Mi, 2016-06-22 at 16:50 +0200, Igor Mammedov wrote: >> On Mon, 20 Jun 2016 13:51:28 +0200 >> Gerd Hoffmann wrote: >> >>> Hi, >>> I need to dust RFC off and respin as Paolo wanted to sync APIC ID other way than in RFC

Re: [SeaBIOS] [PATCH] fw/msr_feature_control: add support to set MSR_IA32_FEATURE_CONTROL

2016-06-16 Thread Paolo Bonzini
> > > diff --git a/src/fw/msr_feature_control.c b/src/fw/msr_feature_control.c > > > new file mode 100644 > > > index 000..35d4ab8 > > > --- /dev/null > > > +++ b/src/fw/msr_feature_control.c > > > @@ -0,0 +1,16 @@ > > > +#include "util.h" // msr_feature_control_setup > > > +#include "x86.h"

Re: [SeaBIOS] [PATCH] fw/msr_feature_control: add support to set MSR_IA32_FEATURE_CONTROL

2016-06-16 Thread Paolo Bonzini
On 16/06/2016 13:49, Haozhong Zhang wrote: > diff --git a/src/fw/paravirt.c b/src/fw/paravirt.c > index 8ed4380..640ee4c 100644 > --- a/src/fw/paravirt.c > +++ b/src/fw/paravirt.c > @@ -153,6 +153,9 @@ qemu_platform_setup(void) > mtrr_setup(); > smp_setup(); > > +// Initialize

Re: [SeaBIOS] [edk2] KVM Forum 2016: Call For Participation

2016-06-01 Thread Paolo Bonzini
On 10/03/2016 19:09, Paolo Bonzini wrote: > === > IMPORTANT DATES > === > Notification: May 27, 2015 On behalf of the program committee, I apologize for the delay in sending out the notifications. If you need to know in advance whether your talk has b

Re: [SeaBIOS] qemu-kvm: SeaBIOS 1.9.0 and above cannot boot Windows 10 from harddisk

2016-05-19 Thread Paolo Bonzini
ot; (you can see that you are in big real mode from the "" in the dump on the lines between "ES" and "GS"). Your kernel has to emulate that code instruction by instruction, but it doesn't know how to emulate one particular instruction used by Windows, sahf. Thi

Re: [SeaBIOS] Build failed in Jenkins: seabios #220

2016-03-31 Thread Paolo Bonzini
On 31/03/2016 03:44, Kevin O'Connor wrote: > > Compile checking out/src/hw/mpt-scsi.o > > src/hw/mpt-scsi.c: In function 'init_mpt_scsi': > > src/hw/mpt-scsi.c:281:5: error: 'for' loop initial declarations are only > > allowed in C99 mode > > for (int i = 0; i < 7; i++) > > ^ > >

Re: [SeaBIOS] [PATCH v2] Support for booting from LSI Logic LSI53C1030, SAS1068, SAS1068e

2016-03-29 Thread Paolo Bonzini
On 29/03/2016 14:43, Kevin O'Connor wrote: >> > >> > Also known as Fusion MPT disk; this controller model is supported >> > by VirtualBox and VMware, and QEMU support patches have been >> > posted. > Thanks Paolo. The patch didn't apply - I took a stab at updating it > and pushed the patch to:

[SeaBIOS] [PATCH v2] Support for booting from LSI Logic LSI53C1030, SAS1068, SAS1068e

2016-03-25 Thread Paolo Bonzini
From: Don Slutz <don.sl...@gmail.com> Also known as Fusion MPT disk; this controller model is supported by VirtualBox and VMware, and QEMU support patches have been posted. Signed-off-by: Don Slutz <don.sl...@gmail.com> Signed-off-by: Paolo Bonzini <pbonz...@redhat.com> ---

[SeaBIOS] KVM Forum 2016: Call For Participation

2016-03-10 Thread Paolo Bonzini
= KVM Forum 2016: Call For Participation August 24-26, 2016 - Westin Harbor Castle - Toronto, Canada (All submissions must be received before midnight May 1, 2016) =

Re: [SeaBIOS] [PATCH] Support for booting from LSI Logic LSI53C1030, SAS1068, SAS1068e

2016-01-27 Thread Paolo Bonzini
On 27/01/2016 16:57, Kevin O'Connor wrote: > On Wed, Jan 27, 2016 at 03:51:02PM +0100, Paolo Bonzini wrote: >> From: Don Slutz <don.sl...@gmail.com> >> >> Also known as Fusion MPT disk; this controller model is supported >> by VirtualBox and VMware, and QEMU su

Re: [SeaBIOS] [PATCH] Support for booting from LSI Logic LSI53C1030, SAS1068, SAS1068e

2016-01-27 Thread Paolo Bonzini
On 27/01/2016 18:15, Kevin O'Connor wrote: > Oh, I understand and agree that recovery isn't worth while. My > concern is that a hardware error here will appear as a silent hang. > Breaking out of the loop eventually, calling warn_timeout(), and > returning an error code has the benefit of some

Re: [SeaBIOS] [PATCH] Support for booting from LSI Logic LSI53C1030, SAS1068, SAS1068e

2016-01-27 Thread Paolo Bonzini
On 27/01/2016 18:55, Kevin O'Connor wrote: > Most of the SeaBIOS drivers do implement timeouts. I think the only > ones that don't are lsi-scsi, pvscsi, and virtio. > > The timeout should come from the hardware spec - a lot of specs do > list a maximum transaction time. (It's also possible

Re: [SeaBIOS] [PATCH] Support for booting from LSI Logic LSI53C1030, SAS1068, SAS1068e

2016-01-27 Thread Paolo Bonzini
On 27/01/2016 18:30, Kevin O'Connor wrote: > On Wed, Jan 27, 2016 at 06:19:43PM +0100, Paolo Bonzini wrote: >> On 27/01/2016 18:15, Kevin O'Connor wrote: >>> Oh, I understand and agree that recovery isn't worth while. My >>> concern is that a hardware error here w

[SeaBIOS] [PATCH] Support for booting from LSI Logic LSI53C1030, SAS1068, SAS1068e

2016-01-27 Thread Paolo Bonzini
From: Don Slutz <don.sl...@gmail.com> Also known as Fusion MPT disk; this controller model is supported by VirtualBox and VMware, and QEMU support patches have been posted. Signed-off-by: Don Slutz <don.sl...@gmail.com> Signed-off-by: Paolo Bonzini <pbonz...@redhat.com

Re: [SeaBIOS] [RFC 0/3] NVDIMM booting support

2015-09-21 Thread Paolo Bonzini
On 21/09/2015 15:14, Marc Marí wrote: > This patch series is not ready for merging. There are things missing and > questions to be answered: > - Is it necessary to retrieve any other data from the NVDIMM? > - Is there any other nicer (and faster) option for the page table? > - Make NVDIMM a

Re: [SeaBIOS] [RFC 2/3] Transitions to and from 64 bits

2015-09-21 Thread Paolo Bonzini
On 21/09/2015 16:38, Marc Marí wrote: > True. Tried with 2M. The memory used went down from 8M to 24K more or > less, and the time for the copying went down by 4ms (from 15ms to > 11ms). The other option is 1GB. I'll test later if it's enabled in QEMU > CPUs. Only in some AMD CPUs (plus "-cpu

Re: [SeaBIOS] [PATCH 02/18] virtio: run drivers in 32bit mode

2015-07-03 Thread Paolo Bonzini
On 29/06/2015 10:53, Gerd Hoffmann wrote: virtio version 1.0 registers can (and actually do in the qemu implementation) live in mmio space. So we must run the blk and scsi virtio drivers in 32bit mode, otherwise we can't access them. This also allows to drop a bunch of GET_LOWFLAT calls

Re: [SeaBIOS] Reducing SeaBIOS kernel entry time

2015-07-03 Thread Paolo Bonzini
On 03/07/2015 11:43, Peter Stuge wrote: Hi, qboot (https://github.com/bonzini/qboot) is a stripped down firmware providing only what is needed to boot a Linux kernel on x86. Incredible, you have re-invented coreboot! I'm pretty sure I didn't, unless you count reusing the cbfs format as

Re: [SeaBIOS] [PATCH v8 3/3] ich9: implement strap SPKR pin logic

2015-07-02 Thread Paolo Bonzini
On 02/07/2015 03:30, Paulo Alcantara wrote: No, the iTCO_wdt driver won't fail to start. It actually depends on whether RCBA BAR is set. However, ICH9 will just ignore whether NO_REBOOT is set or unset when SPKR pin is high. This is the code I was referring to, in iTCO_wdt_start: /*

Re: [SeaBIOS] [Qemu-devel] [PATCH v4 1/3] ich9: add TCO interface emulation

2015-06-22 Thread Paolo Bonzini
On 22/06/2015 14:47, Michael S. Tsirkin wrote: Because it's a pain if I need to move code between files with different licenses. MIT is GPL compatible but mixing licenses at random is still not a good idea. This is a non-problem. How often does it happen that code is moved between files

Re: [SeaBIOS] [PATCH] ich9: initialise RCBA register through LPC interface

2015-06-22 Thread Paolo Bonzini
On 27/05/2015 11:32, Paolo Bonzini wrote: On 27/05/2015 02:28, Paulo Alcantara wrote: This patch initialises root complex register block BAR in order to support TCO watchdog emulation features on QEMU. Signed-off-by: Paulo Alcantara pca...@zytor.com --- src/fw/dev-q35.h | 3 +++ src

Re: [SeaBIOS] [PATCH v2 1/3] ich9: add TCO interface emulation

2015-06-01 Thread Paolo Bonzini
On 31/05/2015 00:04, Paulo Alcantara wrote: +case TCO_RLD: +tr-timeouts_no = 0; +if (can_start_tco_timer(tr)) { +tr-tco.rld = tr-tco.tmr; +tco_timer_reload(tr); +} else { +tr-tco.rld = val; Please mask out bits outside

Re: [SeaBIOS] [PATCH v2 3/3] tests: add testcase for TCO watchdog emulation

2015-06-01 Thread Paolo Bonzini
On 31/05/2015 00:04, Paulo Alcantara wrote: v1 - v2: * some cleanup * added test for TCO_LOCK bit Signed-off-by: Paulo Alcantara pca...@zytor.com --- tests/Makefile | 2 + tests/tco-test.c | 419 +++ 2 files changed, 421

Re: [SeaBIOS] [PATCH] ich9: initialise RCBA register through LPC interface

2015-05-27 Thread Paolo Bonzini
-by: Paolo Bonzini pbonz...@redhat.com ___ SeaBIOS mailing list SeaBIOS@seabios.org http://www.seabios.org/mailman/listinfo/seabios

Re: [SeaBIOS] [PATCH 1/3] ich9: add TCO interface emulation

2015-05-27 Thread Paolo Bonzini
On 27/05/2015 02:29, Paulo Alcantara wrote: This interface provides some registers within a 32-byte range and can be acessed through PCI-to-LPC bridge interface (PMBASE + 0x60). It's commonly used as a watchdog timer to detect system lockups through SMIs that are generated -- if TCO_EN bit

Re: [SeaBIOS] [PATCH 2/3] target-i386: reserve RCRB mmio space in ACPI DSDT table

2015-05-27 Thread Paolo Bonzini
On 27/05/2015 02:29, Paulo Alcantara wrote: Signed-off-by: Paulo Alcantara pca...@zytor.com --- hw/i386/acpi-dsdt-pdrc.dsl| 46 ++ Why pdrc and not e.g. ccr (chipset configuration registers)? I cannot find PDRC / PCI device resource consumption

Re: [SeaBIOS] [PATCH 3/3] Accept file supplied as multiboot modules

2015-05-19 Thread Paolo Bonzini
On 19/05/2015 09:47, Vladimir 'φ-coder/phcoder' Serbinenko wrote: On 19.05.2015 09:45, Paolo Bonzini wrote: On 18/05/2015 22:07, Vladimir 'phcoder' Serbinenko wrote: +void +coreboot_multiboot_init(u32 mbptr) +{ + struct multiboot_info *mbi = (void *)mbptr; + dprintf (1, mbptr=0x%x\n

Re: [SeaBIOS] [PATCH 3/3] Accept file supplied as multiboot modules

2015-05-19 Thread Paolo Bonzini
On 18/05/2015 22:07, Vladimir 'phcoder' Serbinenko wrote: +void +coreboot_multiboot_init(u32 mbptr) +{ + struct multiboot_info *mbi = (void *)mbptr; + dprintf (1, mbptr=0x%x\n, mbptr); + if (mbptr == NO_MULTIBOOT) +return; + mbi = (void *)mbptr; + dprintf (1, flags=0x%x,

Re: [SeaBIOS] [PATCH 3/3] Accept file supplied as multiboot modules

2015-05-19 Thread Paolo Bonzini
On 19/05/2015 10:10, Paolo Bonzini wrote: On 19/05/2015 09:47, Vladimir 'φ-coder/phcoder' Serbinenko wrote: On 19.05.2015 09:45, Paolo Bonzini wrote: On 18/05/2015 22:07, Vladimir 'phcoder' Serbinenko wrote: +void +coreboot_multiboot_init(u32 mbptr) +{ + struct multiboot_info *mbi

Re: [SeaBIOS] [PATCH v9 0/6] Add TPM support to SeaBIOS

2015-05-08 Thread Paolo Bonzini
On 08/05/2015 18:34, Stefan Berger wrote: On 04/09/2015 09:12 AM, Paolo Bonzini wrote: On 21/03/2015 01:05, Kevin O'Connor wrote: I don't agree with adding a new top level menu option to SeaBIOS. Is patch six needed for the other patches to make sense? (FYI, Paolo was proposing enhancing

[SeaBIOS] [PATCH] smm: ignore bits 16,18-31 of SMM revision ID

2015-05-06 Thread Paolo Bonzini
Bits 16-31 of the SMM revision ID are feature bits. We only need to check that SMBASE relocation is supported, but do not care about other features. In particular, this allows the SMM I/O instruction restart feature to be present. Signed-off-by: Paolo Bonzini pbonz...@redhat.com --- src/fw

Re: [SeaBIOS] KVM Forum 2015 Call for Participation

2015-04-27 Thread Paolo Bonzini
A friendly reminder that KVM Forum 2015 accepts proposal submissions until next Friday. Thanks on behalf of the KVM Forum 2015 Program Committee. Paolo On 11/03/2015 18:53, Paolo Bonzini wrote: = KVM Forum 2015: Call

Re: [SeaBIOS] about [SeaBIOS PATCH] Try to hard-reboot on rerun of post even on emulators.

2015-04-21 Thread Paolo Bonzini
On 21/04/2015 02:29, Kevin O'Connor wrote: On a typical x86 machine, the BIOS image is located in read-only memory at 0x. The chipsets typically also support shadowing that image to ram (or as a read-only copy) at 0xf. However, neither qemu nor kvm fully support all the

Re: [SeaBIOS] [PATCHv3 0/2] Emulate leal instruction to workaround x86emu bugs

2015-04-13 Thread Paolo Bonzini
On 11/04/2015 20:07, Kevin O'Connor wrote: With a few additional checks it's possible to emulate all the leal cases without requiring a function call. Although this makes the vgafixup.py code a little more complex it eliminates the need for the emulate_leal function and it produces

Re: [SeaBIOS] [PATCH v9 0/6] Add TPM support to SeaBIOS

2015-04-09 Thread Paolo Bonzini
On 21/03/2015 01:05, Kevin O'Connor wrote: I don't agree with adding a new top level menu option to SeaBIOS. Is patch six needed for the other patches to make sense? (FYI, Paolo was proposing enhancing the boot menu, and depending on the outcome of that proposal there might be a way

Re: [SeaBIOS] FreeBSD VESA console not working with SeaBIOS

2015-04-09 Thread Paolo Bonzini
On 09/04/2015 10:59, Jon Doe wrote: Might be instructive to look at how vmware and virtualbox BIOSes is able to work around this problem. Surely their BIOS code is written in C? At least Bochs's vgabios was written to run exclusively in 16-bit mode, using not just a different compiler than

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