[sigrok-devel] PulseView generic TCP input?

Hello, I'm hacking away at building a LA out of a $25 FTDI Hi-Speed USB FIFO module (http://tinyurl.com/km7hndw) and I would love to be able to integrate it into PulseView. Ideally, I would be able to give PulseView an IP address/port to pull data from. I see that there is some support for SCPI a

Re: [sigrok-devel] Regarding contributing to sigrok/PulseView

I'm not sure if this ever got a response, but I think it would be a great idea to have a wiki page to collect new ideas like ​ Johannes'. Adam On Thu, Jan 1, 2015 at 10:32 AM, ​​ Johannes Bauer wrote: > Hi there, > > so I've given sigrok a try with some real-world(tm) measurement tasks. > So fa

[sigrok-devel] building a LA out of a $25 FTDI Hi-Speed USB FIFO module

Hi everyone, a while back, I mentioned that I was working on building a LA out of a $25 FTDI Hi-Speed USB FIFO module (the UM232H which uses the $5 FT232H IC). I could only manage to get it sampling at 7.5 Msps without dropping a sample. Definitely slower than I would like, but not bad for a mult

Re: [sigrok-devel] building a LA out of a $25 FTDI Hi-Speed USB FIFO module

Hi Robert, glad to have you on board! Code is now up on https://github.com/afk-olkie/FtdiTest I should probably change the code license to CRAPL "... and (2) more importantly, it should absolve authors of shame, embarrassment and ridicule for ugly code." :)

Re: [sigrok-devel] sigrok and plain ft2232h as logic analyzer

Hi Andrew, I'm trying to find time to do the same for the FT232H (single channel version). I'd love to contribute. I've done some benchmarking, and the FT232H and very likely the FT2232H will drop samples at 15 Msps and higher without an external device (FPGA) providing additional buffering. This