Re: [x86 pmap changes] CVS commit: src/sys/arch

2020-01-07 Thread Andrew Doran
On Tue, Jan 07, 2020 at 09:39:22AM +0100, Maxime Villard wrote:

> You can test with this on an Intel CPU:
> 
>   # modload nvmm
>   # /usr/tests/lib/libnvmm/./h_mem_assist
> 
> This currently gives random crashes.

I'll dig into it.  There were also reports of NVMM failures on the lists but
unrelated to this set of changes.

Andrew


Re: [x86 pmap changes] CVS commit: src/sys/arch

2020-01-07 Thread Andrew Doran
On Tue, Jan 07, 2020 at 09:50:42AM +0100, Maxime Villard wrote:

> Also unrelated remark:
> 
> + kmutex_t pm_lock/* locks for pm_objs */
> + __aligned(64);  /* give lock own cache line */
> 
> x86 CPUs will soon have 128-byte cache lines, and to ease the upgrade,
> it is better to use COHERENCY_UNIT rather than hardcoded values.

I totally agree.  However in this instance it looked like it could leave me
in dependency hell.  I don't have much time left to get my changes in and
tested, so left it to come back to some other time.

Andrew


Re: [x86 pmap changes] CVS commit: src/sys/arch

2020-01-07 Thread Maxime Villard

Le 07/01/2020 à 09:39, Maxime Villard a écrit :

Module Name:    src
Committed By:   ad
Date:   Sat Jan  4 22:49:20 UTC 2020

Modified Files:
    src/sys/arch/x86/include: pmap.h pmap_pv.h
    src/sys/arch/x86/x86: pmap.c
    src/sys/arch/xen/x86: xen_pmap.c

Log Message:
x86 pmap improvements, reducing system time during a build by about 15% on
my test machine:


This breaks nvmm-intel. I have only given a quick glance, but this change
already is wrong:

-    old_pp->pp_attrs |= pmap_ept_to_pp_attrs(opte);
+    old_pp->pp_attrs |= pmap_pte_to_pp_attrs(opte);

This is an EPT function handling EPT PTEs, so "ept" was correct. Fixing
this bug is not sufficient, so it seems that there are more bugs.

Reverting the whole change puts nvmm-intel back in a functional state.

You can test with this on an Intel CPU:

 # modload nvmm
 # /usr/tests/lib/libnvmm/./h_mem_assist

This currently gives random crashes.

Maxime


Also unrelated remark:

+   kmutex_t pm_lock/* locks for pm_objs */
+   __aligned(64);  /* give lock own cache line */

x86 CPUs will soon have 128-byte cache lines, and to ease the upgrade,
it is better to use COHERENCY_UNIT rather than hardcoded values.


[x86 pmap changes] CVS commit: src/sys/arch

2020-01-07 Thread Maxime Villard

Module Name:src
Committed By:   ad
Date:   Sat Jan  4 22:49:20 UTC 2020

Modified Files:
src/sys/arch/x86/include: pmap.h pmap_pv.h
src/sys/arch/x86/x86: pmap.c
src/sys/arch/xen/x86: xen_pmap.c

Log Message:
x86 pmap improvements, reducing system time during a build by about 15% on
my test machine:


This breaks nvmm-intel. I have only given a quick glance, but this change
already is wrong:

-   old_pp->pp_attrs |= pmap_ept_to_pp_attrs(opte);
+   old_pp->pp_attrs |= pmap_pte_to_pp_attrs(opte);

This is an EPT function handling EPT PTEs, so "ept" was correct. Fixing
this bug is not sufficient, so it seems that there are more bugs.

Reverting the whole change puts nvmm-intel back in a functional state.

You can test with this on an Intel CPU:

# modload nvmm
# /usr/tests/lib/libnvmm/./h_mem_assist

This currently gives random crashes.

Maxime