CVS commit: src/sys/arch/mips/mips

2024-06-17 Thread Paul Goyette
Module Name:src Committed By: pgoyette Date: Mon Jun 17 20:25:20 UTC 2024 Modified Files: src/sys/arch/mips/mips: netbsd32_machdep_13.c netbsd32_machdep_16.c Log Message: Proteect #include of kernel options files with #ifdef _KERNEL_OPT XXX Add to existing 10.0 and 9.0 ti

CVS commit: src/sys/arch/mips/mips

2024-06-17 Thread Paul Goyette
Module Name:src Committed By: pgoyette Date: Mon Jun 17 20:25:20 UTC 2024 Modified Files: src/sys/arch/mips/mips: netbsd32_machdep_13.c netbsd32_machdep_16.c Log Message: Proteect #include of kernel options files with #ifdef _KERNEL_OPT XXX Add to existing 10.0 and 9.0 ti

CVS commit: src/sys/arch/mips/mips

2024-06-04 Thread Taylor R Campbell
Module Name:src Committed By: riastradh Date: Tue Jun 4 20:43:58 UTC 2024 Modified Files: src/sys/arch/mips/mips: bus_dma.c Log Message: mips/bus_dma.c: KNF No functional change intended. To generate a diff of this commit: cvs rdiff -u -r1.47 -r1.48 src/sys/arch/mips/m

CVS commit: src/sys/arch/mips/mips

2024-06-04 Thread Taylor R Campbell
Module Name:src Committed By: riastradh Date: Tue Jun 4 20:43:58 UTC 2024 Modified Files: src/sys/arch/mips/mips: bus_dma.c Log Message: mips/bus_dma.c: KNF No functional change intended. To generate a diff of this commit: cvs rdiff -u -r1.47 -r1.48 src/sys/arch/mips/m

CVS commit: src/sys/arch/mips/mips

2024-04-14 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Sun Apr 14 07:56:45 UTC 2024 Modified Files: src/sys/arch/mips/mips: sig_machdep.c Log Message: Trailing whitespace. To generate a diff of this commit: cvs rdiff -u -r1.24 -r1.25 src/sys/arch/mips/mips/sig_machdep.c Please note

CVS commit: src/sys/arch/mips/mips

2024-04-14 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Sun Apr 14 07:56:45 UTC 2024 Modified Files: src/sys/arch/mips/mips: sig_machdep.c Log Message: Trailing whitespace. To generate a diff of this commit: cvs rdiff -u -r1.24 -r1.25 src/sys/arch/mips/mips/sig_machdep.c Please note

CVS commit: src/sys/arch/mips/mips

2024-01-05 Thread Simon Burge
Module Name:src Committed By: simonb Date: Sat Jan 6 07:27:35 UTC 2024 Modified Files: src/sys/arch/mips/mips: mips_machdep.c Log Message: Remove funny blank line. To generate a diff of this commit: cvs rdiff -u -r1.305 -r1.306 src/sys/arch/mips/mips/mips_machdep.c Ple

CVS commit: src/sys/arch/mips/mips

2024-01-05 Thread Simon Burge
Module Name:src Committed By: simonb Date: Sat Jan 6 07:27:35 UTC 2024 Modified Files: src/sys/arch/mips/mips: mips_machdep.c Log Message: Remove funny blank line. To generate a diff of this commit: cvs rdiff -u -r1.305 -r1.306 src/sys/arch/mips/mips/mips_machdep.c Ple

CVS commit: src/sys/arch/mips/mips

2024-01-05 Thread Simon Burge
Module Name:src Committed By: simonb Date: Sat Jan 6 07:27:05 UTC 2024 Modified Files: src/sys/arch/mips/mips: mips_machdep.c Log Message: Add Cavium CN68xx to list of known CPUs. To generate a diff of this commit: cvs rdiff -u -r1.304 -r1.305 src/sys/arch/mips/mips/mip

CVS commit: src/sys/arch/mips/mips

2024-01-05 Thread Simon Burge
Module Name:src Committed By: simonb Date: Sat Jan 6 07:27:05 UTC 2024 Modified Files: src/sys/arch/mips/mips: mips_machdep.c Log Message: Add Cavium CN68xx to list of known CPUs. To generate a diff of this commit: cvs rdiff -u -r1.304 -r1.305 src/sys/arch/mips/mips/mip

CVS commit: src/sys/arch/mips/mips

2023-12-05 Thread Andrius Varanavicius
Module Name:src Committed By: andvar Date: Tue Dec 5 17:38:40 UTC 2023 Modified Files: src/sys/arch/mips/mips: lock_stubs_llsc.S Log Message: Add missing PTR_WORD command in front of 0. Likely accidentally missed in the commit, since rev 1.9. In theory needs pull-ups fo

CVS commit: src/sys/arch/mips/mips

2023-12-05 Thread Andrius Varanavicius
Module Name:src Committed By: andvar Date: Tue Dec 5 17:38:40 UTC 2023 Modified Files: src/sys/arch/mips/mips: lock_stubs_llsc.S Log Message: Add missing PTR_WORD command in front of 0. Likely accidentally missed in the commit, since rev 1.9. In theory needs pull-ups fo

Re: CVS commit: src/sys/arch/mips/mips

2023-10-24 Thread Andrius V
Thank you, I should pay attention to that. On Wed, Oct 25, 2023 at 9:02 AM Nick Hudson wrote: > > Module Name:src > Committed By: skrll > Date: Wed Oct 25 06:02:14 UTC 2023 > > Modified Files: > src/sys/arch/mips/mips: kgdb_machdep.c > > Log Message: > -> > > > To genera

CVS commit: src/sys/arch/mips/mips

2023-10-24 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Wed Oct 25 06:02:14 UTC 2023 Modified Files: src/sys/arch/mips/mips: kgdb_machdep.c Log Message: -> To generate a diff of this commit: cvs rdiff -u -r1.21 -r1.22 src/sys/arch/mips/mips/kgdb_machdep.c Please note that diffs are

CVS commit: src/sys/arch/mips/mips

2023-10-24 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Wed Oct 25 06:02:14 UTC 2023 Modified Files: src/sys/arch/mips/mips: kgdb_machdep.c Log Message: -> To generate a diff of this commit: cvs rdiff -u -r1.21 -r1.22 src/sys/arch/mips/mips/kgdb_machdep.c Please note that diffs are

CVS commit: src/sys/arch/mips/mips

2023-10-24 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Wed Oct 25 06:01:29 UTC 2023 Modified Files: src/sys/arch/mips/mips: kgdb_machdep.c Log Message: Trailing whitespace To generate a diff of this commit: cvs rdiff -u -r1.20 -r1.21 src/sys/arch/mips/mips/kgdb_machdep.c Please note

CVS commit: src/sys/arch/mips/mips

2023-10-24 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Wed Oct 25 06:01:29 UTC 2023 Modified Files: src/sys/arch/mips/mips: kgdb_machdep.c Log Message: Trailing whitespace To generate a diff of this commit: cvs rdiff -u -r1.20 -r1.21 src/sys/arch/mips/mips/kgdb_machdep.c Please note

CVS commit: src/sys/arch/mips/mips

2023-10-24 Thread Andrius Varanavicius
Module Name:src Committed By: andvar Date: Tue Oct 24 22:04:24 UTC 2023 Modified Files: src/sys/arch/mips/mips: kgdb_machdep.c Log Message: add two blocks of db_regs_t to gdb translation, according to regnum.h definitions and if either __mips_n32 or __mips_n64 is defined.

CVS commit: src/sys/arch/mips/mips

2023-10-24 Thread Andrius Varanavicius
Module Name:src Committed By: andvar Date: Tue Oct 24 22:04:24 UTC 2023 Modified Files: src/sys/arch/mips/mips: kgdb_machdep.c Log Message: add two blocks of db_regs_t to gdb translation, according to regnum.h definitions and if either __mips_n32 or __mips_n64 is defined.

CVS commit: src/sys/arch/mips/mips

2023-10-24 Thread Andrius Varanavicius
Module Name:src Committed By: andvar Date: Tue Oct 24 18:08:16 UTC 2023 Modified Files: src/sys/arch/mips/mips: trap.c Log Message: pass &tf->tf_registers instead of tf to db_set_ddb_regs(). use _R_PC definition instead of TF_EPC for tf->tf_regs[]. Changes were not adjuste

CVS commit: src/sys/arch/mips/mips

2023-10-24 Thread Andrius Varanavicius
Module Name:src Committed By: andvar Date: Tue Oct 24 18:08:16 UTC 2023 Modified Files: src/sys/arch/mips/mips: trap.c Log Message: pass &tf->tf_registers instead of tf to db_set_ddb_regs(). use _R_PC definition instead of TF_EPC for tf->tf_regs[]. Changes were not adjuste

CVS commit: src/sys/arch/mips/mips

2023-10-24 Thread Andrius Varanavicius
Module Name:src Committed By: andvar Date: Tue Oct 24 18:01:31 UTC 2023 Modified Files: src/sys/arch/mips/mips: kgdb_machdep.c Log Message: move locore.h include above pte.h, which uses some of its definitions. fix typo in pte_valid_p() argument, *pte->*ptep. makes this f

CVS commit: src/sys/arch/mips/mips

2023-10-24 Thread Andrius Varanavicius
Module Name:src Committed By: andvar Date: Tue Oct 24 18:01:31 UTC 2023 Modified Files: src/sys/arch/mips/mips: kgdb_machdep.c Log Message: move locore.h include above pte.h, which uses some of its definitions. fix typo in pte_valid_p() argument, *pte->*ptep. makes this f

CVS commit: src/sys/arch/mips/mips

2023-09-13 Thread Rin Okuyama
Module Name:src Committed By: rin Date: Thu Sep 14 03:24:07 UTC 2023 Modified Files: src/sys/arch/mips/mips: trap.c Log Message: mips/trap: Fix reversed ksi_code for SIGTRAP cases It should be TRAP_TRACE and TRAP_BRKPT for software single stepping and ``real'' break insn,

CVS commit: src/sys/arch/mips/mips

2023-09-13 Thread Rin Okuyama
Module Name:src Committed By: rin Date: Thu Sep 14 03:24:07 UTC 2023 Modified Files: src/sys/arch/mips/mips: trap.c Log Message: mips/trap: Fix reversed ksi_code for SIGTRAP cases It should be TRAP_TRACE and TRAP_BRKPT for software single stepping and ``real'' break insn,

CVS commit: src/sys/arch/mips/mips

2023-05-21 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Mon May 22 06:50:52 UTC 2023 Modified Files: src/sys/arch/mips/mips: spl.S Log Message: Fix a comment To generate a diff of this commit: cvs rdiff -u -r1.19 -r1.20 src/sys/arch/mips/mips/spl.S Please note that diffs are not publ

CVS commit: src/sys/arch/mips/mips

2023-05-21 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Mon May 22 06:50:52 UTC 2023 Modified Files: src/sys/arch/mips/mips: spl.S Log Message: Fix a comment To generate a diff of this commit: cvs rdiff -u -r1.19 -r1.20 src/sys/arch/mips/mips/spl.S Please note that diffs are not publ

CVS commit: src/sys/arch/mips/mips

2023-03-01 Thread Taylor R Campbell
Module Name:src Committed By: riastradh Date: Wed Mar 1 08:18:04 UTC 2023 Modified Files: src/sys/arch/mips/mips: locore.S Log Message: mips: Optimization: Omit needless membar when triggering softint. When we are triggering a softint, it can't already hold any mutexes.

CVS commit: src/sys/arch/mips/mips

2023-03-01 Thread Taylor R Campbell
Module Name:src Committed By: riastradh Date: Wed Mar 1 08:18:04 UTC 2023 Modified Files: src/sys/arch/mips/mips: locore.S Log Message: mips: Optimization: Omit needless membar when triggering softint. When we are triggering a softint, it can't already hold any mutexes.

CVS commit: src/sys/arch/mips/mips

2023-02-25 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Sat Feb 25 08:41:37 UTC 2023 Modified Files: src/sys/arch/mips/mips: vm_machdep.c Log Message: Convert some assignments into KASSERTs. l_md is zeroised by lwp_create with memset(&l2->l_startzero, 0, sizeof(*l2) -

CVS commit: src/sys/arch/mips/mips

2023-02-25 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Sat Feb 25 08:41:37 UTC 2023 Modified Files: src/sys/arch/mips/mips: vm_machdep.c Log Message: Convert some assignments into KASSERTs. l_md is zeroised by lwp_create with memset(&l2->l_startzero, 0, sizeof(*l2) -

CVS commit: src/sys/arch/mips/mips

2023-02-19 Thread Simon Burge
Module Name:src Committed By: simonb Date: Sun Feb 19 11:19:51 UTC 2023 Modified Files: src/sys/arch/mips/mips: db_interface.c Log Message: Adjust userspace comments in db_read_bytes() and db_write_bytes() to match current reality. To generate a diff of this commit: cvs

CVS commit: src/sys/arch/mips/mips

2023-02-19 Thread Simon Burge
Module Name:src Committed By: simonb Date: Sun Feb 19 11:19:51 UTC 2023 Modified Files: src/sys/arch/mips/mips: db_interface.c Log Message: Adjust userspace comments in db_read_bytes() and db_write_bytes() to match current reality. To generate a diff of this commit: cvs

CVS commit: src/sys/arch/mips/mips

2023-02-19 Thread Michael van Elst
Module Name:src Committed By: mlelstv Date: Sun Feb 19 10:48:06 UTC 2023 Modified Files: src/sys/arch/mips/mips: db_interface.c Log Message: Only copyin/copyout from and to user addresses. To generate a diff of this commit: cvs rdiff -u -r1.97 -r1.98 src/sys/arch/mips/mi

CVS commit: src/sys/arch/mips/mips

2023-02-19 Thread Michael van Elst
Module Name:src Committed By: mlelstv Date: Sun Feb 19 10:48:06 UTC 2023 Modified Files: src/sys/arch/mips/mips: db_interface.c Log Message: Only copyin/copyout from and to user addresses. To generate a diff of this commit: cvs rdiff -u -r1.97 -r1.98 src/sys/arch/mips/mi

CVS commit: src/sys/arch/mips/mips

2022-10-22 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Sun Oct 23 06:10:09 UTC 2022 Modified Files: src/sys/arch/mips/mips: mips_machdep.c Log Message: Trailing whitespace. To generate a diff of this commit: cvs rdiff -u -r1.303 -r1.304 src/sys/arch/mips/mips/mips_machdep.c Please n

CVS commit: src/sys/arch/mips/mips

2022-10-22 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Sun Oct 23 06:10:09 UTC 2022 Modified Files: src/sys/arch/mips/mips: mips_machdep.c Log Message: Trailing whitespace. To generate a diff of this commit: cvs rdiff -u -r1.303 -r1.304 src/sys/arch/mips/mips/mips_machdep.c Please n

CVS commit: src/sys/arch/mips/mips

2022-09-28 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Thu Sep 29 06:59:12 UTC 2022 Modified Files: src/sys/arch/mips/mips: cpu_exec.c Log Message: Trailing whitespace To generate a diff of this commit: cvs rdiff -u -r1.68 -r1.69 src/sys/arch/mips/mips/cpu_exec.c Please note that di

CVS commit: src/sys/arch/mips/mips

2022-09-28 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Thu Sep 29 06:59:12 UTC 2022 Modified Files: src/sys/arch/mips/mips: cpu_exec.c Log Message: Trailing whitespace To generate a diff of this commit: cvs rdiff -u -r1.68 -r1.69 src/sys/arch/mips/mips/cpu_exec.c Please note that di

CVS commit: src/sys/arch/mips/mips

2022-07-20 Thread Taylor R Campbell
Module Name:src Committed By: riastradh Date: Wed Jul 20 10:07:49 UTC 2022 Modified Files: src/sys/arch/mips/mips: cpu_subr.c locore_octeon.S Log Message: mips: Fix cpuids synchronization at boot. To generate a diff of this commit: cvs rdiff -u -r1.61 -r1.62 src/sys/arch

CVS commit: src/sys/arch/mips/mips

2022-07-20 Thread Taylor R Campbell
Module Name:src Committed By: riastradh Date: Wed Jul 20 10:07:49 UTC 2022 Modified Files: src/sys/arch/mips/mips: cpu_subr.c locore_octeon.S Log Message: mips: Fix cpuids synchronization at boot. To generate a diff of this commit: cvs rdiff -u -r1.61 -r1.62 src/sys/arch

CVS commit: src/sys/arch/mips/mips

2022-03-13 Thread Andrius Varanavicius
Module Name:src Committed By: andvar Date: Sun Mar 13 22:18:56 UTC 2022 Modified Files: src/sys/arch/mips/mips: locore_mips1.S Log Message: s/entreed/entered/ To generate a diff of this commit: cvs rdiff -u -r1.97 -r1.98 src/sys/arch/mips/mips/locore_mips1.S Please note

CVS commit: src/sys/arch/mips/mips

2022-03-13 Thread Andrius Varanavicius
Module Name:src Committed By: andvar Date: Sun Mar 13 22:18:56 UTC 2022 Modified Files: src/sys/arch/mips/mips: locore_mips1.S Log Message: s/entreed/entered/ To generate a diff of this commit: cvs rdiff -u -r1.97 -r1.98 src/sys/arch/mips/mips/locore_mips1.S Please note

CVS commit: src/sys/arch/mips/mips

2022-02-27 Thread Taylor R Campbell
Module Name:src Committed By: riastradh Date: Sun Feb 27 19:22:29 UTC 2022 Modified Files: src/sys/arch/mips/mips: lock_stubs_llsc.S Log Message: mips: Issue a sync plunger at the end of mutex_spin_exit. Same as mutex_exit. Relevant only on cnMIPS where the store buffers

CVS commit: src/sys/arch/mips/mips

2022-02-27 Thread Taylor R Campbell
Module Name:src Committed By: riastradh Date: Sun Feb 27 19:22:29 UTC 2022 Modified Files: src/sys/arch/mips/mips: lock_stubs_llsc.S Log Message: mips: Issue a sync plunger at the end of mutex_spin_exit. Same as mutex_exit. Relevant only on cnMIPS where the store buffers

CVS commit: src/sys/arch/mips/mips

2022-02-27 Thread Taylor R Campbell
Module Name:src Committed By: riastradh Date: Sun Feb 27 19:21:44 UTC 2022 Modified Files: src/sys/arch/mips/mips: lock_stubs_llsc.S Log Message: mips: Make sure that mutex_spin_exit works even if !DIAGNOSTIC. The critical store has been under #ifdef DIAGNOSTIC since, uh,

CVS commit: src/sys/arch/mips/mips

2022-02-27 Thread Taylor R Campbell
Module Name:src Committed By: riastradh Date: Sun Feb 27 19:21:44 UTC 2022 Modified Files: src/sys/arch/mips/mips: lock_stubs_llsc.S Log Message: mips: Make sure that mutex_spin_exit works even if !DIAGNOSTIC. The critical store has been under #ifdef DIAGNOSTIC since, uh,

CVS commit: src/sys/arch/mips/mips

2022-01-15 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Sat Jan 15 10:32:32 UTC 2022 Modified Files: src/sys/arch/mips/mips: db_interface.c Log Message: Add 'mach cpuinfo' support To generate a diff of this commit: cvs rdiff -u -r1.95 -r1.96 src/sys/arch/mips/mips/db_interface.c Plea

CVS commit: src/sys/arch/mips/mips

2022-01-15 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Sat Jan 15 10:32:32 UTC 2022 Modified Files: src/sys/arch/mips/mips: db_interface.c Log Message: Add 'mach cpuinfo' support To generate a diff of this commit: cvs rdiff -u -r1.95 -r1.96 src/sys/arch/mips/mips/db_interface.c Plea

CVS commit: src/sys/arch/mips/mips

2022-01-15 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Sat Jan 15 08:56:41 UTC 2022 Modified Files: src/sys/arch/mips/mips: db_interface.c Log Message: sort To generate a diff of this commit: cvs rdiff -u -r1.94 -r1.95 src/sys/arch/mips/mips/db_interface.c Please note that diffs are

CVS commit: src/sys/arch/mips/mips

2022-01-15 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Sat Jan 15 08:56:41 UTC 2022 Modified Files: src/sys/arch/mips/mips: db_interface.c Log Message: sort To generate a diff of this commit: cvs rdiff -u -r1.94 -r1.95 src/sys/arch/mips/mips/db_interface.c Please note that diffs are

CVS commit: src/sys/arch/mips/mips

2022-01-02 Thread Christos Zoulas
Module Name:src Committed By: christos Date: Sun Jan 2 16:03:46 UTC 2022 Modified Files: src/sys/arch/mips/mips: mips_fixup.c Log Message: fix KASSERT issue To generate a diff of this commit: cvs rdiff -u -r1.22 -r1.23 src/sys/arch/mips/mips/mips_fixup.c Please note th

CVS commit: src/sys/arch/mips/mips

2022-01-02 Thread Christos Zoulas
Module Name:src Committed By: christos Date: Sun Jan 2 16:03:46 UTC 2022 Modified Files: src/sys/arch/mips/mips: mips_fixup.c Log Message: fix KASSERT issue To generate a diff of this commit: cvs rdiff -u -r1.22 -r1.23 src/sys/arch/mips/mips/mips_fixup.c Please note th

CVS commit: src/sys/arch/mips/mips

2021-11-15 Thread Simon Burge
Module Name:src Committed By: simonb Date: Tue Nov 16 06:15:48 UTC 2021 Modified Files: src/sys/arch/mips/mips: mips_emul.c Log Message: Use the register define MIPS_HWR_ULR instead of a magic number. To generate a diff of this commit: cvs rdiff -u -r1.30 -r1.31 src/sys/

CVS commit: src/sys/arch/mips/mips

2021-11-15 Thread Simon Burge
Module Name:src Committed By: simonb Date: Tue Nov 16 06:15:48 UTC 2021 Modified Files: src/sys/arch/mips/mips: mips_emul.c Log Message: Use the register define MIPS_HWR_ULR instead of a magic number. To generate a diff of this commit: cvs rdiff -u -r1.30 -r1.31 src/sys/

CVS commit: src/sys/arch/mips/mips

2021-11-05 Thread SAITOH Masanobu
Module Name:src Committed By: msaitoh Date: Sat Nov 6 06:49:02 UTC 2021 Modified Files: src/sys/arch/mips/mips: cache_tx39.c Log Message: Fix typo in comment. s/phyiscally/physically/ To generate a diff of this commit: cvs rdiff -u -r1.8 -r1.9 src/sys/arch/mips/mips/cac

CVS commit: src/sys/arch/mips/mips

2021-11-05 Thread SAITOH Masanobu
Module Name:src Committed By: msaitoh Date: Sat Nov 6 06:49:02 UTC 2021 Modified Files: src/sys/arch/mips/mips: cache_tx39.c Log Message: Fix typo in comment. s/phyiscally/physically/ To generate a diff of this commit: cvs rdiff -u -r1.8 -r1.9 src/sys/arch/mips/mips/cac

CVS commit: src/sys/arch/mips/mips

2021-10-18 Thread Rin Okuyama
Module Name:src Committed By: rin Date: Tue Oct 19 03:47:33 UTC 2021 Modified Files: src/sys/arch/mips/mips: vm_machdep.c Log Message: Revert previous: http://cvsweb.netbsd.org/bsdweb.cgi/src/sys/arch/mips/mips/vm_machdep.c#rev1.163 > cpu_uarea_alloc: For ILP32, do not t

CVS commit: src/sys/arch/mips/mips

2021-10-18 Thread Rin Okuyama
Module Name:src Committed By: rin Date: Tue Oct 19 03:47:33 UTC 2021 Modified Files: src/sys/arch/mips/mips: vm_machdep.c Log Message: Revert previous: http://cvsweb.netbsd.org/bsdweb.cgi/src/sys/arch/mips/mips/vm_machdep.c#rev1.163 > cpu_uarea_alloc: For ILP32, do not t

CVS commit: src/sys/arch/mips/mips

2021-10-14 Thread Rin Okuyama
Module Name:src Committed By: rin Date: Thu Oct 14 02:22:25 UTC 2021 Modified Files: src/sys/arch/mips/mips: vm_machdep.c Log Message: cpu_uarea_alloc: For ILP32, do not try to allocate physical memory above pmap_limits.avail_end. Fix NULL dereference in uvm_pglistalloc_c

CVS commit: src/sys/arch/mips/mips

2021-10-13 Thread Rin Okuyama
Module Name:src Committed By: rin Date: Thu Oct 14 02:22:25 UTC 2021 Modified Files: src/sys/arch/mips/mips: vm_machdep.c Log Message: cpu_uarea_alloc: For ILP32, do not try to allocate physical memory above pmap_limits.avail_end. Fix NULL dereference in uvm_pglistalloc_c

Re: CVS commit: src/sys/arch/mips/mips

2020-06-09 Thread Simon Burge
Simon Burge wrote: > > > Module Name: src > > > Committed By: simonb > > > Date: Tue Jun 9 06:18:01 UTC 2020 > > > > > > Modified Files: > > > src/sys/arch/mips/mips: mips_machdep.c > > > > > > Log Message: > > > If we are on a SiByte or Cavium CPU with an FPU, report as

Re: CVS commit: src/sys/arch/mips/mips

2020-06-09 Thread Simon Burge
Izumi Tsutsui wrote: > > Module Name:src > > Committed By: simonb > > Date: Tue Jun 9 06:18:01 UTC 2020 > > > > Modified Files: > > src/sys/arch/mips/mips: mips_machdep.c > > > > Log Message: > > If we are on a SiByte or Cavium CPU with an FPU, report as "built-i

Re: CVS commit: src/sys/arch/mips/mips

2020-06-09 Thread Izumi Tsutsui
> Module Name: src > Committed By: simonb > Date: Tue Jun 9 06:18:01 UTC 2020 > > Modified Files: > src/sys/arch/mips/mips: mips_machdep.c > > Log Message: > If we are on a SiByte or Cavium CPU with an FPU, report as "built-in FPU" > instead of saying it's an unknown FPU type. >

Re: CVS commit: src/sys/arch/mips/mips

2020-03-13 Thread Christos Zoulas
> On Mar 13, 2020, at 12:25 PM, Jason Thorpe wrote: > > >> On Mar 13, 2020, at 9:11 AM, Christos Zoulas wrote: >> >> I think this is better done in the driver, as other ports >> do the same check and it catches bugs. > > x86 *explcitly* checks for 0 to skip work. If you want to find bugs, c

Re: CVS commit: src/sys/arch/mips/mips

2020-03-13 Thread Jason Thorpe
> On Mar 13, 2020, at 9:11 AM, Christos Zoulas wrote: > > I think this is better done in the driver, as other ports > do the same check and it catches bugs. x86 *explcitly* checks for 0 to skip work. If you want to find bugs, change the most-often-used implementation maybe? -- thorpej

Re: CVS commit: src/sys/arch/mips/mips

2020-03-13 Thread Christos Zoulas
In article <20200313034939.553d5f...@cvs.netbsd.org>, Jason R Thorpe wrote: >-=-=-=-=-=- > >Module Name: src >Committed By: thorpej >Date: Fri Mar 13 03:49:39 UTC 2020 > >Modified Files: > src/sys/arch/mips/mips: bus_dma.c > >Log Message: >Allow len == 0 in bus_dmamap_sync(). I

Re: CVS commit: src/sys/arch/mips/mips

2020-03-12 Thread Nick Hudson
On 13/03/2020 03:49, Jason R Thorpe wrote: Module Name:src Committed By: thorpej Date: Fri Mar 13 03:49:39 UTC 2020 Modified Files: src/sys/arch/mips/mips: bus_dma.c Log Message: Allow len == 0 in bus_dmamap_sync(). XXX pullup-9 The assertion that len is not 0 in arm

CVS commit: src/sys/arch/mips/mips

2019-11-24 Thread Andrew Doran
Module Name:src Committed By: ad Date: Sun Nov 24 15:37:39 UTC 2019 Modified Files: src/sys/arch/mips/mips: cpu_subr.c Log Message: Typo. To generate a diff of this commit: cvs rdiff -u -r1.36 -r1.37 src/sys/arch/mips/mips/cpu_subr.c Please note that diffs are not publi

CVS commit: src/sys/arch/mips/mips

2019-11-24 Thread Andrew Doran
Module Name:src Committed By: ad Date: Sun Nov 24 15:37:39 UTC 2019 Modified Files: src/sys/arch/mips/mips: cpu_subr.c Log Message: Typo. To generate a diff of this commit: cvs rdiff -u -r1.36 -r1.37 src/sys/arch/mips/mips/cpu_subr.c Please note that diffs are not publi

CVS commit: src/sys/arch/mips/mips

2019-09-05 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Thu Sep 5 15:48:13 UTC 2019 Modified Files: src/sys/arch/mips/mips: locore.S Log Message: Fix a maya fix so that cobalt boots again. Set MIPS_COP_0_CAUSE to zero before the rest of the initialisation To generate a diff of this

CVS commit: src/sys/arch/mips/mips

2019-09-05 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Thu Sep 5 15:48:13 UTC 2019 Modified Files: src/sys/arch/mips/mips: locore.S Log Message: Fix a maya fix so that cobalt boots again. Set MIPS_COP_0_CAUSE to zero before the rest of the initialisation To generate a diff of this

CVS commit: src/sys/arch/mips/mips

2019-07-14 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Sun Jul 14 09:31:33 UTC 2019 Modified Files: src/sys/arch/mips/mips: pmap_machdep.c Log Message: Use PV_ISKENTER_P. NFCI. To generate a diff of this commit: cvs rdiff -u -r1.23 -r1.24 src/sys/arch/mips/mips/pmap_machdep.c Please

CVS commit: src/sys/arch/mips/mips

2019-07-14 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Sun Jul 14 09:31:33 UTC 2019 Modified Files: src/sys/arch/mips/mips: pmap_machdep.c Log Message: Use PV_ISKENTER_P. NFCI. To generate a diff of this commit: cvs rdiff -u -r1.23 -r1.24 src/sys/arch/mips/mips/pmap_machdep.c Please

CVS commit: src/sys/arch/mips/mips

2019-06-25 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Tue Jun 25 21:26:04 UTC 2019 Modified Files: src/sys/arch/mips/mips: mipsX_subr.S Log Message: s/cpulwp/curlwp/ To generate a diff of this commit: cvs rdiff -u -r1.104 -r1.105 src/sys/arch/mips/mips/mipsX_subr.S Please note that

CVS commit: src/sys/arch/mips/mips

2019-06-25 Thread Nick Hudson
Module Name:src Committed By: skrll Date: Tue Jun 25 21:26:04 UTC 2019 Modified Files: src/sys/arch/mips/mips: mipsX_subr.S Log Message: s/cpulwp/curlwp/ To generate a diff of this commit: cvs rdiff -u -r1.104 -r1.105 src/sys/arch/mips/mips/mipsX_subr.S Please note that

Re: CVS commit: src/sys/arch/mips/mips

2018-09-07 Thread maya
On Fri, Sep 07, 2018 at 09:29:27PM +, Christos Zoulas wrote: > In article <20180907211445.dbf47f...@cvs.netbsd.org>, > Michael Lorenz wrote: > >-=-=-=-=-=- > > > >Module Name: src > >Committed By:macallan > >Date:Fri Sep 7 21:14:45 UTC 2018 > > > >Modified Files: > >

Re: CVS commit: src/sys/arch/mips/mips

2018-09-07 Thread Christos Zoulas
In article <20180907211445.dbf47f...@cvs.netbsd.org>, Michael Lorenz wrote: >-=-=-=-=-=- > >Module Name: src >Committed By: macallan >Date: Fri Sep 7 21:14:45 UTC 2018 > >Modified Files: > src/sys/arch/mips/mips: locore.S > >Log Message: >re-enable 64bit addressing in n32 kernel

re: CVS commit: src/sys/arch/mips/mips

2018-08-08 Thread matthew green
m...@netbsd.org writes: > Can we use aprint_debug instead? it's not an autoconf message, so, please don't use aprint*(). .mrg. > On Wed, Aug 08, 2018 at 07:50:13AM +, Simon Burge wrote: > > Module Name:src > > Committed By: simonb > > Date: Wed Aug 8 07:50:12 UT

Re: CVS commit: src/sys/arch/mips/mips

2018-08-08 Thread maya
On Wed, Aug 08, 2018 at 10:22:33PM +1000, Simon Burge wrote: > Martin Husemann wrote: > > > On Wed, Aug 08, 2018 at 12:11:39PM +, m...@netbsd.org wrote: > > > On Wed, Aug 08, 2018 at 01:59:46PM +0200, Martin Husemann wrote: > > > > On Wed, Aug 08, 2018 at 11:49:21AM +, m...@netbsd.org wrot

Re: CVS commit: src/sys/arch/mips/mips

2018-08-08 Thread Paul Goyette
On Wed, 8 Aug 2018, Martin Husemann wrote: On Wed, Aug 08, 2018 at 12:11:39PM +, m...@netbsd.org wrote: On Wed, Aug 08, 2018 at 01:59:46PM +0200, Martin Husemann wrote: On Wed, Aug 08, 2018 at 11:49:21AM +, m...@netbsd.org wrote: Can we use aprint_debug instead? It is not even usefu

Re: CVS commit: src/sys/arch/mips/mips

2018-08-08 Thread Simon Burge
Martin Husemann wrote: > On Wed, Aug 08, 2018 at 12:11:39PM +, m...@netbsd.org wrote: > > On Wed, Aug 08, 2018 at 01:59:46PM +0200, Martin Husemann wrote: > > > On Wed, Aug 08, 2018 at 11:49:21AM +, m...@netbsd.org wrote: > > > > Can we use aprint_debug instead? > > > > > > It is not even

Re: CVS commit: src/sys/arch/mips/mips

2018-08-08 Thread Martin Husemann
On Wed, Aug 08, 2018 at 12:11:39PM +, m...@netbsd.org wrote: > On Wed, Aug 08, 2018 at 01:59:46PM +0200, Martin Husemann wrote: > > On Wed, Aug 08, 2018 at 11:49:21AM +, m...@netbsd.org wrote: > > > Can we use aprint_debug instead? > > > > It is not even usefull for general debugging IMHO.

Re: CVS commit: src/sys/arch/mips/mips

2018-08-08 Thread maya
On Wed, Aug 08, 2018 at 01:59:46PM +0200, Martin Husemann wrote: > On Wed, Aug 08, 2018 at 11:49:21AM +, m...@netbsd.org wrote: > > Can we use aprint_debug instead? > > It is not even usefull for general debugging IMHO. > > Martin I like the idea of removing the messages entirely. The code w

Re: CVS commit: src/sys/arch/mips/mips

2018-08-08 Thread Martin Husemann
On Wed, Aug 08, 2018 at 11:49:21AM +, m...@netbsd.org wrote: > Can we use aprint_debug instead? It is not even usefull for general debugging IMHO. Martin

Re: CVS commit: src/sys/arch/mips/mips

2018-08-08 Thread maya
Can we use aprint_debug instead? On Wed, Aug 08, 2018 at 07:50:13AM +, Simon Burge wrote: > Module Name: src > Committed By: simonb > Date: Wed Aug 8 07:50:12 UTC 2018 > > Modified Files: > src/sys/arch/mips/mips: cpu_exec.c > > Log Message: > Make change of ABI printf()s #if

Re: CVS commit: src/sys/arch/mips/mips

2017-08-20 Thread coypu
spoiler alert: we can dedup a lot more > @@ -1288,10 +1295,7 @@ NESTED_NOPROFILE(MIPSX(user_reserved_ins > /* >* Save a minimum of registers to see if this is rdhwr $3,$29 >*/ > -#ifdef MIPS3_LOONGSON2 > - li k0, MIPS_DIAG_BTB_CLEAR | MIPS_DIAG_RAS_DISABLE > - mt

Re: CVS commit: src/sys/arch/mips/mips

2016-06-30 Thread Izumi Tsutsui
skrll@ wrote: > > (i.e. reverting removed lines is not "fix" but workaround). > > Not sure what you mean here, but as bad cache aliases can happen my > change is valid. Well, I have been waitng proper description about the new UVM design for VIPT cache systems (i.e. what's the "right" thing) fo

Re: CVS commit: src/sys/arch/mips/mips

2016-06-30 Thread Nick Hudson
On 06/30/16 15:59, Izumi Tsutsui wrote: skrll@ wrote: Module Name:src Committed By: skrll Date: Thu Jun 30 12:57:35 UTC 2016 Modified Files: src/sys/arch/mips/mips: pmap.c Log Message: Fix MIPS3_NO_PV_UNCACHED alias handling by looping through the pv_list looking for b

Re: CVS commit: src/sys/arch/mips/mips

2016-06-30 Thread Izumi Tsutsui
skrll@ wrote: > Module Name: src > Committed By: skrll > Date: Thu Jun 30 12:57:35 UTC 2016 > > Modified Files: > src/sys/arch/mips/mips: pmap.c > > Log Message: > Fix MIPS3_NO_PV_UNCACHED alias handling by looping through the pv_list > looking for bad aliases and removing the bad

Re: CVS commit: src/sys/arch/mips/mips

2016-06-27 Thread Nick Hudson
On 06/27/16 08:12, Nick Hudson wrote: Module Name:src Committed By: skrll Date: Mon Jun 27 07:12:18 UTC 2016 Modified Files: src/sys/arch/mips/mips: pmap.c Log Message: Fix a bug introduced by me in 1.214 where unmanaged mappings would be affected by calls to pmap_page_p

Re: CVS commit: src/sys/arch/mips/mips

2014-05-07 Thread Izumi Tsutsui
skrll@ wrote: > How about the attached? If it's tested on the target CPUs using mips/bus_dma.c, I have no objection. (the orignal code was tested only on R4400/R5000/Rm5200) --- Izumi Tsutsui

Re: CVS commit: src/sys/arch/mips/mips

2014-05-06 Thread Nick Hudson
On 05/02/14 15:39, Izumi Tsutsui wrote: skrll@ wrote: [snip] - BUS_DMASYNC_PREREAD seems incomplete I think it's complete, but not as well optimized as, for example, the cobalt one. Probably depends on the definition of "complete." (as a person who modified the cobalt one) How about the att

Re: CVS commit: src/sys/arch/mips/mips

2014-05-02 Thread Nick Hudson
On 05/02/14 15:39, Izumi Tsutsui wrote: skrll@ wrote: On 04/30/14 17:35, Izumi Tsutsui wrote: they should also switch to the common mips bus space/dma files. - does it handle MIPS1? don't know about this one. See pmax/bus_dma.c. - BUS_DMASYNC_PREREAD seems incomplete I think it's complet

Re: CVS commit: src/sys/arch/mips/mips

2014-05-02 Thread Izumi Tsutsui
> Should be simple for you to copy across the optimisation then :) Sorry, I have no motivation for current mips ports. --- Izumi Tsutsui

Re: CVS commit: src/sys/arch/mips/mips

2014-05-02 Thread Izumi Tsutsui
skrll@ wrote: > On 04/30/14 17:35, Izumi Tsutsui wrote: > >> they should also switch to the common mips bus space/dma files. > > - does it handle MIPS1? > don't know about this one. See pmax/bus_dma.c. > > - BUS_DMASYNC_PREREAD seems incomplete > > I think it's complete, but not as well optimiz

Re: CVS commit: src/sys/arch/mips/mips

2014-05-02 Thread Nick Hudson
On 04/30/14 17:35, Izumi Tsutsui wrote: they should also switch to the common mips bus space/dma files. - does it handle MIPS1? don't know about this one. - BUS_DMASYNC_PREREAD seems incomplete I think it's complete, but not as well optimized as, for example, the cobalt one. --- Izumi T

Re: CVS commit: src/sys/arch/mips/mips

2014-05-01 Thread Izumi Tsutsui
macallan@ wrote: > On Loongson ( which uses mips/bus_dma.c IIRC ) I see corruption only > when writing via nfs, on sgimips it's apparently any file access, but > it takes a lot longer to trigger. I also wonder if sokvaalloc() (which is enabled by nfsd_use_loan and depends on UVM_KMF_COLORMATCH) i

Re: CVS commit: src/sys/arch/mips/mips

2014-05-01 Thread Michael
Hello, On Thu, 1 May 2014 01:14:37 +0900 Izumi Tsutsui wrote: > skrll@ wrote: > > > I'm still seeing issues with my cobalt, but I'll keep hunting. > > Probably all mips port MD bus_dma.c > (in arc, cobalt, emips, ews4800mips, hpcmips, mipsco, pmax, sgimips) > need the similar fix as mips/bus_d

Re: CVS commit: src/sys/arch/mips/mips

2014-04-30 Thread Nick Hudson
On 04/30/14 17:14, Izumi Tsutsui wrote: skrll@ wrote: I'm still seeing issues with my cobalt, but I'll keep hunting. Probably all mips port MD bus_dma.c (in arc, cobalt, emips, ews4800mips, hpcmips, mipsco, pmax, sgimips) need the similar fix as mips/bus_dma.c rev 1.28. yeah, they'll need that

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